src/mesa/state_tracker/st_mesa_to_tgsi.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * \author
  30  * Michal Krol,
  31  * Keith Whitwell
  32  */
  33
  34 #include "pipe/p_compiler.h"
  35 #include "pipe/p_shader_tokens.h"
  36 #include "pipe/p_state.h"
  37 #include "tgsi/tgsi_ureg.h"
  38 #include "st_mesa_to_tgsi.h"
  39 #include "shader/prog_instruction.h"
  40 #include "shader/prog_parameter.h"
  41 #include "shader/prog_print.h"
  42 #include "util/u_debug.h"
  43 #include "util/u_math.h"
  44 #include "util/u_memory.h"
  45
  46 struct label {
  47    unsigned branch_target;
  48    unsigned token;
  49 };
  50
  51 struct st_translate {
  52    struct ureg_program *ureg;
  53
  54    struct ureg_dst temps[MAX_PROGRAM_TEMPS];
  55    struct ureg_src *constants;
  56    struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
  57    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
  58    struct ureg_dst address[1];
  59    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
  60
  61    const GLuint *inputMapping;
  62    const GLuint *outputMapping;
  63
  64    /* For every instruction that contains a label (eg CALL), keep
  65     * details so that we can go back afterwards and emit the correct
  66     * tgsi instruction number for each label.
  67     */
  68    struct label *labels;
  69    unsigned labels_size;
  70    unsigned labels_count;
  71
  72    /* Keep a record of the tgsi instruction number that each mesa
  73     * instruction starts at, will be used to fix up labels after
  74     * translation.
  75     */
  76    unsigned *insn;
  77    unsigned insn_size;
  78    unsigned insn_count;
  79
  80    unsigned procType;  /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
  81
  82    boolean error;
  83 };
  84
  85
  86 static unsigned *get_label( struct st_translate *t,
  87                             unsigned branch_target )
  88 {
  89    unsigned i;
  90
  91    if (t->labels_count + 1 >= t->labels_size) {
  92       unsigned old_size = t->labels_size;
  93       t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
  94       t->labels = REALLOC( t->labels,
  95                            old_size * sizeof t->labels[0],
  96                            t->labels_size * sizeof t->labels[0] );
  97       if (t->labels == NULL) {
  98          static unsigned dummy;
  99          t->error = TRUE;
 100          return &dummy;
 101       }
 102    }
 103
 104    i = t->labels_count++;
 105    t->labels[i].branch_target = branch_target;
 106    return &t->labels[i].token;
 107 }
 108
 109
 110 static void set_insn_start( struct st_translate *t,
 111                             unsigned start )
 112 {
 113    if (t->insn_count + 1 >= t->insn_size) {
 114       unsigned old_size = t->insn_size;
 115       t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
 116       t->insn = REALLOC( t->insn,
 117                          old_size * sizeof t->insn[0],
 118                          t->insn_size * sizeof t->insn[0] );
 119       if (t->insn == NULL) {
 120          t->error = TRUE;
 121          return;
 122       }
 123    }
 124
 125    t->insn[t->insn_count++] = start;
 126 }
 127
 128
 129 /*
 130  * Map mesa register file to TGSI register file.
 131  */
 132 static struct ureg_dst
 133 dst_register( struct st_translate *t,
 134               gl_register_file file,
 135               GLuint index )
 136 {
 137    switch( file ) {
 138    case PROGRAM_UNDEFINED:
 139       return ureg_dst_undef();
 140
 141    case PROGRAM_TEMPORARY:
 142       if (ureg_dst_is_undef(t->temps[index]))
 143          t->temps[index] = ureg_DECL_temporary( t->ureg );
 144
 145       return t->temps[index];
 146
 147    case PROGRAM_OUTPUT:
 148       return t->outputs[t->outputMapping[index]];
 149
 150    case PROGRAM_ADDRESS:
 151       return t->address[index];
 152
 153    default:
 154       debug_assert( 0 );
 155       return ureg_dst_undef();
 156    }
 157 }
 158
 159
 160 static struct ureg_src
 161 src_register( struct st_translate *t,
 162               gl_register_file file,
 163               GLint index )
 164 {
 165    switch( file ) {
 166    case PROGRAM_UNDEFINED:
 167       return ureg_src_undef();
 168
 169    case PROGRAM_TEMPORARY:
 170       ASSERT(index >= 0);
 171       if (ureg_dst_is_undef(t->temps[index]))
 172          t->temps[index] = ureg_DECL_temporary( t->ureg );
 173       return ureg_src(t->temps[index]);
 174
 175    case PROGRAM_STATE_VAR:
 176    case PROGRAM_NAMED_PARAM:
 177    case PROGRAM_ENV_PARAM:
 178    case PROGRAM_LOCAL_PARAM:
 179    case PROGRAM_UNIFORM:
 180       ASSERT(index >= 0);
 181       return t->constants[index];
 182    case PROGRAM_CONSTANT:       /* ie, immediate */
 183       if (index < 0)
 184          return ureg_DECL_constant( t->ureg, 0 );
 185       else
 186          return t->constants[index];
 187
 188    case PROGRAM_INPUT:
 189       return t->inputs[t->inputMapping[index]];
 190
 191    case PROGRAM_OUTPUT:
 192       return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
 193
 194    case PROGRAM_ADDRESS:
 195       return ureg_src(t->address[index]);
 196
 197    default:
 198       debug_assert( 0 );
 199       return ureg_src_undef();
 200    }
 201 }
 202
 203
 204 /**
 205  * Map mesa texture target to TGSI texture target.
 206  */
 207 static unsigned
 208 translate_texture_target( GLuint textarget,
 209                           GLboolean shadow )
 210 {
 211    if (shadow) {
 212       switch( textarget ) {
 213       case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_SHADOW1D;
 214       case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_SHADOW2D;
 215       case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
 216       default: break;
 217       }
 218    }
 219
 220    switch( textarget ) {
 221    case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_1D;
 222    case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_2D;
 223    case TEXTURE_3D_INDEX:   return TGSI_TEXTURE_3D;
 224    case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
 225    case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
 226    default:
 227       debug_assert( 0 );
 228       return TGSI_TEXTURE_1D;
 229    }
 230 }
 231
 232
 233 static struct ureg_dst
 234 translate_dst( struct st_translate *t,
 235                const struct prog_dst_register *DstReg,
 236                boolean saturate )
 237 {
 238    struct ureg_dst dst = dst_register( t,
 239                                        DstReg->File,
 240                                        DstReg->Index );
 241
 242    dst = ureg_writemask( dst,
 243                          DstReg->WriteMask );
 244
 245    if (saturate)
 246       dst = ureg_saturate( dst );
 247
 248    if (DstReg->RelAddr)
 249       dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
 250
 251    return dst;
 252 }
 253
 254
 255 static struct ureg_src
 256 translate_src( struct st_translate *t,
 257                const struct prog_src_register *SrcReg )
 258 {
 259    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 260
 261    src = ureg_swizzle( src,
 262                        GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
 263                        GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
 264                        GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
 265                        GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
 266
 267    if (SrcReg->Negate == NEGATE_XYZW)
 268       src = ureg_negate(src);
 269
 270    if (SrcReg->Abs)
 271       src = ureg_abs(src);
 272
 273    if (SrcReg->RelAddr) {
 274       src = ureg_src_indirect( src, ureg_src(t->address[0]));
 275       /* If SrcReg->Index was negative, it was set to zero in
 276        * src_register().  Reassign it now.
 277        */
 278       src.Index = SrcReg->Index;
 279    }
 280
 281    return src;
 282 }
 283
 284
 285 static struct ureg_src swizzle_4v( struct ureg_src src,
 286                                    const unsigned *swz )
 287 {
 288    return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
 289 }
 290
 291
 292 /**
 293  * Translate a SWZ instruction into a MOV, MUL or MAD instruction.  EG:
 294  *
 295  *   SWZ dst, src.x-y10
 296  *
 297  * becomes:
 298  *
 299  *   MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
 300  */
 301 static void emit_swz( struct st_translate *t,
 302                       struct ureg_dst dst,
 303                       const struct prog_src_register *SrcReg )
 304 {
 305    struct ureg_program *ureg = t->ureg;
 306    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 307
 308    unsigned negate_mask =  SrcReg->Negate;
 309
 310    unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
 311                         (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
 312                         (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
 313                         (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
 314
 315    unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
 316                          (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
 317                          (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
 318                          (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
 319
 320    unsigned negative_one_mask = one_mask & negate_mask;
 321    unsigned positive_one_mask = one_mask & ~negate_mask;
 322
 323    struct ureg_src imm;
 324    unsigned i;
 325    unsigned mul_swizzle[4] = {0,0,0,0};
 326    unsigned add_swizzle[4] = {0,0,0,0};
 327    unsigned src_swizzle[4] = {0,0,0,0};
 328    boolean need_add = FALSE;
 329    boolean need_mul = FALSE;
 330
 331    if (dst.WriteMask == 0)
 332       return;
 333
 334    /* Is this just a MOV?
 335     */
 336    if (zero_mask == 0 &&
 337        one_mask == 0 &&
 338        (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
 339    {
 340       ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
 341       return;
 342    }
 343
 344 #define IMM_ZERO    0
 345 #define IMM_ONE     1
 346 #define IMM_NEG_ONE 2
 347
 348    imm = ureg_imm3f( ureg, 0, 1, -1 );
 349
 350    for (i = 0; i < 4; i++) {
 351       unsigned bit = 1 << i;
 352
 353       if (dst.WriteMask & bit) {
 354          if (positive_one_mask & bit) {
 355             mul_swizzle[i] = IMM_ZERO;
 356             add_swizzle[i] = IMM_ONE;
 357             need_add = TRUE;
 358          }
 359          else if (negative_one_mask & bit) {
 360             mul_swizzle[i] = IMM_ZERO;
 361             add_swizzle[i] = IMM_NEG_ONE;
 362             need_add = TRUE;
 363          }
 364          else if (zero_mask & bit) {
 365             mul_swizzle[i] = IMM_ZERO;
 366             add_swizzle[i] = IMM_ZERO;
 367             need_add = TRUE;
 368          }
 369          else {
 370             add_swizzle[i] = IMM_ZERO;
 371             src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
 372             need_mul = TRUE;
 373             if (negate_mask & bit) {
 374                mul_swizzle[i] = IMM_NEG_ONE;
 375             }
 376             else {
 377                mul_swizzle[i] = IMM_ONE;
 378             }
 379          }
 380       }
 381    }
 382
 383    if (need_mul && need_add) {
 384       ureg_MAD( ureg,
 385                 dst,
 386                 swizzle_4v( src, src_swizzle ),
 387                 swizzle_4v( imm, mul_swizzle ),
 388                 swizzle_4v( imm, add_swizzle ) );
 389    }
 390    else if (need_mul) {
 391       ureg_MUL( ureg,
 392                 dst,
 393                 swizzle_4v( src, src_swizzle ),
 394                 swizzle_4v( imm, mul_swizzle ) );
 395    }
 396    else if (need_add) {
 397       ureg_MOV( ureg,
 398                 dst,
 399                 swizzle_4v( imm, add_swizzle ) );
 400    }
 401    else {
 402       debug_assert(0);
 403    }
 404
 405 #undef IMM_ZERO
 406 #undef IMM_ONE
 407 #undef IMM_NEG_ONE
 408 }
 409
 410
 411
 412 static unsigned
 413 translate_opcode( unsigned op )
 414 {
 415    switch( op ) {
 416    case OPCODE_ARL:
 417       return TGSI_OPCODE_ARL;
 418    case OPCODE_ABS:
 419       return TGSI_OPCODE_ABS;
 420    case OPCODE_ADD:
 421       return TGSI_OPCODE_ADD;
 422    case OPCODE_BGNLOOP:
 423       return TGSI_OPCODE_BGNLOOP;
 424    case OPCODE_BGNSUB:
 425       return TGSI_OPCODE_BGNSUB;
 426    case OPCODE_BRA:
 427       return TGSI_OPCODE_BRA;
 428    case OPCODE_BRK:
 429       return TGSI_OPCODE_BRK;
 430    case OPCODE_CAL:
 431       return TGSI_OPCODE_CAL;
 432    case OPCODE_CMP:
 433       return TGSI_OPCODE_CMP;
 434    case OPCODE_CONT:
 435       return TGSI_OPCODE_CONT;
 436    case OPCODE_COS:
 437       return TGSI_OPCODE_COS;
 438    case OPCODE_DDX:
 439       return TGSI_OPCODE_DDX;
 440    case OPCODE_DDY:
 441       return TGSI_OPCODE_DDY;
 442    case OPCODE_DP2:
 443       return TGSI_OPCODE_DP2;
 444    case OPCODE_DP2A:
 445       return TGSI_OPCODE_DP2A;
 446    case OPCODE_DP3:
 447       return TGSI_OPCODE_DP3;
 448    case OPCODE_DP4:
 449       return TGSI_OPCODE_DP4;
 450    case OPCODE_DPH:
 451       return TGSI_OPCODE_DPH;
 452    case OPCODE_DST:
 453       return TGSI_OPCODE_DST;
 454    case OPCODE_ELSE:
 455       return TGSI_OPCODE_ELSE;
 456    case OPCODE_ENDIF:
 457       return TGSI_OPCODE_ENDIF;
 458    case OPCODE_ENDLOOP:
 459       return TGSI_OPCODE_ENDLOOP;
 460    case OPCODE_ENDSUB:
 461       return TGSI_OPCODE_ENDSUB;
 462    case OPCODE_EX2:
 463       return TGSI_OPCODE_EX2;
 464    case OPCODE_EXP:
 465       return TGSI_OPCODE_EXP;
 466    case OPCODE_FLR:
 467       return TGSI_OPCODE_FLR;
 468    case OPCODE_FRC:
 469       return TGSI_OPCODE_FRC;
 470    case OPCODE_IF:
 471       return TGSI_OPCODE_IF;
 472    case OPCODE_TRUNC:
 473       return TGSI_OPCODE_TRUNC;
 474    case OPCODE_KIL:
 475       return TGSI_OPCODE_KIL;
 476    case OPCODE_KIL_NV:
 477       return TGSI_OPCODE_KILP;
 478    case OPCODE_LG2:
 479       return TGSI_OPCODE_LG2;
 480    case OPCODE_LOG:
 481       return TGSI_OPCODE_LOG;
 482    case OPCODE_LIT:
 483       return TGSI_OPCODE_LIT;
 484    case OPCODE_LRP:
 485       return TGSI_OPCODE_LRP;
 486    case OPCODE_MAD:
 487       return TGSI_OPCODE_MAD;
 488    case OPCODE_MAX:
 489       return TGSI_OPCODE_MAX;
 490    case OPCODE_MIN:
 491       return TGSI_OPCODE_MIN;
 492    case OPCODE_MOV:
 493       return TGSI_OPCODE_MOV;
 494    case OPCODE_MUL:
 495       return TGSI_OPCODE_MUL;
 496    case OPCODE_NOP:
 497       return TGSI_OPCODE_NOP;
 498    case OPCODE_NRM3:
 499       return TGSI_OPCODE_NRM;
 500    case OPCODE_NRM4:
 501       return TGSI_OPCODE_NRM4;
 502    case OPCODE_POW:
 503       return TGSI_OPCODE_POW;
 504    case OPCODE_RCP:
 505       return TGSI_OPCODE_RCP;
 506    case OPCODE_RET:
 507       return TGSI_OPCODE_RET;
 508    case OPCODE_RSQ:
 509       return TGSI_OPCODE_RSQ;
 510    case OPCODE_SCS:
 511       return TGSI_OPCODE_SCS;
 512    case OPCODE_SEQ:
 513       return TGSI_OPCODE_SEQ;
 514    case OPCODE_SGE:
 515       return TGSI_OPCODE_SGE;
 516    case OPCODE_SGT:
 517       return TGSI_OPCODE_SGT;
 518    case OPCODE_SIN:
 519       return TGSI_OPCODE_SIN;
 520    case OPCODE_SLE:
 521       return TGSI_OPCODE_SLE;
 522    case OPCODE_SLT:
 523       return TGSI_OPCODE_SLT;
 524    case OPCODE_SNE:
 525       return TGSI_OPCODE_SNE;
 526    case OPCODE_SSG:
 527       return TGSI_OPCODE_SSG;
 528    case OPCODE_SUB:
 529       return TGSI_OPCODE_SUB;
 530    case OPCODE_TEX:
 531       return TGSI_OPCODE_TEX;
 532    case OPCODE_TXB:
 533       return TGSI_OPCODE_TXB;
 534    case OPCODE_TXD:
 535       return TGSI_OPCODE_TXD;
 536    case OPCODE_TXL:
 537       return TGSI_OPCODE_TXL;
 538    case OPCODE_TXP:
 539       return TGSI_OPCODE_TXP;
 540    case OPCODE_XPD:
 541       return TGSI_OPCODE_XPD;
 542    case OPCODE_END:
 543       return TGSI_OPCODE_END;
 544    default:
 545       debug_assert( 0 );
 546       return TGSI_OPCODE_NOP;
 547    }
 548 }
 549
 550
 551 static void
 552 compile_instruction(
 553    struct st_translate *t,
 554    const struct prog_instruction *inst )
 555 {
 556    struct ureg_program *ureg = t->ureg;
 557    GLuint i;
 558    struct ureg_dst dst[1];
 559    struct ureg_src src[4];
 560    unsigned num_dst;
 561    unsigned num_src;
 562
 563    num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
 564    num_src = _mesa_num_inst_src_regs( inst->Opcode );
 565
 566    if (num_dst)
 567       dst[0] = translate_dst( t,
 568                               &inst->DstReg,
 569                               inst->SaturateMode );
 570
 571    for (i = 0; i < num_src; i++)
 572       src[i] = translate_src( t, &inst->SrcReg[i] );
 573
 574    switch( inst->Opcode ) {
 575    case OPCODE_SWZ:
 576       emit_swz( t, dst[0], &inst->SrcReg[0] );
 577       return;
 578
 579    case OPCODE_BGNLOOP:
 580    case OPCODE_CAL:
 581    case OPCODE_ELSE:
 582    case OPCODE_ENDLOOP:
 583    case OPCODE_IF:
 584       debug_assert(num_dst == 0);
 585       ureg_label_insn( ureg,
 586                        translate_opcode( inst->Opcode ),
 587                        src, num_src,
 588                        get_label( t, inst->BranchTarget ));
 589       return;
 590
 591    case OPCODE_TEX:
 592    case OPCODE_TXB:
 593    case OPCODE_TXD:
 594    case OPCODE_TXL:
 595    case OPCODE_TXP:
 596       src[num_src++] = t->samplers[inst->TexSrcUnit];
 597       ureg_tex_insn( ureg,
 598                      translate_opcode( inst->Opcode ),
 599                      dst, num_dst,
 600                      translate_texture_target( inst->TexSrcTarget,
 601                                                inst->TexShadow ),
 602                      src, num_src );
 603       return;
 604
 605    case OPCODE_SCS:
 606       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
 607       ureg_insn( ureg,
 608                  translate_opcode( inst->Opcode ),
 609                  dst, num_dst,
 610                  src, num_src );
 611       break;
 612
 613    case OPCODE_XPD:
 614       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
 615       ureg_insn( ureg,
 616                  translate_opcode( inst->Opcode ),
 617                  dst, num_dst,
 618                  src, num_src );
 619       break;
 620
 621    case OPCODE_NOISE1:
 622    case OPCODE_NOISE2:
 623    case OPCODE_NOISE3:
 624    case OPCODE_NOISE4:
 625       /* At some point, a motivated person could add a better
 626        * implementation of noise.  Currently not even the nvidia
 627        * binary drivers do anything more than this.  In any case, the
 628        * place to do this is in the GL state tracker, not the poor
 629        * driver.
 630        */
 631       ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
 632       break;
 633
 634
 635
 636    default:
 637       ureg_insn( ureg,
 638                  translate_opcode( inst->Opcode ),
 639                  dst, num_dst,
 640                  src, num_src );
 641       break;
 642    }
 643 }
 644
 645
 646 /**
 647  * Emit the TGSI instructions for inverting the WPOS y coordinate.
 648  */
 649 static void
 650 emit_inverted_wpos( struct st_translate *t,
 651                     const struct gl_program *program )
 652 {
 653    struct ureg_program *ureg = t->ureg;
 654
 655    /* Fragment program uses fragment position input.
 656     * Need to replace instances of INPUT[WPOS] with temp T
 657     * where T = INPUT[WPOS] by y is inverted.
 658     */
 659    static const gl_state_index winSizeState[STATE_LENGTH]
 660       = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
 661
 662    /* XXX: note we are modifying the incoming shader here!  Need to
 663     * do this before emitting the constant decls below, or this
 664     * will be missed:
 665     */
 666    unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
 667                                                        winSizeState);
 668
 669    struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
 670    struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
 671    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 672
 673    /* MOV wpos_temp, input[wpos]
 674     */
 675    ureg_MOV( ureg, wpos_temp, wpos_input );
 676
 677    /* SUB wpos_temp.y, winsize_const, wpos_input
 678     */
 679    ureg_SUB( ureg,
 680              ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
 681              winsize,
 682              wpos_input);
 683
 684    /* Use wpos_temp as position input from here on:
 685     */
 686    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 687 }
 688
 689
 690 /**
 691  * Translate Mesa program to TGSI format.
 692  * \param program  the program to translate
 693  * \param numInputs  number of input registers used
 694  * \param inputMapping  maps Mesa fragment program inputs to TGSI generic
 695  *                      input indexes
 696  * \param inputSemanticName  the TGSI_SEMANTIC flag for each input
 697  * \param inputSemanticIndex  the semantic index (ex: which texcoord) for
 698  *                            each input
 699  * \param interpMode  the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
 700  * \param numOutputs  number of output registers used
 701  * \param outputMapping  maps Mesa fragment program outputs to TGSI
 702  *                       generic outputs
 703  * \param outputSemanticName  the TGSI_SEMANTIC flag for each output
 704  * \param outputSemanticIndex  the semantic index (ex: which texcoord) for
 705  *                             each output
 706  *
 707  * \return  array of translated tokens, caller's responsibility to free
 708  */
 709 const struct tgsi_token *
 710 st_translate_mesa_program(
 711    GLcontext *ctx,
 712    uint procType,
 713    const struct gl_program *program,
 714    GLuint numInputs,
 715    const GLuint inputMapping[],
 716    const ubyte inputSemanticName[],
 717    const ubyte inputSemanticIndex[],
 718    const GLuint interpMode[],
 719    const GLbitfield inputFlags[],
 720    GLuint numOutputs,
 721    const GLuint outputMapping[],
 722    const ubyte outputSemanticName[],
 723    const ubyte outputSemanticIndex[],
 724    const GLbitfield outputFlags[] )
 725 {
 726    struct st_translate translate, *t;
 727    struct ureg_program *ureg;
 728    const struct tgsi_token *tokens = NULL;
 729    unsigned i;
 730
 731    t = &translate;
 732    memset(t, 0, sizeof *t);
 733
 734    t->procType = procType;
 735    t->inputMapping = inputMapping;
 736    t->outputMapping = outputMapping;
 737    t->ureg = ureg_create( procType );
 738    if (t->ureg == NULL)
 739       return NULL;
 740
 741    ureg = t->ureg;
 742
 743    /*_mesa_print_program(program);*/
 744
 745    /*
 746     * Declare input attributes.
 747     */
 748    if (procType == TGSI_PROCESSOR_FRAGMENT) {
 749       for (i = 0; i < numInputs; i++) {
 750          t->inputs[i] = ureg_DECL_fs_input(ureg,
 751                                            inputSemanticName[i],
 752                                            inputSemanticIndex[i],
 753                                            interpMode[i]);
 754       }
 755
 756       if (program->InputsRead & FRAG_BIT_WPOS) {
 757          /* Must do this after setting up t->inputs, and before
 758           * emitting constant references, below:
 759           */
 760          emit_inverted_wpos( t, program );
 761       }
 762
 763       /*
 764        * Declare output attributes.
 765        */
 766       for (i = 0; i < numOutputs; i++) {
 767          switch (outputSemanticName[i]) {
 768          case TGSI_SEMANTIC_POSITION:
 769             t->outputs[i] = ureg_DECL_output( ureg,
 770                                               TGSI_SEMANTIC_POSITION, /* Z / Depth */
 771                                               outputSemanticIndex[i] );
 772
 773             t->outputs[i] = ureg_writemask( t->outputs[i],
 774                                             TGSI_WRITEMASK_Z );
 775             break;
 776          case TGSI_SEMANTIC_COLOR:
 777             t->outputs[i] = ureg_DECL_output( ureg,
 778                                               TGSI_SEMANTIC_COLOR,
 779                                               outputSemanticIndex[i] );
 780             break;
 781          default:
 782             debug_assert(0);
 783             return 0;
 784          }
 785       }
 786    }
 787    else {
 788       for (i = 0; i < numInputs; i++) {
 789          t->inputs[i] = ureg_DECL_vs_input(ureg, i);
 790       }
 791
 792       for (i = 0; i < numOutputs; i++) {
 793          t->outputs[i] = ureg_DECL_output( ureg,
 794                                            outputSemanticName[i],
 795                                            outputSemanticIndex[i] );
 796       }
 797    }
 798
 799    /* Declare address register.
 800     */
 801    if (program->NumAddressRegs > 0) {
 802       debug_assert( program->NumAddressRegs == 1 );
 803       t->address[0] = ureg_DECL_address( ureg );
 804    }
 805
 806
 807    /* Emit constants and immediates.  Mesa uses a single index space
 808     * for these, so we put all the translated regs in t->constants.
 809     */
 810    if (program->Parameters) {
 811
 812       t->constants = CALLOC( program->Parameters->NumParameters,
 813                              sizeof t->constants[0] );
 814       if (t->constants == NULL)
 815          goto out;
 816
 817       for (i = 0; i < program->Parameters->NumParameters; i++) {
 818          switch (program->Parameters->Parameters[i].Type) {
 819          case PROGRAM_ENV_PARAM:
 820          case PROGRAM_LOCAL_PARAM:
 821          case PROGRAM_STATE_VAR:
 822          case PROGRAM_NAMED_PARAM:
 823          case PROGRAM_UNIFORM:
 824             t->constants[i] = ureg_DECL_constant( ureg, i );
 825             break;
 826
 827             /* Emit immediates only when there is no address register
 828              * in use.  FIXME: Be smarter and recognize param arrays:
 829              * indirect addressing is only valid within the referenced
 830              * array.
 831              */
 832          case PROGRAM_CONSTANT:
 833             if (program->NumAddressRegs > 0)
 834                t->constants[i] = ureg_DECL_constant( ureg, i );
 835             else
 836                t->constants[i] =
 837                   ureg_DECL_immediate( ureg,
 838                                        program->Parameters->ParameterValues[i],
 839                                        4 );
 840             break;
 841          default:
 842             break;
 843          }
 844       }
 845    }
 846
 847    /* texture samplers */
 848    for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
 849       if (program->SamplersUsed & (1 << i)) {
 850          t->samplers[i] = ureg_DECL_sampler( ureg, i );
 851       }
 852    }
 853
 854    /* Emit each instruction in turn:
 855     */
 856    for (i = 0; i < program->NumInstructions; i++) {
 857       set_insn_start( t, ureg_get_instruction_number( ureg ));
 858       compile_instruction( t, &program->Instructions[i] );
 859    }
 860
 861    /* Fix up all emitted labels:
 862     */
 863    for (i = 0; i < t->labels_count; i++) {
 864       ureg_fixup_label( ureg,
 865                         t->labels[i].token,
 866                         t->insn[t->labels[i].branch_target] );
 867    }
 868
 869    tokens = ureg_get_tokens( ureg, NULL );
 870    ureg_destroy( ureg );
 871
 872 out:
 873    FREE(t->insn);
 874    FREE(t->labels);
 875    FREE(t->constants);
 876
 877    if (t->error) {
 878       debug_printf("%s: translate error flag set\n", __FUNCTION__);
 879       FREE((void *)tokens);
 880       tokens = NULL;
 881    }
 882
 883    if (!tokens) {
 884       debug_printf("%s: failed to translate Mesa program:\n", __FUNCTION__);
 885       _mesa_print_program(program);
 886       debug_assert(0);
 887    }
 888
 889    return tokens;
 890 }
 891
 892
 893 /**
 894  * Tokens cannot be free with _mesa_free otherwise the builtin gallium
 895  * malloc debugging will get confused.
 896  */
 897 void
 898 st_free_tokens(const struct tgsi_token *tokens)
 899 {
 900    FREE((void *)tokens);
 901 }