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st/mesa: replace REALLOC() with realloc()
[mesa.git] / src / mesa / state_tracker / st_mesa_to_tgsi.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * \author
30 * Michal Krol,
31 * Keith Whitwell
32 */
33
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_context.h"
36 #include "pipe/p_screen.h"
37 #include "pipe/p_shader_tokens.h"
38 #include "pipe/p_state.h"
39 #include "tgsi/tgsi_ureg.h"
40 #include "st_mesa_to_tgsi.h"
41 #include "st_context.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "util/u_debug.h"
45 #include "util/u_math.h"
46 #include "util/u_memory.h"
47
48
49 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
50 (1 << PROGRAM_ENV_PARAM) | \
51 (1 << PROGRAM_STATE_VAR) | \
52 (1 << PROGRAM_CONSTANT) | \
53 (1 << PROGRAM_UNIFORM))
54
55
56 struct label {
57 unsigned branch_target;
58 unsigned token;
59 };
60
61
62 /**
63 * Intermediate state used during shader translation.
64 */
65 struct st_translate {
66 struct ureg_program *ureg;
67
68 struct ureg_dst temps[MAX_PROGRAM_TEMPS];
69 struct ureg_src *constants;
70 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
71 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
72 struct ureg_dst address[1];
73 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
74 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
75
76 const GLuint *inputMapping;
77 const GLuint *outputMapping;
78
79 /* For every instruction that contains a label (eg CALL), keep
80 * details so that we can go back afterwards and emit the correct
81 * tgsi instruction number for each label.
82 */
83 struct label *labels;
84 unsigned labels_size;
85 unsigned labels_count;
86
87 /* Keep a record of the tgsi instruction number that each mesa
88 * instruction starts at, will be used to fix up labels after
89 * translation.
90 */
91 unsigned *insn;
92 unsigned insn_size;
93 unsigned insn_count;
94
95 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
96
97 boolean error;
98 };
99
100
101 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
102 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
103 TGSI_SEMANTIC_FACE,
104 TGSI_SEMANTIC_VERTEXID,
105 TGSI_SEMANTIC_INSTANCEID
106 };
107
108
109 /**
110 * Make note of a branch to a label in the TGSI code.
111 * After we've emitted all instructions, we'll go over the list
112 * of labels built here and patch the TGSI code with the actual
113 * location of each label.
114 */
115 static unsigned *get_label( struct st_translate *t,
116 unsigned branch_target )
117 {
118 unsigned i;
119
120 if (t->labels_count + 1 >= t->labels_size) {
121 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
122 t->labels = realloc(t->labels, t->labels_size * sizeof t->labels[0]);
123 if (t->labels == NULL) {
124 static unsigned dummy;
125 t->error = TRUE;
126 return &dummy;
127 }
128 }
129
130 i = t->labels_count++;
131 t->labels[i].branch_target = branch_target;
132 return &t->labels[i].token;
133 }
134
135
136 /**
137 * Called prior to emitting the TGSI code for each Mesa instruction.
138 * Allocate additional space for instructions if needed.
139 * Update the insn[] array so the next Mesa instruction points to
140 * the next TGSI instruction.
141 */
142 static void set_insn_start( struct st_translate *t,
143 unsigned start )
144 {
145 if (t->insn_count + 1 >= t->insn_size) {
146 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
147 t->insn = realloc(t->insn, t->insn_size * sizeof t->insn[0]);
148 if (t->insn == NULL) {
149 t->error = TRUE;
150 return;
151 }
152 }
153
154 t->insn[t->insn_count++] = start;
155 }
156
157
158 /**
159 * Map a Mesa dst register to a TGSI ureg_dst register.
160 */
161 static struct ureg_dst
162 dst_register( struct st_translate *t,
163 gl_register_file file,
164 GLuint index )
165 {
166 switch( file ) {
167 case PROGRAM_UNDEFINED:
168 return ureg_dst_undef();
169
170 case PROGRAM_TEMPORARY:
171 if (ureg_dst_is_undef(t->temps[index]))
172 t->temps[index] = ureg_DECL_temporary( t->ureg );
173
174 return t->temps[index];
175
176 case PROGRAM_OUTPUT:
177 if (t->procType == TGSI_PROCESSOR_VERTEX)
178 assert(index < VERT_RESULT_MAX);
179 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
180 assert(index < FRAG_RESULT_MAX);
181 else
182 assert(index < GEOM_RESULT_MAX);
183
184 assert(t->outputMapping[index] < Elements(t->outputs));
185
186 return t->outputs[t->outputMapping[index]];
187
188 case PROGRAM_ADDRESS:
189 return t->address[index];
190
191 default:
192 debug_assert( 0 );
193 return ureg_dst_undef();
194 }
195 }
196
197
198 /**
199 * Map a Mesa src register to a TGSI ureg_src register.
200 */
201 static struct ureg_src
202 src_register( struct st_translate *t,
203 gl_register_file file,
204 GLint index )
205 {
206 switch( file ) {
207 case PROGRAM_UNDEFINED:
208 return ureg_src_undef();
209
210 case PROGRAM_TEMPORARY:
211 assert(index >= 0);
212 assert(index < Elements(t->temps));
213 if (ureg_dst_is_undef(t->temps[index]))
214 t->temps[index] = ureg_DECL_temporary( t->ureg );
215 return ureg_src(t->temps[index]);
216
217 case PROGRAM_ENV_PARAM:
218 case PROGRAM_LOCAL_PARAM:
219 case PROGRAM_UNIFORM:
220 assert(index >= 0);
221 return t->constants[index];
222 case PROGRAM_STATE_VAR:
223 case PROGRAM_CONSTANT: /* ie, immediate */
224 if (index < 0)
225 return ureg_DECL_constant( t->ureg, 0 );
226 else
227 return t->constants[index];
228
229 case PROGRAM_INPUT:
230 assert(t->inputMapping[index] < Elements(t->inputs));
231 return t->inputs[t->inputMapping[index]];
232
233 case PROGRAM_OUTPUT:
234 assert(t->outputMapping[index] < Elements(t->outputs));
235 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
236
237 case PROGRAM_ADDRESS:
238 return ureg_src(t->address[index]);
239
240 case PROGRAM_SYSTEM_VALUE:
241 assert(index < Elements(t->systemValues));
242 return t->systemValues[index];
243
244 default:
245 debug_assert( 0 );
246 return ureg_src_undef();
247 }
248 }
249
250
251 /**
252 * Map mesa texture target to TGSI texture target.
253 */
254 unsigned
255 st_translate_texture_target( GLuint textarget,
256 GLboolean shadow )
257 {
258 if (shadow) {
259 switch( textarget ) {
260 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_SHADOW1D;
261 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_SHADOW2D;
262 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
263 case TEXTURE_1D_ARRAY_INDEX: return TGSI_TEXTURE_SHADOW1D_ARRAY;
264 case TEXTURE_2D_ARRAY_INDEX: return TGSI_TEXTURE_SHADOW2D_ARRAY;
265 case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_SHADOWCUBE;
266 default: break;
267 }
268 }
269
270 switch( textarget ) {
271 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_1D;
272 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_2D;
273 case TEXTURE_3D_INDEX: return TGSI_TEXTURE_3D;
274 case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
275 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
276 case TEXTURE_1D_ARRAY_INDEX: return TGSI_TEXTURE_1D_ARRAY;
277 case TEXTURE_2D_ARRAY_INDEX: return TGSI_TEXTURE_2D_ARRAY;
278 case TEXTURE_EXTERNAL_INDEX: return TGSI_TEXTURE_2D;
279 default:
280 debug_assert( 0 );
281 return TGSI_TEXTURE_1D;
282 }
283 }
284
285
286 /**
287 * Create a TGSI ureg_dst register from a Mesa dest register.
288 */
289 static struct ureg_dst
290 translate_dst( struct st_translate *t,
291 const struct prog_dst_register *DstReg,
292 boolean saturate,
293 boolean clamp_color)
294 {
295 struct ureg_dst dst = dst_register( t,
296 DstReg->File,
297 DstReg->Index );
298
299 dst = ureg_writemask( dst,
300 DstReg->WriteMask );
301
302 if (saturate)
303 dst = ureg_saturate( dst );
304 else if (clamp_color && DstReg->File == PROGRAM_OUTPUT) {
305 /* Clamp colors for ARB_color_buffer_float. */
306 switch (t->procType) {
307 case TGSI_PROCESSOR_VERTEX:
308 /* XXX if the geometry shader is present, this must be done there
309 * instead of here. */
310 if (DstReg->Index == VERT_RESULT_COL0 ||
311 DstReg->Index == VERT_RESULT_COL1 ||
312 DstReg->Index == VERT_RESULT_BFC0 ||
313 DstReg->Index == VERT_RESULT_BFC1) {
314 dst = ureg_saturate(dst);
315 }
316 break;
317
318 case TGSI_PROCESSOR_FRAGMENT:
319 if (DstReg->Index >= FRAG_RESULT_COLOR) {
320 dst = ureg_saturate(dst);
321 }
322 break;
323 }
324 }
325
326 if (DstReg->RelAddr)
327 dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
328
329 return dst;
330 }
331
332
333 /**
334 * Create a TGSI ureg_src register from a Mesa src register.
335 */
336 static struct ureg_src
337 translate_src( struct st_translate *t,
338 const struct prog_src_register *SrcReg )
339 {
340 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
341
342 if (t->procType == TGSI_PROCESSOR_GEOMETRY && SrcReg->HasIndex2) {
343 src = src_register( t, SrcReg->File, SrcReg->Index2 );
344 if (SrcReg->RelAddr2)
345 src = ureg_src_dimension_indirect( src, ureg_src(t->address[0]),
346 SrcReg->Index);
347 else
348 src = ureg_src_dimension( src, SrcReg->Index);
349 }
350
351 src = ureg_swizzle( src,
352 GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
353 GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
354 GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
355 GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
356
357 if (SrcReg->Negate == NEGATE_XYZW)
358 src = ureg_negate(src);
359
360 if (SrcReg->Abs)
361 src = ureg_abs(src);
362
363 if (SrcReg->RelAddr) {
364 src = ureg_src_indirect( src, ureg_src(t->address[0]));
365 if (SrcReg->File != PROGRAM_INPUT &&
366 SrcReg->File != PROGRAM_OUTPUT) {
367 /* If SrcReg->Index was negative, it was set to zero in
368 * src_register(). Reassign it now. But don't do this
369 * for input/output regs since they get remapped while
370 * const buffers don't.
371 */
372 src.Index = SrcReg->Index;
373 }
374 }
375
376 return src;
377 }
378
379
380 static struct ureg_src swizzle_4v( struct ureg_src src,
381 const unsigned *swz )
382 {
383 return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
384 }
385
386
387 /**
388 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
389 *
390 * SWZ dst, src.x-y10
391 *
392 * becomes:
393 *
394 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
395 */
396 static void emit_swz( struct st_translate *t,
397 struct ureg_dst dst,
398 const struct prog_src_register *SrcReg )
399 {
400 struct ureg_program *ureg = t->ureg;
401 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
402
403 unsigned negate_mask = SrcReg->Negate;
404
405 unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
406 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
407 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
408 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
409
410 unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
411 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
412 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
413 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
414
415 unsigned negative_one_mask = one_mask & negate_mask;
416 unsigned positive_one_mask = one_mask & ~negate_mask;
417
418 struct ureg_src imm;
419 unsigned i;
420 unsigned mul_swizzle[4] = {0,0,0,0};
421 unsigned add_swizzle[4] = {0,0,0,0};
422 unsigned src_swizzle[4] = {0,0,0,0};
423 boolean need_add = FALSE;
424 boolean need_mul = FALSE;
425
426 if (dst.WriteMask == 0)
427 return;
428
429 /* Is this just a MOV?
430 */
431 if (zero_mask == 0 &&
432 one_mask == 0 &&
433 (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
434 {
435 ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
436 return;
437 }
438
439 #define IMM_ZERO 0
440 #define IMM_ONE 1
441 #define IMM_NEG_ONE 2
442
443 imm = ureg_imm3f( ureg, 0, 1, -1 );
444
445 for (i = 0; i < 4; i++) {
446 unsigned bit = 1 << i;
447
448 if (dst.WriteMask & bit) {
449 if (positive_one_mask & bit) {
450 mul_swizzle[i] = IMM_ZERO;
451 add_swizzle[i] = IMM_ONE;
452 need_add = TRUE;
453 }
454 else if (negative_one_mask & bit) {
455 mul_swizzle[i] = IMM_ZERO;
456 add_swizzle[i] = IMM_NEG_ONE;
457 need_add = TRUE;
458 }
459 else if (zero_mask & bit) {
460 mul_swizzle[i] = IMM_ZERO;
461 add_swizzle[i] = IMM_ZERO;
462 need_add = TRUE;
463 }
464 else {
465 add_swizzle[i] = IMM_ZERO;
466 src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
467 need_mul = TRUE;
468 if (negate_mask & bit) {
469 mul_swizzle[i] = IMM_NEG_ONE;
470 }
471 else {
472 mul_swizzle[i] = IMM_ONE;
473 }
474 }
475 }
476 }
477
478 if (need_mul && need_add) {
479 ureg_MAD( ureg,
480 dst,
481 swizzle_4v( src, src_swizzle ),
482 swizzle_4v( imm, mul_swizzle ),
483 swizzle_4v( imm, add_swizzle ) );
484 }
485 else if (need_mul) {
486 ureg_MUL( ureg,
487 dst,
488 swizzle_4v( src, src_swizzle ),
489 swizzle_4v( imm, mul_swizzle ) );
490 }
491 else if (need_add) {
492 ureg_MOV( ureg,
493 dst,
494 swizzle_4v( imm, add_swizzle ) );
495 }
496 else {
497 debug_assert(0);
498 }
499
500 #undef IMM_ZERO
501 #undef IMM_ONE
502 #undef IMM_NEG_ONE
503 }
504
505
506 /**
507 * Negate the value of DDY to match GL semantics where (0,0) is the
508 * lower-left corner of the window.
509 * Note that the GL_ARB_fragment_coord_conventions extension will
510 * effect this someday.
511 */
512 static void emit_ddy( struct st_translate *t,
513 struct ureg_dst dst,
514 const struct prog_src_register *SrcReg )
515 {
516 struct ureg_program *ureg = t->ureg;
517 struct ureg_src src = translate_src( t, SrcReg );
518 src = ureg_negate( src );
519 ureg_DDY( ureg, dst, src );
520 }
521
522
523
524 static unsigned
525 translate_opcode( unsigned op )
526 {
527 switch( op ) {
528 case OPCODE_ARL:
529 return TGSI_OPCODE_ARL;
530 case OPCODE_ABS:
531 return TGSI_OPCODE_ABS;
532 case OPCODE_ADD:
533 return TGSI_OPCODE_ADD;
534 case OPCODE_BGNLOOP:
535 return TGSI_OPCODE_BGNLOOP;
536 case OPCODE_BGNSUB:
537 return TGSI_OPCODE_BGNSUB;
538 case OPCODE_BRK:
539 return TGSI_OPCODE_BRK;
540 case OPCODE_CAL:
541 return TGSI_OPCODE_CAL;
542 case OPCODE_CMP:
543 return TGSI_OPCODE_CMP;
544 case OPCODE_CONT:
545 return TGSI_OPCODE_CONT;
546 case OPCODE_COS:
547 return TGSI_OPCODE_COS;
548 case OPCODE_DDX:
549 return TGSI_OPCODE_DDX;
550 case OPCODE_DDY:
551 return TGSI_OPCODE_DDY;
552 case OPCODE_DP2:
553 return TGSI_OPCODE_DP2;
554 case OPCODE_DP2A:
555 return TGSI_OPCODE_DP2A;
556 case OPCODE_DP3:
557 return TGSI_OPCODE_DP3;
558 case OPCODE_DP4:
559 return TGSI_OPCODE_DP4;
560 case OPCODE_DPH:
561 return TGSI_OPCODE_DPH;
562 case OPCODE_DST:
563 return TGSI_OPCODE_DST;
564 case OPCODE_ELSE:
565 return TGSI_OPCODE_ELSE;
566 case OPCODE_EMIT_VERTEX:
567 return TGSI_OPCODE_EMIT;
568 case OPCODE_END_PRIMITIVE:
569 return TGSI_OPCODE_ENDPRIM;
570 case OPCODE_ENDIF:
571 return TGSI_OPCODE_ENDIF;
572 case OPCODE_ENDLOOP:
573 return TGSI_OPCODE_ENDLOOP;
574 case OPCODE_ENDSUB:
575 return TGSI_OPCODE_ENDSUB;
576 case OPCODE_EX2:
577 return TGSI_OPCODE_EX2;
578 case OPCODE_EXP:
579 return TGSI_OPCODE_EXP;
580 case OPCODE_FLR:
581 return TGSI_OPCODE_FLR;
582 case OPCODE_FRC:
583 return TGSI_OPCODE_FRC;
584 case OPCODE_IF:
585 return TGSI_OPCODE_IF;
586 case OPCODE_TRUNC:
587 return TGSI_OPCODE_TRUNC;
588 case OPCODE_KIL:
589 return TGSI_OPCODE_KIL;
590 case OPCODE_KIL_NV:
591 return TGSI_OPCODE_KILP;
592 case OPCODE_LG2:
593 return TGSI_OPCODE_LG2;
594 case OPCODE_LOG:
595 return TGSI_OPCODE_LOG;
596 case OPCODE_LIT:
597 return TGSI_OPCODE_LIT;
598 case OPCODE_LRP:
599 return TGSI_OPCODE_LRP;
600 case OPCODE_MAD:
601 return TGSI_OPCODE_MAD;
602 case OPCODE_MAX:
603 return TGSI_OPCODE_MAX;
604 case OPCODE_MIN:
605 return TGSI_OPCODE_MIN;
606 case OPCODE_MOV:
607 return TGSI_OPCODE_MOV;
608 case OPCODE_MUL:
609 return TGSI_OPCODE_MUL;
610 case OPCODE_NOP:
611 return TGSI_OPCODE_NOP;
612 case OPCODE_NRM3:
613 return TGSI_OPCODE_NRM;
614 case OPCODE_NRM4:
615 return TGSI_OPCODE_NRM4;
616 case OPCODE_POW:
617 return TGSI_OPCODE_POW;
618 case OPCODE_RCP:
619 return TGSI_OPCODE_RCP;
620 case OPCODE_RET:
621 return TGSI_OPCODE_RET;
622 case OPCODE_RSQ:
623 return TGSI_OPCODE_RSQ;
624 case OPCODE_SCS:
625 return TGSI_OPCODE_SCS;
626 case OPCODE_SEQ:
627 return TGSI_OPCODE_SEQ;
628 case OPCODE_SGE:
629 return TGSI_OPCODE_SGE;
630 case OPCODE_SGT:
631 return TGSI_OPCODE_SGT;
632 case OPCODE_SIN:
633 return TGSI_OPCODE_SIN;
634 case OPCODE_SLE:
635 return TGSI_OPCODE_SLE;
636 case OPCODE_SLT:
637 return TGSI_OPCODE_SLT;
638 case OPCODE_SNE:
639 return TGSI_OPCODE_SNE;
640 case OPCODE_SSG:
641 return TGSI_OPCODE_SSG;
642 case OPCODE_SUB:
643 return TGSI_OPCODE_SUB;
644 case OPCODE_TEX:
645 return TGSI_OPCODE_TEX;
646 case OPCODE_TXB:
647 return TGSI_OPCODE_TXB;
648 case OPCODE_TXD:
649 return TGSI_OPCODE_TXD;
650 case OPCODE_TXL:
651 return TGSI_OPCODE_TXL;
652 case OPCODE_TXP:
653 return TGSI_OPCODE_TXP;
654 case OPCODE_XPD:
655 return TGSI_OPCODE_XPD;
656 case OPCODE_END:
657 return TGSI_OPCODE_END;
658 default:
659 debug_assert( 0 );
660 return TGSI_OPCODE_NOP;
661 }
662 }
663
664
665 static void
666 compile_instruction(
667 struct st_translate *t,
668 const struct prog_instruction *inst,
669 boolean clamp_dst_color_output)
670 {
671 struct ureg_program *ureg = t->ureg;
672 GLuint i;
673 struct ureg_dst dst[1] = { { 0 } };
674 struct ureg_src src[4];
675 unsigned num_dst;
676 unsigned num_src;
677
678 num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
679 num_src = _mesa_num_inst_src_regs( inst->Opcode );
680
681 if (num_dst)
682 dst[0] = translate_dst( t,
683 &inst->DstReg,
684 inst->SaturateMode,
685 clamp_dst_color_output);
686
687 for (i = 0; i < num_src; i++)
688 src[i] = translate_src( t, &inst->SrcReg[i] );
689
690 switch( inst->Opcode ) {
691 case OPCODE_SWZ:
692 emit_swz( t, dst[0], &inst->SrcReg[0] );
693 return;
694
695 case OPCODE_BGNLOOP:
696 case OPCODE_CAL:
697 case OPCODE_ELSE:
698 case OPCODE_ENDLOOP:
699 case OPCODE_IF:
700 debug_assert(num_dst == 0);
701 ureg_label_insn( ureg,
702 translate_opcode( inst->Opcode ),
703 src, num_src,
704 get_label( t, inst->BranchTarget ));
705 return;
706
707 case OPCODE_TEX:
708 case OPCODE_TXB:
709 case OPCODE_TXD:
710 case OPCODE_TXL:
711 case OPCODE_TXP:
712 src[num_src++] = t->samplers[inst->TexSrcUnit];
713 ureg_tex_insn( ureg,
714 translate_opcode( inst->Opcode ),
715 dst, num_dst,
716 st_translate_texture_target( inst->TexSrcTarget,
717 inst->TexShadow ),
718 NULL, 0,
719 src, num_src );
720 return;
721
722 case OPCODE_SCS:
723 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
724 ureg_insn( ureg,
725 translate_opcode( inst->Opcode ),
726 dst, num_dst,
727 src, num_src );
728 break;
729
730 case OPCODE_XPD:
731 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
732 ureg_insn( ureg,
733 translate_opcode( inst->Opcode ),
734 dst, num_dst,
735 src, num_src );
736 break;
737
738 case OPCODE_NOISE1:
739 case OPCODE_NOISE2:
740 case OPCODE_NOISE3:
741 case OPCODE_NOISE4:
742 /* At some point, a motivated person could add a better
743 * implementation of noise. Currently not even the nvidia
744 * binary drivers do anything more than this. In any case, the
745 * place to do this is in the GL state tracker, not the poor
746 * driver.
747 */
748 ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
749 break;
750
751 case OPCODE_DDY:
752 emit_ddy( t, dst[0], &inst->SrcReg[0] );
753 break;
754
755 default:
756 ureg_insn( ureg,
757 translate_opcode( inst->Opcode ),
758 dst, num_dst,
759 src, num_src );
760 break;
761 }
762 }
763
764
765 /**
766 * Emit the TGSI instructions for inverting and adjusting WPOS.
767 * This code is unavoidable because it also depends on whether
768 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
769 */
770 static void
771 emit_wpos_adjustment( struct st_translate *t,
772 const struct gl_program *program,
773 boolean invert,
774 GLfloat adjX, GLfloat adjY[2])
775 {
776 struct ureg_program *ureg = t->ureg;
777
778 /* Fragment program uses fragment position input.
779 * Need to replace instances of INPUT[WPOS] with temp T
780 * where T = INPUT[WPOS] by y is inverted.
781 */
782 static const gl_state_index wposTransformState[STATE_LENGTH]
783 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 0, 0, 0 };
784
785 /* XXX: note we are modifying the incoming shader here! Need to
786 * do this before emitting the constant decls below, or this
787 * will be missed:
788 */
789 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
790 wposTransformState);
791
792 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
793 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
794 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
795
796 /* First, apply the coordinate shift: */
797 if (adjX || adjY[0] || adjY[1]) {
798 if (adjY[0] != adjY[1]) {
799 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
800 * depending on whether inversion is actually going to be applied
801 * or not, which is determined by testing against the inversion
802 * state variable used below, which will be either +1 or -1.
803 */
804 struct ureg_dst adj_temp = ureg_DECL_temporary(ureg);
805
806 ureg_CMP(ureg, adj_temp,
807 ureg_scalar(wpostrans, invert ? 2 : 0),
808 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
809 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
810 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
811 } else {
812 ureg_ADD(ureg, wpos_temp, wpos_input,
813 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
814 }
815 wpos_input = ureg_src(wpos_temp);
816 } else {
817 /* MOV wpos_temp, input[wpos]
818 */
819 ureg_MOV( ureg, wpos_temp, wpos_input );
820 }
821
822 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
823 * inversion/identity, or the other way around if we're drawing to an FBO.
824 */
825 if (invert) {
826 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
827 */
828 ureg_MAD( ureg,
829 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
830 wpos_input,
831 ureg_scalar(wpostrans, 0),
832 ureg_scalar(wpostrans, 1));
833 } else {
834 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
835 */
836 ureg_MAD( ureg,
837 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
838 wpos_input,
839 ureg_scalar(wpostrans, 2),
840 ureg_scalar(wpostrans, 3));
841 }
842
843 /* Use wpos_temp as position input from here on:
844 */
845 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
846 }
847
848
849 /**
850 * Emit fragment position/ooordinate code.
851 */
852 static void
853 emit_wpos(struct st_context *st,
854 struct st_translate *t,
855 const struct gl_program *program,
856 struct ureg_program *ureg)
857 {
858 const struct gl_fragment_program *fp =
859 (const struct gl_fragment_program *) program;
860 struct pipe_screen *pscreen = st->pipe->screen;
861 GLfloat adjX = 0.0f;
862 GLfloat adjY[2] = { 0.0f, 0.0f };
863 boolean invert = FALSE;
864
865 /* Query the pixel center conventions supported by the pipe driver and set
866 * adjX, adjY to help out if it cannot handle the requested one internally.
867 *
868 * The bias of the y-coordinate depends on whether y-inversion takes place
869 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
870 * drawing to an FBO (causes additional inversion), and whether the the pipe
871 * driver origin and the requested origin differ (the latter condition is
872 * stored in the 'invert' variable).
873 *
874 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
875 *
876 * center shift only:
877 * i -> h: +0.5
878 * h -> i: -0.5
879 *
880 * inversion only:
881 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
882 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
883 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
884 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
885 *
886 * inversion and center shift:
887 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
888 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
889 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
890 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
891 */
892 if (fp->OriginUpperLeft) {
893 /* Fragment shader wants origin in upper-left */
894 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
895 /* the driver supports upper-left origin */
896 }
897 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
898 /* the driver supports lower-left origin, need to invert Y */
899 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
900 invert = TRUE;
901 }
902 else
903 assert(0);
904 }
905 else {
906 /* Fragment shader wants origin in lower-left */
907 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
908 /* the driver supports lower-left origin */
909 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
910 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
911 /* the driver supports upper-left origin, need to invert Y */
912 invert = TRUE;
913 else
914 assert(0);
915 }
916
917 if (fp->PixelCenterInteger) {
918 /* Fragment shader wants pixel center integer */
919 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
920 /* the driver supports pixel center integer */
921 adjY[1] = 1.0f;
922 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
923 }
924 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
925 /* the driver supports pixel center half integer, need to bias X,Y */
926 adjX = -0.5f;
927 adjY[0] = -0.5f;
928 adjY[1] = 0.5f;
929 }
930 else
931 assert(0);
932 }
933 else {
934 /* Fragment shader wants pixel center half integer */
935 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
936 /* the driver supports pixel center half integer */
937 }
938 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
939 /* the driver supports pixel center integer, need to bias X,Y */
940 adjX = adjY[0] = adjY[1] = 0.5f;
941 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
942 }
943 else
944 assert(0);
945 }
946
947 /* we invert after adjustment so that we avoid the MOV to temporary,
948 * and reuse the adjustment ADD instead */
949 emit_wpos_adjustment(t, program, invert, adjX, adjY);
950 }
951
952
953 /**
954 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
955 * TGSI uses +1 for front, -1 for back.
956 * This function converts the TGSI value to the GL value. Simply clamping/
957 * saturating the value to [0,1] does the job.
958 */
959 static void
960 emit_face_var( struct st_translate *t,
961 const struct gl_program *program )
962 {
963 struct ureg_program *ureg = t->ureg;
964 struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
965 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
966
967 /* MOV_SAT face_temp, input[face]
968 */
969 face_temp = ureg_saturate( face_temp );
970 ureg_MOV( ureg, face_temp, face_input );
971
972 /* Use face_temp as face input from here on:
973 */
974 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
975 }
976
977
978 static void
979 emit_edgeflags( struct st_translate *t,
980 const struct gl_program *program )
981 {
982 struct ureg_program *ureg = t->ureg;
983 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
984 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
985
986 ureg_MOV( ureg, edge_dst, edge_src );
987 }
988
989
990 /**
991 * Translate Mesa program to TGSI format.
992 * \param program the program to translate
993 * \param numInputs number of input registers used
994 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
995 * input indexes
996 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
997 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
998 * each input
999 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
1000 * \param numOutputs number of output registers used
1001 * \param outputMapping maps Mesa fragment program outputs to TGSI
1002 * generic outputs
1003 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
1004 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
1005 * each output
1006 *
1007 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
1008 */
1009 enum pipe_error
1010 st_translate_mesa_program(
1011 struct gl_context *ctx,
1012 uint procType,
1013 struct ureg_program *ureg,
1014 const struct gl_program *program,
1015 GLuint numInputs,
1016 const GLuint inputMapping[],
1017 const ubyte inputSemanticName[],
1018 const ubyte inputSemanticIndex[],
1019 const GLuint interpMode[],
1020 GLuint numOutputs,
1021 const GLuint outputMapping[],
1022 const ubyte outputSemanticName[],
1023 const ubyte outputSemanticIndex[],
1024 boolean passthrough_edgeflags,
1025 boolean clamp_color)
1026 {
1027 struct st_translate translate, *t;
1028 unsigned i;
1029 enum pipe_error ret = PIPE_OK;
1030
1031 assert(numInputs <= Elements(t->inputs));
1032 assert(numOutputs <= Elements(t->outputs));
1033
1034 t = &translate;
1035 memset(t, 0, sizeof *t);
1036
1037 t->procType = procType;
1038 t->inputMapping = inputMapping;
1039 t->outputMapping = outputMapping;
1040 t->ureg = ureg;
1041
1042 /*_mesa_print_program(program);*/
1043
1044 /*
1045 * Declare input attributes.
1046 */
1047 if (procType == TGSI_PROCESSOR_FRAGMENT) {
1048 for (i = 0; i < numInputs; i++) {
1049 t->inputs[i] = ureg_DECL_fs_input(ureg,
1050 inputSemanticName[i],
1051 inputSemanticIndex[i],
1052 interpMode[i]);
1053 }
1054
1055 if (program->InputsRead & FRAG_BIT_WPOS) {
1056 /* Must do this after setting up t->inputs, and before
1057 * emitting constant references, below:
1058 */
1059 emit_wpos(st_context(ctx), t, program, ureg);
1060 }
1061
1062 if (program->InputsRead & FRAG_BIT_FACE) {
1063 emit_face_var( t, program );
1064 }
1065
1066 /*
1067 * Declare output attributes.
1068 */
1069 for (i = 0; i < numOutputs; i++) {
1070 switch (outputSemanticName[i]) {
1071 case TGSI_SEMANTIC_POSITION:
1072 t->outputs[i] = ureg_DECL_output( ureg,
1073 TGSI_SEMANTIC_POSITION, /* Z / Depth */
1074 outputSemanticIndex[i] );
1075
1076 t->outputs[i] = ureg_writemask( t->outputs[i],
1077 TGSI_WRITEMASK_Z );
1078 break;
1079 case TGSI_SEMANTIC_STENCIL:
1080 t->outputs[i] = ureg_DECL_output( ureg,
1081 TGSI_SEMANTIC_STENCIL, /* Stencil */
1082 outputSemanticIndex[i] );
1083 t->outputs[i] = ureg_writemask( t->outputs[i],
1084 TGSI_WRITEMASK_Y );
1085 break;
1086 case TGSI_SEMANTIC_COLOR:
1087 t->outputs[i] = ureg_DECL_output( ureg,
1088 TGSI_SEMANTIC_COLOR,
1089 outputSemanticIndex[i] );
1090 break;
1091 default:
1092 debug_assert(0);
1093 return 0;
1094 }
1095 }
1096 }
1097 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
1098 for (i = 0; i < numInputs; i++) {
1099 t->inputs[i] = ureg_DECL_gs_input(ureg,
1100 i,
1101 inputSemanticName[i],
1102 inputSemanticIndex[i]);
1103 }
1104
1105 for (i = 0; i < numOutputs; i++) {
1106 t->outputs[i] = ureg_DECL_output( ureg,
1107 outputSemanticName[i],
1108 outputSemanticIndex[i] );
1109 }
1110 }
1111 else {
1112 assert(procType == TGSI_PROCESSOR_VERTEX);
1113
1114 for (i = 0; i < numInputs; i++) {
1115 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
1116 }
1117
1118 for (i = 0; i < numOutputs; i++) {
1119 t->outputs[i] = ureg_DECL_output( ureg,
1120 outputSemanticName[i],
1121 outputSemanticIndex[i] );
1122 }
1123 if (passthrough_edgeflags)
1124 emit_edgeflags( t, program );
1125 }
1126
1127 /* Declare address register.
1128 */
1129 if (program->NumAddressRegs > 0) {
1130 debug_assert( program->NumAddressRegs == 1 );
1131 t->address[0] = ureg_DECL_address( ureg );
1132 }
1133
1134 /* Declare misc input registers
1135 */
1136 {
1137 GLbitfield sysInputs = program->SystemValuesRead;
1138 unsigned numSys = 0;
1139 for (i = 0; sysInputs; i++) {
1140 if (sysInputs & (1 << i)) {
1141 unsigned semName = mesa_sysval_to_semantic[i];
1142 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
1143 if (semName == TGSI_SEMANTIC_INSTANCEID ||
1144 semName == TGSI_SEMANTIC_VERTEXID) {
1145 /* From Gallium perspective, these system values are always
1146 * integer, and require native integer support. However, if
1147 * native integer is supported on the vertex stage but not the
1148 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
1149 * assumes these system values are floats. To resolve the
1150 * inconsistency, we insert a U2F.
1151 */
1152 struct st_context *st = st_context(ctx);
1153 struct pipe_screen *pscreen = st->pipe->screen;
1154 assert(procType == TGSI_PROCESSOR_VERTEX);
1155 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
1156 (void) pscreen; /* silence non-debug build warnings */
1157 if (!ctx->Const.NativeIntegers) {
1158 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
1159 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
1160 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
1161 }
1162 }
1163 numSys++;
1164 sysInputs &= ~(1 << i);
1165 }
1166 }
1167 }
1168
1169 if (program->IndirectRegisterFiles & (1 << PROGRAM_TEMPORARY)) {
1170 /* If temps are accessed with indirect addressing, declare temporaries
1171 * in sequential order. Else, we declare them on demand elsewhere.
1172 */
1173 for (i = 0; i < program->NumTemporaries; i++) {
1174 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
1175 t->temps[i] = ureg_DECL_temporary( t->ureg );
1176 }
1177 }
1178
1179 /* Emit constants and immediates. Mesa uses a single index space
1180 * for these, so we put all the translated regs in t->constants.
1181 */
1182 if (program->Parameters) {
1183 t->constants = calloc( program->Parameters->NumParameters,
1184 sizeof t->constants[0] );
1185 if (t->constants == NULL) {
1186 ret = PIPE_ERROR_OUT_OF_MEMORY;
1187 goto out;
1188 }
1189
1190 for (i = 0; i < program->Parameters->NumParameters; i++) {
1191 switch (program->Parameters->Parameters[i].Type) {
1192 case PROGRAM_ENV_PARAM:
1193 case PROGRAM_LOCAL_PARAM:
1194 case PROGRAM_STATE_VAR:
1195 case PROGRAM_UNIFORM:
1196 t->constants[i] = ureg_DECL_constant( ureg, i );
1197 break;
1198
1199 /* Emit immediates only when there's no indirect addressing of
1200 * the const buffer.
1201 * FIXME: Be smarter and recognize param arrays:
1202 * indirect addressing is only valid within the referenced
1203 * array.
1204 */
1205 case PROGRAM_CONSTANT:
1206 if (program->IndirectRegisterFiles & PROGRAM_ANY_CONST)
1207 t->constants[i] = ureg_DECL_constant( ureg, i );
1208 else
1209 t->constants[i] =
1210 ureg_DECL_immediate( ureg,
1211 (const float*) program->Parameters->ParameterValues[i],
1212 4 );
1213 break;
1214 default:
1215 break;
1216 }
1217 }
1218 }
1219
1220 /* texture samplers */
1221 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
1222 if (program->SamplersUsed & (1 << i)) {
1223 t->samplers[i] = ureg_DECL_sampler( ureg, i );
1224 }
1225 }
1226
1227 /* Emit each instruction in turn:
1228 */
1229 for (i = 0; i < program->NumInstructions; i++) {
1230 set_insn_start( t, ureg_get_instruction_number( ureg ));
1231 compile_instruction( t, &program->Instructions[i], clamp_color );
1232 }
1233
1234 /* Fix up all emitted labels:
1235 */
1236 for (i = 0; i < t->labels_count; i++) {
1237 ureg_fixup_label( ureg,
1238 t->labels[i].token,
1239 t->insn[t->labels[i].branch_target] );
1240 }
1241
1242 out:
1243 free(t->insn);
1244 free(t->labels);
1245 free(t->constants);
1246
1247 if (t->error) {
1248 debug_printf("%s: translate error flag set\n", __FUNCTION__);
1249 }
1250
1251 return ret;
1252 }
1253
1254
1255 /**
1256 * Tokens cannot be free with free otherwise the builtin gallium
1257 * malloc debugging will get confused.
1258 */
1259 void
1260 st_free_tokens(const struct tgsi_token *tokens)
1261 {
1262 free((void *)tokens);
1263 }