src/mesa/state_tracker/st_mesa_to_tgsi.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * \author
  30  * Michal Krol,
  31  * Keith Whitwell
  32  */
  33
  34 #include "pipe/p_compiler.h"
  35 #include "pipe/p_shader_tokens.h"
  36 #include "pipe/p_state.h"
  37 #include "tgsi/tgsi_ureg.h"
  38 #include "st_mesa_to_tgsi.h"
  39 #include "shader/prog_instruction.h"
  40 #include "shader/prog_parameter.h"
  41 #include "shader/prog_print.h"
  42 #include "util/u_debug.h"
  43 #include "util/u_math.h"
  44 #include "util/u_memory.h"
  45
  46 struct label {
  47    unsigned branch_target;
  48    unsigned token;
  49 };
  50
  51 struct st_translate {
  52    struct ureg_program *ureg;
  53
  54    struct ureg_dst temps[MAX_PROGRAM_TEMPS];
  55    struct ureg_src *constants;
  56    struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
  57    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
  58    struct ureg_dst address[1];
  59    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
  60
  61    const GLuint *inputMapping;
  62    const GLuint *outputMapping;
  63
  64    /* For every instruction that contains a label (eg CALL), keep
  65     * details so that we can go back afterwards and emit the correct
  66     * tgsi instruction number for each label.
  67     */
  68    struct label *labels;
  69    unsigned labels_size;
  70    unsigned labels_count;
  71
  72    /* Keep a record of the tgsi instruction number that each mesa
  73     * instruction starts at, will be used to fix up labels after
  74     * translation.
  75     */
  76    unsigned *insn;
  77    unsigned insn_size;
  78    unsigned insn_count;
  79
  80    unsigned procType;  /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
  81
  82    boolean error;
  83 };
  84
  85
  86 static unsigned *get_label( struct st_translate *t,
  87                             unsigned branch_target )
  88 {
  89    unsigned i;
  90
  91    if (t->labels_count + 1 >= t->labels_size) {
  92       unsigned old_size = t->labels_size;
  93       t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
  94       t->labels = REALLOC( t->labels,
  95                            old_size * sizeof t->labels[0],
  96                            t->labels_size * sizeof t->labels[0] );
  97       if (t->labels == NULL) {
  98          static unsigned dummy;
  99          t->error = TRUE;
 100          return &dummy;
 101       }
 102    }
 103
 104    i = t->labels_count++;
 105    t->labels[i].branch_target = branch_target;
 106    return &t->labels[i].token;
 107 }
 108
 109
 110 static void set_insn_start( struct st_translate *t,
 111                             unsigned start )
 112 {
 113    if (t->insn_count + 1 >= t->insn_size) {
 114       unsigned old_size = t->insn_size;
 115       t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
 116       t->insn = REALLOC( t->insn,
 117                          old_size * sizeof t->insn[0],
 118                          t->insn_size * sizeof t->insn[0] );
 119       if (t->insn == NULL) {
 120          t->error = TRUE;
 121          return;
 122       }
 123    }
 124
 125    t->insn[t->insn_count++] = start;
 126 }
 127
 128
 129 /*
 130  * Map mesa register file to TGSI register file.
 131  */
 132 static struct ureg_dst
 133 dst_register( struct st_translate *t,
 134               gl_register_file file,
 135               GLuint index )
 136 {
 137    switch( file ) {
 138    case PROGRAM_UNDEFINED:
 139       return ureg_dst_undef();
 140
 141    case PROGRAM_TEMPORARY:
 142       if (ureg_dst_is_undef(t->temps[index]))
 143          t->temps[index] = ureg_DECL_temporary( t->ureg );
 144
 145       return t->temps[index];
 146
 147    case PROGRAM_OUTPUT:
 148       return t->outputs[t->outputMapping[index]];
 149
 150    case PROGRAM_ADDRESS:
 151       return t->address[index];
 152
 153    default:
 154       debug_assert( 0 );
 155       return ureg_dst_undef();
 156    }
 157 }
 158
 159
 160 static struct ureg_src
 161 src_register( struct st_translate *t,
 162               gl_register_file file,
 163               GLuint index )
 164 {
 165    switch( file ) {
 166    case PROGRAM_UNDEFINED:
 167       return ureg_src_undef();
 168
 169    case PROGRAM_TEMPORARY:
 170       if (ureg_dst_is_undef(t->temps[index]))
 171          t->temps[index] = ureg_DECL_temporary( t->ureg );
 172       return ureg_src(t->temps[index]);
 173
 174    case PROGRAM_STATE_VAR:
 175    case PROGRAM_NAMED_PARAM:
 176    case PROGRAM_ENV_PARAM:
 177    case PROGRAM_LOCAL_PARAM:
 178    case PROGRAM_UNIFORM:
 179    case PROGRAM_CONSTANT:       /* ie, immediate */
 180       return t->constants[index];
 181
 182    case PROGRAM_INPUT:
 183       return t->inputs[t->inputMapping[index]];
 184
 185    case PROGRAM_OUTPUT:
 186       return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
 187
 188    case PROGRAM_ADDRESS:
 189       return ureg_src(t->address[index]);
 190
 191    default:
 192       debug_assert( 0 );
 193       return ureg_src_undef();
 194    }
 195 }
 196
 197
 198 /**
 199  * Map mesa texture target to TGSI texture target.
 200  */
 201 static unsigned
 202 translate_texture_target( GLuint textarget,
 203                           GLboolean shadow )
 204 {
 205    if (shadow) {
 206       switch( textarget ) {
 207       case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_SHADOW1D;
 208       case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_SHADOW2D;
 209       case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
 210       default: break;
 211       }
 212    }
 213
 214    switch( textarget ) {
 215    case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_1D;
 216    case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_2D;
 217    case TEXTURE_3D_INDEX:   return TGSI_TEXTURE_3D;
 218    case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
 219    case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
 220    default:
 221       debug_assert( 0 );
 222       return TGSI_TEXTURE_1D;
 223    }
 224 }
 225
 226
 227 static struct ureg_dst
 228 translate_dst( struct st_translate *t,
 229                const struct prog_dst_register *DstReg,
 230                boolean saturate )
 231 {
 232    struct ureg_dst dst = dst_register( t,
 233                                        DstReg->File,
 234                                        DstReg->Index );
 235
 236    dst = ureg_writemask( dst,
 237                          DstReg->WriteMask );
 238
 239    if (saturate)
 240       dst = ureg_saturate( dst );
 241
 242    if (DstReg->RelAddr)
 243       dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
 244
 245    return dst;
 246 }
 247
 248
 249 static struct ureg_src
 250 translate_src( struct st_translate *t,
 251                const struct prog_src_register *SrcReg )
 252 {
 253    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 254
 255    src = ureg_swizzle( src,
 256                        GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
 257                        GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
 258                        GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
 259                        GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
 260
 261    if (SrcReg->Negate == NEGATE_XYZW)
 262       src = ureg_negate(src);
 263
 264    if (SrcReg->Abs)
 265       src = ureg_abs(src);
 266
 267    if (SrcReg->RelAddr)
 268       src = ureg_src_indirect( src, ureg_src(t->address[0]));
 269
 270    return src;
 271 }
 272
 273
 274 static struct ureg_src swizzle_4v( struct ureg_src src,
 275                                    const unsigned *swz )
 276 {
 277    return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
 278 }
 279
 280
 281 /**
 282  * Translate a SWZ instruction into a MOV, MUL or MAD instruction.  EG:
 283  *
 284  *   SWZ dst, src.x-y10
 285  *
 286  * becomes:
 287  *
 288  *   MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
 289  */
 290 static void emit_swz( struct st_translate *t,
 291                       struct ureg_dst dst,
 292                       const struct prog_src_register *SrcReg )
 293 {
 294    struct ureg_program *ureg = t->ureg;
 295    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 296
 297    unsigned negate_mask =  SrcReg->Negate;
 298
 299    unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
 300                         (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
 301                         (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
 302                         (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
 303
 304    unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
 305                          (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
 306                          (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
 307                          (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
 308
 309    unsigned negative_one_mask = one_mask & negate_mask;
 310    unsigned positive_one_mask = one_mask & ~negate_mask;
 311
 312    struct ureg_src imm;
 313    unsigned i;
 314    unsigned mul_swizzle[4] = {0,0,0,0};
 315    unsigned add_swizzle[4] = {0,0,0,0};
 316    unsigned src_swizzle[4] = {0,0,0,0};
 317    boolean need_add = FALSE;
 318    boolean need_mul = FALSE;
 319
 320    if (dst.WriteMask == 0)
 321       return;
 322
 323    /* Is this just a MOV?
 324     */
 325    if (zero_mask == 0 &&
 326        one_mask == 0 &&
 327        (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
 328    {
 329       ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
 330       return;
 331    }
 332
 333 #define IMM_ZERO    0
 334 #define IMM_ONE     1
 335 #define IMM_NEG_ONE 2
 336
 337    imm = ureg_imm3f( ureg, 0, 1, -1 );
 338
 339    for (i = 0; i < 4; i++) {
 340       unsigned bit = 1 << i;
 341
 342       if (dst.WriteMask & bit) {
 343          if (positive_one_mask & bit) {
 344             mul_swizzle[i] = IMM_ZERO;
 345             add_swizzle[i] = IMM_ONE;
 346             need_add = TRUE;
 347          }
 348          else if (negative_one_mask & bit) {
 349             mul_swizzle[i] = IMM_ZERO;
 350             add_swizzle[i] = IMM_NEG_ONE;
 351             need_add = TRUE;
 352          }
 353          else if (zero_mask & bit) {
 354             mul_swizzle[i] = IMM_ZERO;
 355             add_swizzle[i] = IMM_ZERO;
 356             need_add = TRUE;
 357          }
 358          else {
 359             add_swizzle[i] = IMM_ZERO;
 360             src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
 361             need_mul = TRUE;
 362             if (negate_mask & bit) {
 363                mul_swizzle[i] = IMM_NEG_ONE;
 364             }
 365             else {
 366                mul_swizzle[i] = IMM_ONE;
 367             }
 368          }
 369       }
 370    }
 371
 372    if (need_mul && need_add) {
 373       ureg_MAD( ureg,
 374                 dst,
 375                 swizzle_4v( src, src_swizzle ),
 376                 swizzle_4v( imm, mul_swizzle ),
 377                 swizzle_4v( imm, add_swizzle ) );
 378    }
 379    else if (need_mul) {
 380       ureg_MUL( ureg,
 381                 dst,
 382                 swizzle_4v( src, src_swizzle ),
 383                 swizzle_4v( imm, mul_swizzle ) );
 384    }
 385    else if (need_add) {
 386       ureg_MOV( ureg,
 387                 dst,
 388                 swizzle_4v( imm, add_swizzle ) );
 389    }
 390    else {
 391       debug_assert(0);
 392    }
 393
 394 #undef IMM_ZERO
 395 #undef IMM_ONE
 396 #undef IMM_NEG_ONE
 397 }
 398
 399
 400
 401 static unsigned
 402 translate_opcode( unsigned op )
 403 {
 404    switch( op ) {
 405    case OPCODE_ARL:
 406       return TGSI_OPCODE_ARL;
 407    case OPCODE_ABS:
 408       return TGSI_OPCODE_ABS;
 409    case OPCODE_ADD:
 410       return TGSI_OPCODE_ADD;
 411    case OPCODE_BGNLOOP:
 412       return TGSI_OPCODE_BGNLOOP;
 413    case OPCODE_BGNSUB:
 414       return TGSI_OPCODE_BGNSUB;
 415    case OPCODE_BRA:
 416       return TGSI_OPCODE_BRA;
 417    case OPCODE_BRK:
 418       return TGSI_OPCODE_BRK;
 419    case OPCODE_CAL:
 420       return TGSI_OPCODE_CAL;
 421    case OPCODE_CMP:
 422       return TGSI_OPCODE_CMP;
 423    case OPCODE_CONT:
 424       return TGSI_OPCODE_CONT;
 425    case OPCODE_COS:
 426       return TGSI_OPCODE_COS;
 427    case OPCODE_DDX:
 428       return TGSI_OPCODE_DDX;
 429    case OPCODE_DDY:
 430       return TGSI_OPCODE_DDY;
 431    case OPCODE_DP2:
 432       return TGSI_OPCODE_DP2;
 433    case OPCODE_DP2A:
 434       return TGSI_OPCODE_DP2A;
 435    case OPCODE_DP3:
 436       return TGSI_OPCODE_DP3;
 437    case OPCODE_DP4:
 438       return TGSI_OPCODE_DP4;
 439    case OPCODE_DPH:
 440       return TGSI_OPCODE_DPH;
 441    case OPCODE_DST:
 442       return TGSI_OPCODE_DST;
 443    case OPCODE_ELSE:
 444       return TGSI_OPCODE_ELSE;
 445    case OPCODE_ENDIF:
 446       return TGSI_OPCODE_ENDIF;
 447    case OPCODE_ENDLOOP:
 448       return TGSI_OPCODE_ENDLOOP;
 449    case OPCODE_ENDSUB:
 450       return TGSI_OPCODE_ENDSUB;
 451    case OPCODE_EX2:
 452       return TGSI_OPCODE_EX2;
 453    case OPCODE_EXP:
 454       return TGSI_OPCODE_EXP;
 455    case OPCODE_FLR:
 456       return TGSI_OPCODE_FLR;
 457    case OPCODE_FRC:
 458       return TGSI_OPCODE_FRC;
 459    case OPCODE_IF:
 460       return TGSI_OPCODE_IF;
 461    case OPCODE_TRUNC:
 462       return TGSI_OPCODE_TRUNC;
 463    case OPCODE_KIL:
 464       return TGSI_OPCODE_KIL;
 465    case OPCODE_KIL_NV:
 466       return TGSI_OPCODE_KILP;
 467    case OPCODE_LG2:
 468       return TGSI_OPCODE_LG2;
 469    case OPCODE_LOG:
 470       return TGSI_OPCODE_LOG;
 471    case OPCODE_LIT:
 472       return TGSI_OPCODE_LIT;
 473    case OPCODE_LRP:
 474       return TGSI_OPCODE_LRP;
 475    case OPCODE_MAD:
 476       return TGSI_OPCODE_MAD;
 477    case OPCODE_MAX:
 478       return TGSI_OPCODE_MAX;
 479    case OPCODE_MIN:
 480       return TGSI_OPCODE_MIN;
 481    case OPCODE_MOV:
 482       return TGSI_OPCODE_MOV;
 483    case OPCODE_MUL:
 484       return TGSI_OPCODE_MUL;
 485    case OPCODE_NOP:
 486       return TGSI_OPCODE_NOP;
 487    case OPCODE_NRM3:
 488       return TGSI_OPCODE_NRM;
 489    case OPCODE_NRM4:
 490       return TGSI_OPCODE_NRM4;
 491    case OPCODE_POW:
 492       return TGSI_OPCODE_POW;
 493    case OPCODE_RCP:
 494       return TGSI_OPCODE_RCP;
 495    case OPCODE_RET:
 496       return TGSI_OPCODE_RET;
 497    case OPCODE_RSQ:
 498       return TGSI_OPCODE_RSQ;
 499    case OPCODE_SCS:
 500       return TGSI_OPCODE_SCS;
 501    case OPCODE_SEQ:
 502       return TGSI_OPCODE_SEQ;
 503    case OPCODE_SGE:
 504       return TGSI_OPCODE_SGE;
 505    case OPCODE_SGT:
 506       return TGSI_OPCODE_SGT;
 507    case OPCODE_SIN:
 508       return TGSI_OPCODE_SIN;
 509    case OPCODE_SLE:
 510       return TGSI_OPCODE_SLE;
 511    case OPCODE_SLT:
 512       return TGSI_OPCODE_SLT;
 513    case OPCODE_SNE:
 514       return TGSI_OPCODE_SNE;
 515    case OPCODE_SSG:
 516       return TGSI_OPCODE_SSG;
 517    case OPCODE_SUB:
 518       return TGSI_OPCODE_SUB;
 519    case OPCODE_TEX:
 520       return TGSI_OPCODE_TEX;
 521    case OPCODE_TXB:
 522       return TGSI_OPCODE_TXB;
 523    case OPCODE_TXD:
 524       return TGSI_OPCODE_TXD;
 525    case OPCODE_TXL:
 526       return TGSI_OPCODE_TXL;
 527    case OPCODE_TXP:
 528       return TGSI_OPCODE_TXP;
 529    case OPCODE_XPD:
 530       return TGSI_OPCODE_XPD;
 531    case OPCODE_END:
 532       return TGSI_OPCODE_END;
 533    default:
 534       debug_assert( 0 );
 535       return TGSI_OPCODE_NOP;
 536    }
 537 }
 538
 539
 540 static void
 541 compile_instruction(
 542    struct st_translate *t,
 543    const struct prog_instruction *inst )
 544 {
 545    struct ureg_program *ureg = t->ureg;
 546    GLuint i;
 547    struct ureg_dst dst[1];
 548    struct ureg_src src[4];
 549    unsigned num_dst;
 550    unsigned num_src;
 551
 552    num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
 553    num_src = _mesa_num_inst_src_regs( inst->Opcode );
 554
 555    if (num_dst)
 556       dst[0] = translate_dst( t,
 557                               &inst->DstReg,
 558                               inst->SaturateMode );
 559
 560    for (i = 0; i < num_src; i++)
 561       src[i] = translate_src( t, &inst->SrcReg[i] );
 562
 563    switch( inst->Opcode ) {
 564    case OPCODE_SWZ:
 565       emit_swz( t, dst[0], &inst->SrcReg[0] );
 566       return;
 567
 568    case OPCODE_BGNLOOP:
 569    case OPCODE_CAL:
 570    case OPCODE_ELSE:
 571    case OPCODE_ENDLOOP:
 572    case OPCODE_IF:
 573       debug_assert(num_dst == 0);
 574       ureg_label_insn( ureg,
 575                        translate_opcode( inst->Opcode ),
 576                        src, num_src,
 577                        get_label( t, inst->BranchTarget ));
 578       return;
 579
 580    case OPCODE_TEX:
 581    case OPCODE_TXB:
 582    case OPCODE_TXD:
 583    case OPCODE_TXL:
 584    case OPCODE_TXP:
 585       src[num_src++] = t->samplers[inst->TexSrcUnit];
 586       ureg_tex_insn( ureg,
 587                      translate_opcode( inst->Opcode ),
 588                      dst, num_dst,
 589                      translate_texture_target( inst->TexSrcTarget,
 590                                                inst->TexShadow ),
 591                      src, num_src );
 592       return;
 593
 594    case OPCODE_SCS:
 595       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
 596       ureg_insn( ureg,
 597                  translate_opcode( inst->Opcode ),
 598                  dst, num_dst,
 599                  src, num_src );
 600       break;
 601
 602    case OPCODE_XPD:
 603       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
 604       ureg_insn( ureg,
 605                  translate_opcode( inst->Opcode ),
 606                  dst, num_dst,
 607                  src, num_src );
 608       break;
 609
 610    case OPCODE_NOISE1:
 611    case OPCODE_NOISE2:
 612    case OPCODE_NOISE3:
 613    case OPCODE_NOISE4:
 614       /* At some point, a motivated person could add a better
 615        * implementation of noise.  Currently not even the nvidia
 616        * binary drivers do anything more than this.  In any case, the
 617        * place to do this is in the GL state tracker, not the poor
 618        * driver.
 619        */
 620       ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
 621       break;
 622
 623
 624
 625    default:
 626       ureg_insn( ureg,
 627                  translate_opcode( inst->Opcode ),
 628                  dst, num_dst,
 629                  src, num_src );
 630       break;
 631    }
 632 }
 633
 634
 635 /**
 636  * Emit the TGSI instructions for inverting the WPOS y coordinate.
 637  */
 638 static void
 639 emit_inverted_wpos( struct st_translate *t,
 640                     const struct gl_program *program )
 641 {
 642    struct ureg_program *ureg = t->ureg;
 643
 644    /* Fragment program uses fragment position input.
 645     * Need to replace instances of INPUT[WPOS] with temp T
 646     * where T = INPUT[WPOS] by y is inverted.
 647     */
 648    static const gl_state_index winSizeState[STATE_LENGTH]
 649       = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
 650
 651    /* XXX: note we are modifying the incoming shader here!  Need to
 652     * do this before emitting the constant decls below, or this
 653     * will be missed:
 654     */
 655    unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
 656                                                        winSizeState);
 657
 658    struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
 659    struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
 660    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 661
 662    /* MOV wpos_temp, input[wpos]
 663     */
 664    ureg_MOV( ureg, wpos_temp, wpos_input );
 665
 666    /* SUB wpos_temp.y, winsize_const, wpos_input
 667     */
 668    ureg_SUB( ureg,
 669              ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
 670              winsize,
 671              wpos_input);
 672
 673    /* Use wpos_temp as position input from here on:
 674     */
 675    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 676 }
 677
 678
 679 /**
 680  * Translate Mesa program to TGSI format.
 681  * \param program  the program to translate
 682  * \param numInputs  number of input registers used
 683  * \param inputMapping  maps Mesa fragment program inputs to TGSI generic
 684  *                      input indexes
 685  * \param inputSemanticName  the TGSI_SEMANTIC flag for each input
 686  * \param inputSemanticIndex  the semantic index (ex: which texcoord) for
 687  *                            each input
 688  * \param interpMode  the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
 689  * \param numOutputs  number of output registers used
 690  * \param outputMapping  maps Mesa fragment program outputs to TGSI
 691  *                       generic outputs
 692  * \param outputSemanticName  the TGSI_SEMANTIC flag for each output
 693  * \param outputSemanticIndex  the semantic index (ex: which texcoord) for
 694  *                             each output
 695  *
 696  * \return  array of translated tokens, caller's responsibility to free
 697  */
 698 const struct tgsi_token *
 699 st_translate_mesa_program(
 700    GLcontext *ctx,
 701    uint procType,
 702    const struct gl_program *program,
 703    GLuint numInputs,
 704    const GLuint inputMapping[],
 705    const ubyte inputSemanticName[],
 706    const ubyte inputSemanticIndex[],
 707    const GLuint interpMode[],
 708    const GLbitfield inputFlags[],
 709    GLuint numOutputs,
 710    const GLuint outputMapping[],
 711    const ubyte outputSemanticName[],
 712    const ubyte outputSemanticIndex[],
 713    const GLbitfield outputFlags[] )
 714 {
 715    struct st_translate translate, *t;
 716    struct ureg_program *ureg;
 717    const struct tgsi_token *tokens = NULL;
 718    unsigned i;
 719
 720    t = &translate;
 721    memset(t, 0, sizeof *t);
 722
 723    t->procType = procType;
 724    t->inputMapping = inputMapping;
 725    t->outputMapping = outputMapping;
 726    t->ureg = ureg_create( procType );
 727    if (t->ureg == NULL)
 728       return NULL;
 729
 730    ureg = t->ureg;
 731
 732    /*_mesa_print_program(program);*/
 733
 734    /*
 735     * Declare input attributes.
 736     */
 737    if (procType == TGSI_PROCESSOR_FRAGMENT) {
 738       for (i = 0; i < numInputs; i++) {
 739          t->inputs[i] = ureg_DECL_fs_input(ureg,
 740                                            inputSemanticName[i],
 741                                            inputSemanticIndex[i],
 742                                            interpMode[i]);
 743       }
 744
 745       if (program->InputsRead & FRAG_BIT_WPOS) {
 746          /* Must do this after setting up t->inputs, and before
 747           * emitting constant references, below:
 748           */
 749          emit_inverted_wpos( t, program );
 750       }
 751
 752       /*
 753        * Declare output attributes.
 754        */
 755       for (i = 0; i < numOutputs; i++) {
 756          switch (outputSemanticName[i]) {
 757          case TGSI_SEMANTIC_POSITION:
 758             t->outputs[i] = ureg_DECL_output( ureg,
 759                                               TGSI_SEMANTIC_POSITION, /* Z / Depth */
 760                                               outputSemanticIndex[i] );
 761
 762             t->outputs[i] = ureg_writemask( t->outputs[i],
 763                                             TGSI_WRITEMASK_Z );
 764             break;
 765          case TGSI_SEMANTIC_COLOR:
 766             t->outputs[i] = ureg_DECL_output( ureg,
 767                                               TGSI_SEMANTIC_COLOR,
 768                                               outputSemanticIndex[i] );
 769             break;
 770          default:
 771             debug_assert(0);
 772             return 0;
 773          }
 774       }
 775    }
 776    else {
 777       for (i = 0; i < numInputs; i++) {
 778          t->inputs[i] = ureg_DECL_vs_input(ureg, i);
 779       }
 780
 781       for (i = 0; i < numOutputs; i++) {
 782          t->outputs[i] = ureg_DECL_output( ureg,
 783                                            outputSemanticName[i],
 784                                            outputSemanticIndex[i] );
 785       }
 786    }
 787
 788    /* Declare address register.
 789     */
 790    if (program->NumAddressRegs > 0) {
 791       debug_assert( program->NumAddressRegs == 1 );
 792       t->address[0] = ureg_DECL_address( ureg );
 793    }
 794
 795
 796    /* Emit constants and immediates.  Mesa uses a single index space
 797     * for these, so we put all the translated regs in t->constants.
 798     */
 799    if (program->Parameters) {
 800
 801       t->constants = CALLOC( program->Parameters->NumParameters,
 802                              sizeof t->constants[0] );
 803       if (t->constants == NULL)
 804          goto out;
 805
 806       for (i = 0; i < program->Parameters->NumParameters; i++) {
 807          switch (program->Parameters->Parameters[i].Type) {
 808          case PROGRAM_ENV_PARAM:
 809          case PROGRAM_STATE_VAR:
 810          case PROGRAM_NAMED_PARAM:
 811          case PROGRAM_UNIFORM:
 812             t->constants[i] = ureg_DECL_constant( ureg, i );
 813             break;
 814
 815             /* Emit immediates only when there is no address register
 816              * in use.  FIXME: Be smarter and recognize param arrays:
 817              * indirect addressing is only valid within the referenced
 818              * array.
 819              */
 820          case PROGRAM_CONSTANT:
 821             if (program->NumAddressRegs > 0)
 822                t->constants[i] = ureg_DECL_constant( ureg, i );
 823             else
 824                t->constants[i] =
 825                   ureg_DECL_immediate( ureg,
 826                                        program->Parameters->ParameterValues[i],
 827                                        4 );
 828             break;
 829          default:
 830             break;
 831          }
 832       }
 833    }
 834
 835    /* texture samplers */
 836    for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
 837       if (program->SamplersUsed & (1 << i)) {
 838          t->samplers[i] = ureg_DECL_sampler( ureg, i );
 839       }
 840    }
 841
 842    /* Emit each instruction in turn:
 843     */
 844    for (i = 0; i < program->NumInstructions; i++) {
 845       set_insn_start( t, ureg_get_instruction_number( ureg ));
 846       compile_instruction( t, &program->Instructions[i] );
 847    }
 848
 849    /* Fix up all emitted labels:
 850     */
 851    for (i = 0; i < t->labels_count; i++) {
 852       ureg_fixup_label( ureg,
 853                         t->labels[i].token,
 854                         t->insn[t->labels[i].branch_target] );
 855    }
 856
 857    tokens = ureg_get_tokens( ureg, NULL );
 858    ureg_destroy( ureg );
 859
 860 out:
 861    FREE(t->insn);
 862    FREE(t->labels);
 863    FREE(t->constants);
 864
 865    if (t->error) {
 866       debug_printf("%s: translate error flag set\n", __FUNCTION__);
 867       FREE((void *)tokens);
 868       tokens = NULL;
 869    }
 870
 871    if (!tokens) {
 872       debug_printf("%s: failed to translate Mesa program:\n", __FUNCTION__);
 873       _mesa_print_program(program);
 874       debug_assert(0);
 875    }
 876
 877    return tokens;
 878 }
 879
 880
 881 /**
 882  * Tokens cannot be free with _mesa_free otherwise the builtin gallium
 883  * malloc debugging will get confused.
 884  */
 885 void
 886 st_free_tokens(const struct tgsi_token *tokens)
 887 {
 888    FREE((void *)tokens);
 889 }