97fef65d1cdd1da4ce93f83b5de6f169232134e2
[mesa.git] / src / mesa / state_tracker / st_pbo.c
1 /*
2 * Copyright 2007 VMware, Inc.
3 * Copyright 2016 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 /**
26 * \file
27 *
28 * Common helper functions for PBO up- and downloads.
29 */
30
31 #include "state_tracker/st_context.h"
32 #include "state_tracker/st_pbo.h"
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_defines.h"
36 #include "pipe/p_screen.h"
37 #include "cso_cache/cso_context.h"
38 #include "tgsi/tgsi_ureg.h"
39
40 void *
41 st_pbo_create_vs(struct st_context *st)
42 {
43 struct ureg_program *ureg;
44 struct ureg_src in_pos;
45 struct ureg_src in_instanceid;
46 struct ureg_dst out_pos;
47 struct ureg_dst out_layer;
48
49 ureg = ureg_create(PIPE_SHADER_VERTEX);
50 if (!ureg)
51 return NULL;
52
53 in_pos = ureg_DECL_vs_input(ureg, TGSI_SEMANTIC_POSITION);
54
55 out_pos = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0);
56
57 if (st->pbo.layers) {
58 in_instanceid = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_INSTANCEID, 0);
59
60 if (!st->pbo.use_gs)
61 out_layer = ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0);
62 }
63
64 /* out_pos = in_pos */
65 ureg_MOV(ureg, out_pos, in_pos);
66
67 if (st->pbo.layers) {
68 if (st->pbo.use_gs) {
69 /* out_pos.z = i2f(gl_InstanceID) */
70 ureg_I2F(ureg, ureg_writemask(out_pos, TGSI_WRITEMASK_Z),
71 ureg_scalar(in_instanceid, TGSI_SWIZZLE_X));
72 } else {
73 /* out_layer = gl_InstanceID */
74 ureg_MOV(ureg, out_layer, in_instanceid);
75 }
76 }
77
78 ureg_END(ureg);
79
80 return ureg_create_shader_and_destroy(ureg, st->pipe);
81 }
82
83 void *
84 st_pbo_create_gs(struct st_context *st)
85 {
86 static const int zero = 0;
87 struct ureg_program *ureg;
88 struct ureg_dst out_pos;
89 struct ureg_dst out_layer;
90 struct ureg_src in_pos;
91 struct ureg_src imm;
92 unsigned i;
93
94 ureg = ureg_create(PIPE_SHADER_GEOMETRY);
95 if (!ureg)
96 return NULL;
97
98 ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM, PIPE_PRIM_TRIANGLES);
99 ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM, PIPE_PRIM_TRIANGLE_STRIP);
100 ureg_property(ureg, TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES, 3);
101
102 out_pos = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0);
103 out_layer = ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0);
104
105 in_pos = ureg_DECL_input(ureg, TGSI_SEMANTIC_POSITION, 0, 0, 1);
106
107 imm = ureg_DECL_immediate_int(ureg, &zero, 1);
108
109 for (i = 0; i < 3; ++i) {
110 struct ureg_src in_pos_vertex = ureg_src_dimension(in_pos, i);
111
112 /* out_pos = in_pos[i] */
113 ureg_MOV(ureg, out_pos, in_pos_vertex);
114
115 /* out_layer.x = f2i(in_pos[i].z) */
116 ureg_F2I(ureg, ureg_writemask(out_layer, TGSI_WRITEMASK_X),
117 ureg_scalar(in_pos_vertex, TGSI_SWIZZLE_Z));
118
119 ureg_EMIT(ureg, ureg_scalar(imm, TGSI_SWIZZLE_X));
120 }
121
122 ureg_END(ureg);
123
124 return ureg_create_shader_and_destroy(ureg, st->pipe);
125 }
126
127 void *
128 st_pbo_create_upload_fs(struct st_context *st)
129 {
130 struct pipe_context *pipe = st->pipe;
131 struct pipe_screen *screen = pipe->screen;
132 struct ureg_program *ureg;
133 struct ureg_dst out;
134 struct ureg_src sampler;
135 struct ureg_src pos;
136 struct ureg_src layer;
137 struct ureg_src const0;
138 struct ureg_dst temp0;
139
140 ureg = ureg_create(PIPE_SHADER_FRAGMENT);
141 if (!ureg)
142 return NULL;
143
144 out = ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0);
145 sampler = ureg_DECL_sampler(ureg, 0);
146 if (screen->get_param(screen, PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL)) {
147 pos = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0);
148 } else {
149 pos = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION, 0,
150 TGSI_INTERPOLATE_LINEAR);
151 }
152 if (st->pbo.layers) {
153 layer = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_LAYER, 0,
154 TGSI_INTERPOLATE_CONSTANT);
155 }
156 const0 = ureg_DECL_constant(ureg, 0);
157 temp0 = ureg_DECL_temporary(ureg);
158
159 /* Note: const0 = [ -xoffset + skip_pixels, -yoffset, stride, image_height ] */
160
161 /* temp0.xy = f2i(temp0.xy) */
162 ureg_F2I(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY),
163 ureg_swizzle(pos,
164 TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y,
165 TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y));
166
167 /* temp0.xy = temp0.xy + const0.xy */
168 ureg_UADD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY),
169 ureg_swizzle(ureg_src(temp0),
170 TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y,
171 TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y),
172 ureg_swizzle(const0,
173 TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y,
174 TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y));
175
176 /* temp0.x = const0.z * temp0.y + temp0.x */
177 ureg_UMAD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_X),
178 ureg_scalar(const0, TGSI_SWIZZLE_Z),
179 ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_Y),
180 ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_X));
181
182 if (st->pbo.layers) {
183 /* temp0.x = const0.w * layer + temp0.x */
184 ureg_UMAD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_X),
185 ureg_scalar(const0, TGSI_SWIZZLE_W),
186 ureg_scalar(layer, TGSI_SWIZZLE_X),
187 ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_X));
188 }
189
190 /* temp0.w = 0 */
191 ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_W), ureg_imm1u(ureg, 0));
192
193 /* out = txf(sampler, temp0.x) */
194 ureg_TXF(ureg, out, TGSI_TEXTURE_BUFFER, ureg_src(temp0), sampler);
195
196 ureg_release_temporary(ureg, temp0);
197
198 ureg_END(ureg);
199
200 return ureg_create_shader_and_destroy(ureg, pipe);
201 }
202
203 void
204 st_init_pbo_helpers(struct st_context *st)
205 {
206 struct pipe_context *pipe = st->pipe;
207 struct pipe_screen *screen = pipe->screen;
208
209 st->pbo.upload_enabled =
210 screen->get_param(screen, PIPE_CAP_TEXTURE_BUFFER_OBJECTS) &&
211 screen->get_param(screen, PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT) >= 1 &&
212 screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS);
213 if (!st->pbo.upload_enabled)
214 return;
215
216 st->pbo.rgba_only =
217 screen->get_param(screen, PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY);
218
219 if (screen->get_param(screen, PIPE_CAP_TGSI_INSTANCEID)) {
220 if (screen->get_param(screen, PIPE_CAP_TGSI_VS_LAYER_VIEWPORT)) {
221 st->pbo.layers = true;
222 } else if (screen->get_param(screen, PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES) >= 3) {
223 st->pbo.layers = true;
224 st->pbo.use_gs = true;
225 }
226 }
227
228 /* Blend state */
229 memset(&st->pbo.upload_blend, 0, sizeof(struct pipe_blend_state));
230 st->pbo.upload_blend.rt[0].colormask = PIPE_MASK_RGBA;
231
232 /* Rasterizer state */
233 memset(&st->pbo.raster, 0, sizeof(struct pipe_rasterizer_state));
234 st->pbo.raster.half_pixel_center = 1;
235 }
236
237 void
238 st_destroy_pbo_helpers(struct st_context *st)
239 {
240 if (st->pbo.upload_fs) {
241 cso_delete_fragment_shader(st->cso_context, st->pbo.upload_fs);
242 st->pbo.upload_fs = NULL;
243 }
244
245 if (st->pbo.gs) {
246 cso_delete_geometry_shader(st->cso_context, st->pbo.gs);
247 st->pbo.gs = NULL;
248 }
249
250 if (st->pbo.vs) {
251 cso_delete_vertex_shader(st->cso_context, st->pbo.vs);
252 st->pbo.vs = NULL;
253 }
254 }