3f8d2d110ce8fce5d116d60388d947b7e9f3884d
[mesa.git] / src / mesa / state_tracker / st_shader_cache.c
1 /*
2 * Copyright © 2017 Timothy Arceri
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include "st_debug.h"
26 #include "st_program.h"
27 #include "st_shader_cache.h"
28 #include "compiler/glsl/program.h"
29 #include "compiler/nir/nir.h"
30 #include "compiler/nir/nir_serialize.h"
31 #include "pipe/p_shader_tokens.h"
32 #include "program/ir_to_mesa.h"
33 #include "util/u_memory.h"
34
35 void
36 st_get_program_binary_driver_sha1(struct gl_context *ctx, uint8_t *sha1)
37 {
38 disk_cache_compute_key(ctx->Cache, NULL, 0, sha1);
39 }
40
41 static void
42 write_stream_out_to_cache(struct blob *blob,
43 struct pipe_shader_state *tgsi)
44 {
45 blob_write_bytes(blob, &tgsi->stream_output,
46 sizeof(tgsi->stream_output));
47 }
48
49 static void
50 copy_blob_to_driver_cache_blob(struct blob *blob, struct gl_program *prog)
51 {
52 prog->driver_cache_blob = ralloc_size(NULL, blob->size);
53 memcpy(prog->driver_cache_blob, blob->data, blob->size);
54 prog->driver_cache_blob_size = blob->size;
55 }
56
57 static void
58 write_tgsi_to_cache(struct blob *blob, const struct tgsi_token *tokens,
59 struct gl_program *prog, unsigned num_tokens)
60 {
61 blob_write_uint32(blob, num_tokens);
62 blob_write_bytes(blob, tokens, num_tokens * sizeof(struct tgsi_token));
63 copy_blob_to_driver_cache_blob(blob, prog);
64 }
65
66 static void
67 write_nir_to_cache(struct blob *blob, struct gl_program *prog)
68 {
69 nir_serialize(blob, prog->nir);
70 copy_blob_to_driver_cache_blob(blob, prog);
71 }
72
73 static void
74 st_serialise_ir_program(struct gl_context *ctx, struct gl_program *prog,
75 bool nir)
76 {
77 if (prog->driver_cache_blob)
78 return;
79
80 struct blob blob;
81 blob_init(&blob);
82
83 switch (prog->info.stage) {
84 case MESA_SHADER_VERTEX: {
85 struct st_vertex_program *stvp = (struct st_vertex_program *) prog;
86
87 blob_write_uint32(&blob, stvp->num_inputs);
88 blob_write_bytes(&blob, stvp->index_to_input,
89 sizeof(stvp->index_to_input));
90 blob_write_bytes(&blob, stvp->input_to_index,
91 sizeof(stvp->input_to_index));
92 blob_write_bytes(&blob, stvp->result_to_output,
93 sizeof(stvp->result_to_output));
94
95 write_stream_out_to_cache(&blob, &stvp->tgsi);
96
97 if (nir)
98 write_nir_to_cache(&blob, prog);
99 else
100 write_tgsi_to_cache(&blob, stvp->tgsi.tokens, prog,
101 stvp->num_tgsi_tokens);
102 break;
103 }
104 case MESA_SHADER_TESS_CTRL:
105 case MESA_SHADER_TESS_EVAL:
106 case MESA_SHADER_GEOMETRY: {
107 struct st_common_program *stcp = (struct st_common_program *) prog;
108
109 write_stream_out_to_cache(&blob, &stcp->tgsi);
110
111 if (nir)
112 write_nir_to_cache(&blob, prog);
113 else
114 write_tgsi_to_cache(&blob, stcp->tgsi.tokens, prog,
115 stcp->num_tgsi_tokens);
116 break;
117 }
118 case MESA_SHADER_FRAGMENT: {
119 struct st_fragment_program *stfp = (struct st_fragment_program *) prog;
120
121 if (nir)
122 write_nir_to_cache(&blob, prog);
123 else
124 write_tgsi_to_cache(&blob, stfp->tgsi.tokens, prog,
125 stfp->num_tgsi_tokens);
126 break;
127 }
128 case MESA_SHADER_COMPUTE: {
129 struct st_compute_program *stcp = (struct st_compute_program *) prog;
130
131 if (nir)
132 write_nir_to_cache(&blob, prog);
133 else
134 write_tgsi_to_cache(&blob, stcp->tgsi.prog, prog,
135 stcp->num_tgsi_tokens);
136 break;
137 }
138 default:
139 unreachable("Unsupported stage");
140 }
141
142 blob_finish(&blob);
143 }
144
145 /**
146 * Store tgsi and any other required state in on-disk shader cache.
147 */
148 void
149 st_store_ir_in_disk_cache(struct st_context *st, struct gl_program *prog,
150 bool nir)
151 {
152 if (!st->ctx->Cache)
153 return;
154
155 /* Exit early when we are dealing with a ff shader with no source file to
156 * generate a source from.
157 */
158 static const char zero[sizeof(prog->sh.data->sha1)] = {0};
159 if (memcmp(prog->sh.data->sha1, zero, sizeof(prog->sh.data->sha1)) == 0)
160 return;
161
162 st_serialise_ir_program(st->ctx, prog, nir);
163
164 if (st->ctx->_Shader->Flags & GLSL_CACHE_INFO) {
165 fprintf(stderr, "putting %s state tracker IR in cache\n",
166 _mesa_shader_stage_to_string(prog->info.stage));
167 }
168 }
169
170 static void
171 read_stream_out_from_cache(struct blob_reader *blob_reader,
172 struct pipe_shader_state *tgsi)
173 {
174 blob_copy_bytes(blob_reader, (uint8_t *) &tgsi->stream_output,
175 sizeof(tgsi->stream_output));
176 }
177
178 static void
179 read_tgsi_from_cache(struct blob_reader *blob_reader,
180 const struct tgsi_token **tokens,
181 unsigned *num_tokens)
182 {
183 *num_tokens = blob_read_uint32(blob_reader);
184 unsigned tokens_size = *num_tokens * sizeof(struct tgsi_token);
185 *tokens = (const struct tgsi_token*) MALLOC(tokens_size);
186 blob_copy_bytes(blob_reader, (uint8_t *) *tokens, tokens_size);
187 }
188
189 static void
190 st_deserialise_ir_program(struct gl_context *ctx,
191 struct gl_shader_program *shProg,
192 struct gl_program *prog, bool nir)
193 {
194 struct st_context *st = st_context(ctx);
195 size_t size = prog->driver_cache_blob_size;
196 uint8_t *buffer = (uint8_t *) prog->driver_cache_blob;
197 const struct nir_shader_compiler_options *options =
198 ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
199
200 assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0);
201
202 struct blob_reader blob_reader;
203 blob_reader_init(&blob_reader, buffer, size);
204
205 switch (prog->info.stage) {
206 case MESA_SHADER_VERTEX: {
207 struct st_vertex_program *stvp = (struct st_vertex_program *) prog;
208
209 st_release_vp_variants(st, stvp);
210
211 stvp->num_inputs = blob_read_uint32(&blob_reader);
212 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->index_to_input,
213 sizeof(stvp->index_to_input));
214 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->input_to_index,
215 sizeof(stvp->input_to_index));
216 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->result_to_output,
217 sizeof(stvp->result_to_output));
218
219 read_stream_out_from_cache(&blob_reader, &stvp->tgsi);
220
221 if (nir) {
222 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
223 stvp->shader_program = shProg;
224 stvp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
225 prog->nir = stvp->tgsi.ir.nir;
226 } else {
227 read_tgsi_from_cache(&blob_reader, &stvp->tgsi.tokens,
228 &stvp->num_tgsi_tokens);
229 }
230
231 if (st->vp == stvp)
232 st->dirty |= ST_NEW_VERTEX_PROGRAM(st, stvp);
233
234 break;
235 }
236 case MESA_SHADER_TESS_CTRL: {
237 struct st_common_program *sttcp = st_common_program(prog);
238
239 st_release_basic_variants(st, sttcp->Base.Target,
240 &sttcp->variants, &sttcp->tgsi);
241
242 read_stream_out_from_cache(&blob_reader, &sttcp->tgsi);
243
244 if (nir) {
245 sttcp->tgsi.type = PIPE_SHADER_IR_NIR;
246 sttcp->shader_program = shProg;
247 sttcp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
248 prog->nir = sttcp->tgsi.ir.nir;
249 } else {
250 read_tgsi_from_cache(&blob_reader, &sttcp->tgsi.tokens,
251 &sttcp->num_tgsi_tokens);
252 }
253
254 if (st->tcp == sttcp)
255 st->dirty |= sttcp->affected_states;
256
257 break;
258 }
259 case MESA_SHADER_TESS_EVAL: {
260 struct st_common_program *sttep = st_common_program(prog);
261
262 st_release_basic_variants(st, sttep->Base.Target,
263 &sttep->variants, &sttep->tgsi);
264
265 read_stream_out_from_cache(&blob_reader, &sttep->tgsi);
266
267 if (nir) {
268 sttep->tgsi.type = PIPE_SHADER_IR_NIR;
269 sttep->shader_program = shProg;
270 sttep->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
271 prog->nir = sttep->tgsi.ir.nir;
272 } else {
273 read_tgsi_from_cache(&blob_reader, &sttep->tgsi.tokens,
274 &sttep->num_tgsi_tokens);
275 }
276
277 if (st->tep == sttep)
278 st->dirty |= sttep->affected_states;
279
280 break;
281 }
282 case MESA_SHADER_GEOMETRY: {
283 struct st_common_program *stgp = st_common_program(prog);
284
285 st_release_basic_variants(st, stgp->Base.Target, &stgp->variants,
286 &stgp->tgsi);
287
288 read_stream_out_from_cache(&blob_reader, &stgp->tgsi);
289
290 if (nir) {
291 stgp->tgsi.type = PIPE_SHADER_IR_NIR;
292 stgp->shader_program = shProg;
293 stgp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
294 prog->nir = stgp->tgsi.ir.nir;
295 } else {
296 read_tgsi_from_cache(&blob_reader, &stgp->tgsi.tokens,
297 &stgp->num_tgsi_tokens);
298 }
299
300 if (st->gp == stgp)
301 st->dirty |= stgp->affected_states;
302
303 break;
304 }
305 case MESA_SHADER_FRAGMENT: {
306 struct st_fragment_program *stfp = (struct st_fragment_program *) prog;
307
308 st_release_fp_variants(st, stfp);
309
310 if (nir) {
311 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
312 stfp->shader_program = shProg;
313 stfp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
314 prog->nir = stfp->tgsi.ir.nir;
315 } else {
316 read_tgsi_from_cache(&blob_reader, &stfp->tgsi.tokens,
317 &stfp->num_tgsi_tokens);
318 }
319
320 if (st->fp == stfp)
321 st->dirty |= stfp->affected_states;
322
323 break;
324 }
325 case MESA_SHADER_COMPUTE: {
326 struct st_compute_program *stcp = (struct st_compute_program *) prog;
327
328 st_release_cp_variants(st, stcp);
329
330 if (nir) {
331 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
332 stcp->shader_program = shProg;
333 stcp->tgsi.prog = nir_deserialize(NULL, options, &blob_reader);
334 prog->nir = (nir_shader *) stcp->tgsi.prog;
335 } else {
336 read_tgsi_from_cache(&blob_reader,
337 (const struct tgsi_token**) &stcp->tgsi.prog,
338 &stcp->num_tgsi_tokens);
339 }
340
341 stcp->tgsi.req_local_mem = stcp->Base.info.cs.shared_size;
342 stcp->tgsi.req_private_mem = 0;
343 stcp->tgsi.req_input_mem = 0;
344
345 if (st->cp == stcp)
346 st->dirty |= stcp->affected_states;
347
348 break;
349 }
350 default:
351 unreachable("Unsupported stage");
352 }
353
354 /* Make sure we don't try to read more data than we wrote. This should
355 * never happen in release builds but its useful to have this check to
356 * catch development bugs.
357 */
358 if (blob_reader.current != blob_reader.end || blob_reader.overrun) {
359 assert(!"Invalid TGSI shader disk cache item!");
360
361 if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
362 fprintf(stderr, "Error reading program from cache (invalid "
363 "TGSI cache item)\n");
364 }
365 }
366
367 st_set_prog_affected_state_flags(prog);
368 _mesa_associate_uniform_storage(ctx, shProg, prog, false);
369
370 /* Create Gallium shaders now instead of on demand. */
371 if (ST_DEBUG & DEBUG_PRECOMPILE ||
372 st->shader_has_one_variant[prog->info.stage])
373 st_precompile_shader_variant(st, prog);
374 }
375
376 bool
377 st_load_ir_from_disk_cache(struct gl_context *ctx,
378 struct gl_shader_program *prog,
379 bool nir)
380 {
381 if (!ctx->Cache)
382 return false;
383
384 /* If we didn't load the GLSL metadata from cache then we could not have
385 * loaded the tgsi either.
386 */
387 if (prog->data->LinkStatus != LINKING_SKIPPED)
388 return false;
389
390 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
391 if (prog->_LinkedShaders[i] == NULL)
392 continue;
393
394 struct gl_program *glprog = prog->_LinkedShaders[i]->Program;
395 st_deserialise_ir_program(ctx, prog, glprog, nir);
396
397 /* We don't need the cached blob anymore so free it */
398 ralloc_free(glprog->driver_cache_blob);
399 glprog->driver_cache_blob = NULL;
400 glprog->driver_cache_blob_size = 0;
401
402 if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
403 fprintf(stderr, "%s state tracker IR retrieved from cache\n",
404 _mesa_shader_stage_to_string(i));
405 }
406 }
407
408 return true;
409 }
410
411 void
412 st_serialise_tgsi_program(struct gl_context *ctx, struct gl_program *prog)
413 {
414 st_serialise_ir_program(ctx, prog, false);
415 }
416
417 void
418 st_deserialise_tgsi_program(struct gl_context *ctx,
419 struct gl_shader_program *shProg,
420 struct gl_program *prog)
421 {
422 st_deserialise_ir_program(ctx, shProg, prog, false);
423 }
424
425 void
426 st_serialise_nir_program(struct gl_context *ctx, struct gl_program *prog)
427 {
428 st_serialise_ir_program(ctx, prog, true);
429 }
430
431 void
432 st_deserialise_nir_program(struct gl_context *ctx,
433 struct gl_shader_program *shProg,
434 struct gl_program *prog)
435 {
436 st_deserialise_ir_program(ctx, shProg, prog, true);
437 }