st/mesa: don't store stream output info to shader cache for tess ctrl shaders
[mesa.git] / src / mesa / state_tracker / st_shader_cache.c
1 /*
2 * Copyright © 2017 Timothy Arceri
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include "st_debug.h"
26 #include "st_program.h"
27 #include "st_shader_cache.h"
28 #include "st_util.h"
29 #include "compiler/glsl/program.h"
30 #include "compiler/nir/nir.h"
31 #include "compiler/nir/nir_serialize.h"
32 #include "pipe/p_shader_tokens.h"
33 #include "program/ir_to_mesa.h"
34 #include "util/u_memory.h"
35
36 void
37 st_get_program_binary_driver_sha1(struct gl_context *ctx, uint8_t *sha1)
38 {
39 disk_cache_compute_key(ctx->Cache, NULL, 0, sha1);
40 }
41
42 static void
43 write_stream_out_to_cache(struct blob *blob,
44 struct pipe_shader_state *tgsi)
45 {
46 blob_write_bytes(blob, &tgsi->stream_output,
47 sizeof(tgsi->stream_output));
48 }
49
50 static void
51 copy_blob_to_driver_cache_blob(struct blob *blob, struct gl_program *prog)
52 {
53 prog->driver_cache_blob = ralloc_size(NULL, blob->size);
54 memcpy(prog->driver_cache_blob, blob->data, blob->size);
55 prog->driver_cache_blob_size = blob->size;
56 }
57
58 static void
59 write_tgsi_to_cache(struct blob *blob, const struct tgsi_token *tokens,
60 struct gl_program *prog, unsigned num_tokens)
61 {
62 blob_write_uint32(blob, num_tokens);
63 blob_write_bytes(blob, tokens, num_tokens * sizeof(struct tgsi_token));
64 copy_blob_to_driver_cache_blob(blob, prog);
65 }
66
67 static void
68 write_nir_to_cache(struct blob *blob, struct gl_program *prog)
69 {
70 nir_serialize(blob, prog->nir, false);
71 copy_blob_to_driver_cache_blob(blob, prog);
72 }
73
74 static void
75 st_serialise_ir_program(struct gl_context *ctx, struct gl_program *prog,
76 bool nir)
77 {
78 if (prog->driver_cache_blob)
79 return;
80
81 struct blob blob;
82 blob_init(&blob);
83
84 switch (prog->info.stage) {
85 case MESA_SHADER_VERTEX: {
86 struct st_vertex_program *stvp = (struct st_vertex_program *) prog;
87
88 blob_write_uint32(&blob, stvp->num_inputs);
89 blob_write_bytes(&blob, stvp->index_to_input,
90 sizeof(stvp->index_to_input));
91 blob_write_bytes(&blob, stvp->input_to_index,
92 sizeof(stvp->input_to_index));
93 blob_write_bytes(&blob, stvp->result_to_output,
94 sizeof(stvp->result_to_output));
95
96 write_stream_out_to_cache(&blob, &stvp->tgsi);
97
98 if (nir)
99 write_nir_to_cache(&blob, prog);
100 else
101 write_tgsi_to_cache(&blob, stvp->tgsi.tokens, prog,
102 stvp->num_tgsi_tokens);
103 break;
104 }
105 case MESA_SHADER_TESS_CTRL:
106 case MESA_SHADER_TESS_EVAL:
107 case MESA_SHADER_GEOMETRY: {
108 struct st_common_program *stcp = (struct st_common_program *) prog;
109
110 if (prog->info.stage == MESA_SHADER_TESS_EVAL ||
111 prog->info.stage == MESA_SHADER_GEOMETRY)
112 write_stream_out_to_cache(&blob, &stcp->tgsi);
113
114 if (nir)
115 write_nir_to_cache(&blob, prog);
116 else
117 write_tgsi_to_cache(&blob, stcp->tgsi.tokens, prog,
118 stcp->num_tgsi_tokens);
119 break;
120 }
121 case MESA_SHADER_FRAGMENT: {
122 struct st_fragment_program *stfp = (struct st_fragment_program *) prog;
123
124 if (nir)
125 write_nir_to_cache(&blob, prog);
126 else
127 write_tgsi_to_cache(&blob, stfp->tgsi.tokens, prog,
128 stfp->num_tgsi_tokens);
129 break;
130 }
131 case MESA_SHADER_COMPUTE: {
132 struct st_compute_program *stcp = (struct st_compute_program *) prog;
133
134 if (nir)
135 write_nir_to_cache(&blob, prog);
136 else
137 write_tgsi_to_cache(&blob, stcp->tgsi.prog, prog,
138 stcp->num_tgsi_tokens);
139 break;
140 }
141 default:
142 unreachable("Unsupported stage");
143 }
144
145 blob_finish(&blob);
146 }
147
148 /**
149 * Store tgsi and any other required state in on-disk shader cache.
150 */
151 void
152 st_store_ir_in_disk_cache(struct st_context *st, struct gl_program *prog,
153 bool nir)
154 {
155 if (!st->ctx->Cache)
156 return;
157
158 /* Exit early when we are dealing with a ff shader with no source file to
159 * generate a source from.
160 */
161 static const char zero[sizeof(prog->sh.data->sha1)] = {0};
162 if (memcmp(prog->sh.data->sha1, zero, sizeof(prog->sh.data->sha1)) == 0)
163 return;
164
165 st_serialise_ir_program(st->ctx, prog, nir);
166
167 if (st->ctx->_Shader->Flags & GLSL_CACHE_INFO) {
168 fprintf(stderr, "putting %s state tracker IR in cache\n",
169 _mesa_shader_stage_to_string(prog->info.stage));
170 }
171 }
172
173 static void
174 read_stream_out_from_cache(struct blob_reader *blob_reader,
175 struct pipe_shader_state *tgsi)
176 {
177 blob_copy_bytes(blob_reader, (uint8_t *) &tgsi->stream_output,
178 sizeof(tgsi->stream_output));
179 }
180
181 static void
182 read_tgsi_from_cache(struct blob_reader *blob_reader,
183 const struct tgsi_token **tokens,
184 unsigned *num_tokens)
185 {
186 *num_tokens = blob_read_uint32(blob_reader);
187 unsigned tokens_size = *num_tokens * sizeof(struct tgsi_token);
188 *tokens = (const struct tgsi_token*) MALLOC(tokens_size);
189 blob_copy_bytes(blob_reader, (uint8_t *) *tokens, tokens_size);
190 }
191
192 static void
193 st_deserialise_ir_program(struct gl_context *ctx,
194 struct gl_shader_program *shProg,
195 struct gl_program *prog, bool nir)
196 {
197 struct st_context *st = st_context(ctx);
198 size_t size = prog->driver_cache_blob_size;
199 uint8_t *buffer = (uint8_t *) prog->driver_cache_blob;
200 const struct nir_shader_compiler_options *options =
201 ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
202
203 assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0);
204
205 struct blob_reader blob_reader;
206 blob_reader_init(&blob_reader, buffer, size);
207
208 switch (prog->info.stage) {
209 case MESA_SHADER_VERTEX: {
210 struct st_vertex_program *stvp = (struct st_vertex_program *) prog;
211
212 st_release_vp_variants(st, stvp);
213
214 stvp->num_inputs = blob_read_uint32(&blob_reader);
215 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->index_to_input,
216 sizeof(stvp->index_to_input));
217 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->input_to_index,
218 sizeof(stvp->input_to_index));
219 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->result_to_output,
220 sizeof(stvp->result_to_output));
221
222 read_stream_out_from_cache(&blob_reader, &stvp->tgsi);
223
224 if (nir) {
225 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
226 stvp->shader_program = shProg;
227 stvp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
228 prog->nir = stvp->tgsi.ir.nir;
229 } else {
230 read_tgsi_from_cache(&blob_reader, &stvp->tgsi.tokens,
231 &stvp->num_tgsi_tokens);
232 }
233
234 if (st->vp == stvp)
235 st->dirty |= ST_NEW_VERTEX_PROGRAM(st, stvp);
236
237 break;
238 }
239 case MESA_SHADER_TESS_CTRL: {
240 struct st_common_program *sttcp = st_common_program(prog);
241
242 st_release_basic_variants(st, sttcp);
243
244 if (nir) {
245 sttcp->tgsi.type = PIPE_SHADER_IR_NIR;
246 sttcp->shader_program = shProg;
247 sttcp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
248 prog->nir = sttcp->tgsi.ir.nir;
249 } else {
250 read_tgsi_from_cache(&blob_reader, &sttcp->tgsi.tokens,
251 &sttcp->num_tgsi_tokens);
252 }
253
254 if (st->tcp == sttcp)
255 st->dirty |= sttcp->affected_states;
256
257 break;
258 }
259 case MESA_SHADER_TESS_EVAL: {
260 struct st_common_program *sttep = st_common_program(prog);
261
262 st_release_basic_variants(st, sttep);
263 read_stream_out_from_cache(&blob_reader, &sttep->tgsi);
264
265 if (nir) {
266 sttep->tgsi.type = PIPE_SHADER_IR_NIR;
267 sttep->shader_program = shProg;
268 sttep->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
269 prog->nir = sttep->tgsi.ir.nir;
270 } else {
271 read_tgsi_from_cache(&blob_reader, &sttep->tgsi.tokens,
272 &sttep->num_tgsi_tokens);
273 }
274
275 if (st->tep == sttep)
276 st->dirty |= sttep->affected_states;
277
278 break;
279 }
280 case MESA_SHADER_GEOMETRY: {
281 struct st_common_program *stgp = st_common_program(prog);
282
283 st_release_basic_variants(st, stgp);
284 read_stream_out_from_cache(&blob_reader, &stgp->tgsi);
285
286 if (nir) {
287 stgp->tgsi.type = PIPE_SHADER_IR_NIR;
288 stgp->shader_program = shProg;
289 stgp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
290 prog->nir = stgp->tgsi.ir.nir;
291 } else {
292 read_tgsi_from_cache(&blob_reader, &stgp->tgsi.tokens,
293 &stgp->num_tgsi_tokens);
294 }
295
296 if (st->gp == stgp)
297 st->dirty |= stgp->affected_states;
298
299 break;
300 }
301 case MESA_SHADER_FRAGMENT: {
302 struct st_fragment_program *stfp = (struct st_fragment_program *) prog;
303
304 st_release_fp_variants(st, stfp);
305
306 if (nir) {
307 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
308 stfp->shader_program = shProg;
309 stfp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
310 prog->nir = stfp->tgsi.ir.nir;
311 } else {
312 read_tgsi_from_cache(&blob_reader, &stfp->tgsi.tokens,
313 &stfp->num_tgsi_tokens);
314 }
315
316 if (st->fp == stfp)
317 st->dirty |= stfp->affected_states;
318
319 break;
320 }
321 case MESA_SHADER_COMPUTE: {
322 struct st_compute_program *stcp = (struct st_compute_program *) prog;
323
324 st_release_cp_variants(st, stcp);
325
326 if (nir) {
327 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
328 stcp->shader_program = shProg;
329 stcp->tgsi.prog = nir_deserialize(NULL, options, &blob_reader);
330 prog->nir = (nir_shader *) stcp->tgsi.prog;
331 } else {
332 read_tgsi_from_cache(&blob_reader,
333 (const struct tgsi_token**) &stcp->tgsi.prog,
334 &stcp->num_tgsi_tokens);
335 }
336
337 stcp->tgsi.req_local_mem = stcp->Base.info.cs.shared_size;
338 stcp->tgsi.req_private_mem = 0;
339 stcp->tgsi.req_input_mem = 0;
340
341 if (st->cp == stcp)
342 st->dirty |= stcp->affected_states;
343
344 break;
345 }
346 default:
347 unreachable("Unsupported stage");
348 }
349
350 /* Make sure we don't try to read more data than we wrote. This should
351 * never happen in release builds but its useful to have this check to
352 * catch development bugs.
353 */
354 if (blob_reader.current != blob_reader.end || blob_reader.overrun) {
355 assert(!"Invalid TGSI shader disk cache item!");
356
357 if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
358 fprintf(stderr, "Error reading program from cache (invalid "
359 "TGSI cache item)\n");
360 }
361 }
362
363 st_set_prog_affected_state_flags(prog);
364 _mesa_associate_uniform_storage(ctx, shProg, prog);
365
366 /* Create Gallium shaders now instead of on demand. */
367 if (ST_DEBUG & DEBUG_PRECOMPILE ||
368 st->shader_has_one_variant[prog->info.stage])
369 st_precompile_shader_variant(st, prog);
370 }
371
372 bool
373 st_load_ir_from_disk_cache(struct gl_context *ctx,
374 struct gl_shader_program *prog,
375 bool nir)
376 {
377 if (!ctx->Cache)
378 return false;
379
380 /* If we didn't load the GLSL metadata from cache then we could not have
381 * loaded the tgsi either.
382 */
383 if (prog->data->LinkStatus != LINKING_SKIPPED)
384 return false;
385
386 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
387 if (prog->_LinkedShaders[i] == NULL)
388 continue;
389
390 struct gl_program *glprog = prog->_LinkedShaders[i]->Program;
391 st_deserialise_ir_program(ctx, prog, glprog, nir);
392
393 /* We don't need the cached blob anymore so free it */
394 ralloc_free(glprog->driver_cache_blob);
395 glprog->driver_cache_blob = NULL;
396 glprog->driver_cache_blob_size = 0;
397
398 if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
399 fprintf(stderr, "%s state tracker IR retrieved from cache\n",
400 _mesa_shader_stage_to_string(i));
401 }
402 }
403
404 return true;
405 }
406
407 void
408 st_serialise_tgsi_program(struct gl_context *ctx, struct gl_program *prog)
409 {
410 st_serialise_ir_program(ctx, prog, false);
411 }
412
413 void
414 st_serialise_tgsi_program_binary(struct gl_context *ctx,
415 struct gl_shader_program *shProg,
416 struct gl_program *prog)
417 {
418 st_serialise_ir_program(ctx, prog, false);
419 }
420
421 void
422 st_deserialise_tgsi_program(struct gl_context *ctx,
423 struct gl_shader_program *shProg,
424 struct gl_program *prog)
425 {
426 st_deserialise_ir_program(ctx, shProg, prog, false);
427 }
428
429 void
430 st_serialise_nir_program(struct gl_context *ctx, struct gl_program *prog)
431 {
432 st_serialise_ir_program(ctx, prog, true);
433 }
434
435 void
436 st_serialise_nir_program_binary(struct gl_context *ctx,
437 struct gl_shader_program *shProg,
438 struct gl_program *prog)
439 {
440 st_serialise_ir_program(ctx, prog, true);
441 }
442
443 void
444 st_deserialise_nir_program(struct gl_context *ctx,
445 struct gl_shader_program *shProg,
446 struct gl_program *prog)
447 {
448 st_deserialise_ir_program(ctx, shProg, prog, true);
449 }