st/shader_cache: copy nir pointer to gl_program after deserializing
[mesa.git] / src / mesa / state_tracker / st_shader_cache.c
1 /*
2 * Copyright © 2017 Timothy Arceri
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include "st_debug.h"
26 #include "st_program.h"
27 #include "st_shader_cache.h"
28 #include "compiler/glsl/program.h"
29 #include "compiler/nir/nir.h"
30 #include "compiler/nir/nir_serialize.h"
31 #include "pipe/p_shader_tokens.h"
32 #include "program/ir_to_mesa.h"
33 #include "util/u_memory.h"
34
35 void
36 st_get_program_binary_driver_sha1(struct gl_context *ctx, uint8_t *sha1)
37 {
38 disk_cache_compute_key(ctx->Cache, NULL, 0, sha1);
39 }
40
41 static void
42 write_stream_out_to_cache(struct blob *blob,
43 struct pipe_shader_state *tgsi)
44 {
45 blob_write_bytes(blob, &tgsi->stream_output,
46 sizeof(tgsi->stream_output));
47 }
48
49 static void
50 copy_blob_to_driver_cache_blob(struct blob *blob, struct gl_program *prog)
51 {
52 prog->driver_cache_blob = ralloc_size(NULL, blob->size);
53 memcpy(prog->driver_cache_blob, blob->data, blob->size);
54 prog->driver_cache_blob_size = blob->size;
55 }
56
57 static void
58 write_tgsi_to_cache(struct blob *blob, const struct tgsi_token *tokens,
59 struct gl_program *prog, unsigned num_tokens)
60 {
61 blob_write_uint32(blob, num_tokens);
62 blob_write_bytes(blob, tokens, num_tokens * sizeof(struct tgsi_token));
63 copy_blob_to_driver_cache_blob(blob, prog);
64 }
65
66 static void
67 write_nir_to_cache(struct blob *blob, struct gl_program *prog)
68 {
69 nir_serialize(blob, prog->nir);
70 copy_blob_to_driver_cache_blob(blob, prog);
71 }
72
73 static void
74 st_serialise_ir_program(struct gl_context *ctx, struct gl_program *prog,
75 bool nir)
76 {
77 struct blob blob;
78 blob_init(&blob);
79
80 switch (prog->info.stage) {
81 case MESA_SHADER_VERTEX: {
82 struct st_vertex_program *stvp = (struct st_vertex_program *) prog;
83
84 blob_write_uint32(&blob, stvp->num_inputs);
85 blob_write_bytes(&blob, stvp->index_to_input,
86 sizeof(stvp->index_to_input));
87 blob_write_bytes(&blob, stvp->result_to_output,
88 sizeof(stvp->result_to_output));
89
90 write_stream_out_to_cache(&blob, &stvp->tgsi);
91
92 if (nir)
93 write_nir_to_cache(&blob, prog);
94 else
95 write_tgsi_to_cache(&blob, stvp->tgsi.tokens, prog,
96 stvp->num_tgsi_tokens);
97 break;
98 }
99 case MESA_SHADER_TESS_CTRL:
100 case MESA_SHADER_TESS_EVAL:
101 case MESA_SHADER_GEOMETRY: {
102 struct st_common_program *stcp = (struct st_common_program *) prog;
103
104 write_stream_out_to_cache(&blob, &stcp->tgsi);
105
106 if (nir)
107 write_nir_to_cache(&blob, prog);
108 else
109 write_tgsi_to_cache(&blob, stcp->tgsi.tokens, prog,
110 stcp->num_tgsi_tokens);
111 break;
112 }
113 case MESA_SHADER_FRAGMENT: {
114 struct st_fragment_program *stfp = (struct st_fragment_program *) prog;
115
116 if (nir)
117 write_nir_to_cache(&blob, prog);
118 else
119 write_tgsi_to_cache(&blob, stfp->tgsi.tokens, prog,
120 stfp->num_tgsi_tokens);
121 break;
122 }
123 case MESA_SHADER_COMPUTE: {
124 struct st_compute_program *stcp = (struct st_compute_program *) prog;
125
126 if (nir)
127 write_nir_to_cache(&blob, prog);
128 else
129 write_tgsi_to_cache(&blob, stcp->tgsi.prog, prog,
130 stcp->num_tgsi_tokens);
131 break;
132 }
133 default:
134 unreachable("Unsupported stage");
135 }
136
137 blob_finish(&blob);
138 }
139
140 /**
141 * Store tgsi and any other required state in on-disk shader cache.
142 */
143 void
144 st_store_ir_in_disk_cache(struct st_context *st, struct gl_program *prog,
145 bool nir)
146 {
147 if (!st->ctx->Cache)
148 return;
149
150 /* Exit early when we are dealing with a ff shader with no source file to
151 * generate a source from.
152 */
153 static const char zero[sizeof(prog->sh.data->sha1)] = {0};
154 if (memcmp(prog->sh.data->sha1, zero, sizeof(prog->sh.data->sha1)) == 0)
155 return;
156
157 st_serialise_ir_program(st->ctx, prog, nir);
158
159 if (st->ctx->_Shader->Flags & GLSL_CACHE_INFO) {
160 fprintf(stderr, "putting %s state tracker IR in cache\n",
161 _mesa_shader_stage_to_string(prog->info.stage));
162 }
163 }
164
165 static void
166 read_stream_out_from_cache(struct blob_reader *blob_reader,
167 struct pipe_shader_state *tgsi)
168 {
169 blob_copy_bytes(blob_reader, (uint8_t *) &tgsi->stream_output,
170 sizeof(tgsi->stream_output));
171 }
172
173 static void
174 read_tgsi_from_cache(struct blob_reader *blob_reader,
175 const struct tgsi_token **tokens,
176 unsigned *num_tokens)
177 {
178 *num_tokens = blob_read_uint32(blob_reader);
179 unsigned tokens_size = *num_tokens * sizeof(struct tgsi_token);
180 *tokens = (const struct tgsi_token*) MALLOC(tokens_size);
181 blob_copy_bytes(blob_reader, (uint8_t *) *tokens, tokens_size);
182 }
183
184 static void
185 st_deserialise_ir_program(struct gl_context *ctx,
186 struct gl_shader_program *shProg,
187 struct gl_program *prog, bool nir)
188 {
189 struct st_context *st = st_context(ctx);
190 size_t size = prog->driver_cache_blob_size;
191 uint8_t *buffer = (uint8_t *) prog->driver_cache_blob;
192 const struct nir_shader_compiler_options *options =
193 ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
194
195 assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0);
196
197 struct blob_reader blob_reader;
198 blob_reader_init(&blob_reader, buffer, size);
199
200 switch (prog->info.stage) {
201 case MESA_SHADER_VERTEX: {
202 struct st_vertex_program *stvp = (struct st_vertex_program *) prog;
203
204 st_release_vp_variants(st, stvp);
205
206 stvp->num_inputs = blob_read_uint32(&blob_reader);
207 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->index_to_input,
208 sizeof(stvp->index_to_input));
209 blob_copy_bytes(&blob_reader, (uint8_t *) stvp->result_to_output,
210 sizeof(stvp->result_to_output));
211
212 read_stream_out_from_cache(&blob_reader, &stvp->tgsi);
213
214 if (nir) {
215 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
216 stvp->shader_program = shProg;
217 stvp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
218 prog->nir = stvp->tgsi.ir.nir;
219 } else {
220 read_tgsi_from_cache(&blob_reader, &stvp->tgsi.tokens,
221 &stvp->num_tgsi_tokens);
222 }
223
224 if (st->vp == stvp)
225 st->dirty |= ST_NEW_VERTEX_PROGRAM(st, stvp);
226
227 break;
228 }
229 case MESA_SHADER_TESS_CTRL: {
230 struct st_common_program *sttcp = st_common_program(prog);
231
232 st_release_basic_variants(st, sttcp->Base.Target,
233 &sttcp->variants, &sttcp->tgsi);
234
235 read_stream_out_from_cache(&blob_reader, &sttcp->tgsi);
236
237 if (nir) {
238 sttcp->tgsi.type = PIPE_SHADER_IR_NIR;
239 sttcp->shader_program = shProg;
240 sttcp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
241 prog->nir = sttcp->tgsi.ir.nir;
242 } else {
243 read_tgsi_from_cache(&blob_reader, &sttcp->tgsi.tokens,
244 &sttcp->num_tgsi_tokens);
245 }
246
247 if (st->tcp == sttcp)
248 st->dirty |= sttcp->affected_states;
249
250 break;
251 }
252 case MESA_SHADER_TESS_EVAL: {
253 struct st_common_program *sttep = st_common_program(prog);
254
255 st_release_basic_variants(st, sttep->Base.Target,
256 &sttep->variants, &sttep->tgsi);
257
258 read_stream_out_from_cache(&blob_reader, &sttep->tgsi);
259
260 if (nir) {
261 sttep->tgsi.type = PIPE_SHADER_IR_NIR;
262 sttep->shader_program = shProg;
263 sttep->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
264 prog->nir = sttep->tgsi.ir.nir;
265 } else {
266 read_tgsi_from_cache(&blob_reader, &sttep->tgsi.tokens,
267 &sttep->num_tgsi_tokens);
268 }
269
270 if (st->tep == sttep)
271 st->dirty |= sttep->affected_states;
272
273 break;
274 }
275 case MESA_SHADER_GEOMETRY: {
276 struct st_common_program *stgp = st_common_program(prog);
277
278 st_release_basic_variants(st, stgp->Base.Target, &stgp->variants,
279 &stgp->tgsi);
280
281 read_stream_out_from_cache(&blob_reader, &stgp->tgsi);
282
283 if (nir) {
284 stgp->tgsi.type = PIPE_SHADER_IR_NIR;
285 stgp->shader_program = shProg;
286 stgp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
287 prog->nir = stgp->tgsi.ir.nir;
288 } else {
289 read_tgsi_from_cache(&blob_reader, &stgp->tgsi.tokens,
290 &stgp->num_tgsi_tokens);
291 }
292
293 if (st->gp == stgp)
294 st->dirty |= stgp->affected_states;
295
296 break;
297 }
298 case MESA_SHADER_FRAGMENT: {
299 struct st_fragment_program *stfp = (struct st_fragment_program *) prog;
300
301 st_release_fp_variants(st, stfp);
302
303 if (nir) {
304 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
305 stfp->shader_program = shProg;
306 stfp->tgsi.ir.nir = nir_deserialize(NULL, options, &blob_reader);
307 prog->nir = stfp->tgsi.ir.nir;
308 } else {
309 read_tgsi_from_cache(&blob_reader, &stfp->tgsi.tokens,
310 &stfp->num_tgsi_tokens);
311 }
312
313 if (st->fp == stfp)
314 st->dirty |= stfp->affected_states;
315
316 break;
317 }
318 case MESA_SHADER_COMPUTE: {
319 struct st_compute_program *stcp = (struct st_compute_program *) prog;
320
321 st_release_cp_variants(st, stcp);
322
323 if (nir) {
324 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
325 stcp->shader_program = shProg;
326 stcp->tgsi.prog = nir_deserialize(NULL, options, &blob_reader);
327 prog->nir = (nir_shader *) stcp->tgsi.prog;
328 } else {
329 read_tgsi_from_cache(&blob_reader,
330 (const struct tgsi_token**) &stcp->tgsi.prog,
331 &stcp->num_tgsi_tokens);
332 }
333
334 stcp->tgsi.req_local_mem = stcp->Base.info.cs.shared_size;
335 stcp->tgsi.req_private_mem = 0;
336 stcp->tgsi.req_input_mem = 0;
337
338 if (st->cp == stcp)
339 st->dirty |= stcp->affected_states;
340
341 break;
342 }
343 default:
344 unreachable("Unsupported stage");
345 }
346
347 /* Make sure we don't try to read more data than we wrote. This should
348 * never happen in release builds but its useful to have this check to
349 * catch development bugs.
350 */
351 if (blob_reader.current != blob_reader.end || blob_reader.overrun) {
352 assert(!"Invalid TGSI shader disk cache item!");
353
354 if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
355 fprintf(stderr, "Error reading program from cache (invalid "
356 "TGSI cache item)\n");
357 }
358 }
359
360 st_set_prog_affected_state_flags(prog);
361 _mesa_associate_uniform_storage(ctx, shProg, prog, false);
362
363 /* Create Gallium shaders now instead of on demand. */
364 if (ST_DEBUG & DEBUG_PRECOMPILE ||
365 st->shader_has_one_variant[prog->info.stage])
366 st_precompile_shader_variant(st, prog);
367 }
368
369 bool
370 st_load_ir_from_disk_cache(struct gl_context *ctx,
371 struct gl_shader_program *prog,
372 bool nir)
373 {
374 if (!ctx->Cache)
375 return false;
376
377 /* If we didn't load the GLSL metadata from cache then we could not have
378 * loaded the tgsi either.
379 */
380 if (prog->data->LinkStatus != LINKING_SKIPPED)
381 return false;
382
383 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
384 if (prog->_LinkedShaders[i] == NULL)
385 continue;
386
387 struct gl_program *glprog = prog->_LinkedShaders[i]->Program;
388 st_deserialise_ir_program(ctx, prog, glprog, nir);
389
390 /* We don't need the cached blob anymore so free it */
391 ralloc_free(glprog->driver_cache_blob);
392 glprog->driver_cache_blob = NULL;
393 glprog->driver_cache_blob_size = 0;
394
395 if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
396 fprintf(stderr, "%s state tracker IR retrieved from cache\n",
397 _mesa_shader_stage_to_string(i));
398 }
399 }
400
401 return true;
402 }
403
404 void
405 st_serialise_tgsi_program(struct gl_context *ctx, struct gl_program *prog)
406 {
407 st_serialise_ir_program(ctx, prog, false);
408 }
409
410 void
411 st_deserialise_tgsi_program(struct gl_context *ctx,
412 struct gl_shader_program *shProg,
413 struct gl_program *prog)
414 {
415 st_deserialise_ir_program(ctx, shProg, prog, false);
416 }
417
418 void
419 st_serialise_nir_program(struct gl_context *ctx, struct gl_program *prog)
420 {
421 st_serialise_ir_program(ctx, prog, true);
422 }
423
424 void
425 st_deserialise_nir_program(struct gl_context *ctx,
426 struct gl_shader_program *shProg,
427 struct gl_program *prog)
428 {
429 st_deserialise_ir_program(ctx, shProg, prog, true);
430 }