src/mesa/x86/common_x86.c

   1 /* $Id: common_x86.c,v 1.19 2002/07/11 15:33:02 brianp Exp $ */
   2
   3 /*
   4  * Mesa 3-D graphics library
   5  * Version:  3.5
   6  *
   7  * Copyright (C) 1999-2001  Brian Paul   All Rights Reserved.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included
  17  * in all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  23  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  24  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  */
  26
  27 /*
  28  * Check CPU capabilities & initialize optimized funtions for this particular
  29  * processor.
  30  *
  31  * Written by Holger Waechtler <holger@akaflieg.extern.tu-berlin.de>
  32  * Changed by Andre Werthmann <wertmann@cs.uni-potsdam.de> for using the
  33  * new Katmai functions.
  34  */
  35
  36 #include <stdlib.h>
  37 #include <stdio.h>
  38 #if defined(USE_SSE_ASM) && defined(__linux__)
  39 #include <signal.h>
  40 #endif
  41 #if defined(USE_SSE_ASM) && defined(__FreeBSD__)
  42 #include <sys/types.h>
  43 #include <sys/sysctl.h>
  44 #endif
  45
  46 #include "context.h"
  47 #include "common_x86_asm.h"
  48
  49
  50 int _mesa_x86_cpu_features = 0;
  51
  52 /* No reason for this to be public.
  53  */
  54 extern int _mesa_identify_x86_cpu_features( void );
  55
  56
  57 static void message( const char *msg )
  58 {
  59    GLboolean debug;
  60 #ifdef DEBUG
  61    debug = GL_TRUE;
  62 #else
  63    if ( getenv( "MESA_DEBUG" ) ) {
  64       debug = GL_TRUE;
  65    } else {
  66       debug = GL_FALSE;
  67    }
  68 #endif
  69    if ( debug ) {
  70       fprintf( stderr, "%s", msg );
  71    }
  72 }
  73
  74 #if defined(USE_SSE_ASM)
  75 /*
  76  * We must verify that the Streaming SIMD Extensions are truly supported
  77  * on this processor before we go ahead and hook out the optimized code.
  78  * Unfortunately, the CPUID bit isn't enough, as the OS must set the
  79  * OSFXSR bit in CR4 if it supports the extended FPU save and restore
  80  * required to use SSE.  Unfortunately, we can't just go ahead and read
  81  * this register, as only the kernel can do that.  Similarly, we must
  82  * verify that the OSXMMEXCPT bit in CR4 has been set by the OS,
  83  * signifying that it supports unmasked SIMD FPU exceptions.  If we take
  84  * an unmasked exception and the OS doesn't correctly support them, the
  85  * best we'll get is a SIGILL and the worst we'll get is an infinite
  86  * loop in the signal delivery from the kernel as we can't interact with
  87  * the SIMD FPU state to clear the exception bits.  Either way, this is
  88  * not good.
  89  */
  90
  91 extern void _mesa_test_os_sse_support( void );
  92 extern void _mesa_test_os_sse_exception_support( void );
  93
  94 #if defined(__linux__) && defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
  95 static void sigill_handler( int signal, struct sigcontext sc )
  96 {
  97    message( "SIGILL, " );
  98
  99    /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
 100     * instructions are 3 bytes long.  We must increment the instruction
 101     * pointer manually to avoid repeated execution of the offending
 102     * instruction.
 103     *
 104     * If the SIGILL is caused by a divide-by-zero when unmasked
 105     * exceptions aren't supported, the SIMD FPU status and control
 106     * word will be restored at the end of the test, so we don't need
 107     * to worry about doing it here.  Besides, we may not be able to...
 108     */
 109    sc.eip += 3;
 110
 111    _mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
 112 }
 113
 114 static void sigfpe_handler( int signal, struct sigcontext sc )
 115 {
 116    message( "SIGFPE, " );
 117
 118    if ( sc.fpstate->magic != 0xffff ) {
 119       /* Our signal context has the extended FPU state, so reset the
 120        * divide-by-zero exception mask and clear the divide-by-zero
 121        * exception bit.
 122        */
 123       sc.fpstate->mxcsr |= 0x00000200;
 124       sc.fpstate->mxcsr &= 0xfffffffb;
 125    } else {
 126       /* If we ever get here, we're completely hosed.
 127        */
 128       message( "\n\n" );
 129       _mesa_problem( NULL, "SSE enabling test failed badly!" );
 130    }
 131 }
 132 #endif /* __linux__ && _POSIX_SOURCE && X86_FXSR_MAGIC */
 133
 134 /* If we're running on a processor that can do SSE, let's see if we
 135  * are allowed to or not.  This will catch 2.4.0 or later kernels that
 136  * haven't been configured for a Pentium III but are running on one,
 137  * and RedHat patched 2.2 kernels that have broken exception handling
 138  * support for user space apps that do SSE.
 139  *
 140  * GH: Isn't this just awful?
 141  */
 142 static void check_os_sse_support( void )
 143 {
 144 #if defined(__linux__)
 145 #if defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
 146    struct sigaction saved_sigill;
 147    struct sigaction saved_sigfpe;
 148
 149    /* Save the original signal handlers.
 150     */
 151    sigaction( SIGILL, NULL, &saved_sigill );
 152    sigaction( SIGFPE, NULL, &saved_sigfpe );
 153
 154    signal( SIGILL, (void (*)(int))sigill_handler );
 155    signal( SIGFPE, (void (*)(int))sigfpe_handler );
 156
 157    /* Emulate test for OSFXSR in CR4.  The OS will set this bit if it
 158     * supports the extended FPU save and restore required for SSE.  If
 159     * we execute an SSE instruction on a PIII and get a SIGILL, the OS
 160     * doesn't support Streaming SIMD Exceptions, even if the processor
 161     * does.
 162     */
 163    if ( cpu_has_xmm ) {
 164       message( "Testing OS support for SSE... " );
 165
 166       _mesa_test_os_sse_support();
 167
 168       if ( cpu_has_xmm ) {
 169          message( "yes.\n" );
 170       } else {
 171          message( "no!\n" );
 172       }
 173    }
 174
 175    /* Emulate test for OSXMMEXCPT in CR4.  The OS will set this bit if
 176     * it supports unmasked SIMD FPU exceptions.  If we unmask the
 177     * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
 178     * doesn't support unmasked SIMD FPU exceptions.  If we get a SIGFPE
 179     * as expected, we're okay but we need to clean up after it.
 180     *
 181     * Are we being too stringent in our requirement that the OS support
 182     * unmasked exceptions?  Certain RedHat 2.2 kernels enable SSE by
 183     * setting CR4.OSFXSR but don't support unmasked exceptions.  Win98
 184     * doesn't even support them.  We at least know the user-space SSE
 185     * support is good in kernels that do support unmasked exceptions,
 186     * and therefore to be safe I'm going to leave this test in here.
 187     */
 188    if ( cpu_has_xmm ) {
 189       message( "Testing OS support for SSE unmasked exceptions... " );
 190
 191       _mesa_test_os_sse_exception_support();
 192
 193       if ( cpu_has_xmm ) {
 194          message( "yes.\n" );
 195       } else {
 196          message( "no!\n" );
 197       }
 198    }
 199
 200    /* Restore the original signal handlers.
 201     */
 202    sigaction( SIGILL, &saved_sigill, NULL );
 203    sigaction( SIGFPE, &saved_sigfpe, NULL );
 204
 205    /* If we've gotten to here and the XMM CPUID bit is still set, we're
 206     * safe to go ahead and hook out the SSE code throughout Mesa.
 207     */
 208    if ( cpu_has_xmm ) {
 209       message( "Tests of OS support for SSE passed.\n" );
 210    } else {
 211       message( "Tests of OS support for SSE failed!\n" );
 212    }
 213 #else
 214    /* We can't use POSIX signal handling to test the availability of
 215     * SSE, so we disable it by default.
 216     */
 217    message( "Cannot test OS support for SSE, disabling to be safe.\n" );
 218    _mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
 219 #endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */
 220 #elif defined(__FreeBSD__)
 221    {
 222       int ret, len, enabled;
 223       len = sizeof(enabled);
 224       ret = sysctlbyname("hw.instruction_sse", &enabled, &len, NULL, 0);
 225       if (ret || !enabled)
 226          _mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
 227    }
 228 #else
 229    /* Do nothing on other platforms for now.
 230     */
 231    message( "Not testing OS support for SSE, leaving enabled.\n" );
 232 #endif /* __linux__ */
 233 }
 234
 235 #endif /* USE_SSE_ASM */
 236
 237
 238 void _mesa_init_all_x86_transform_asm( void )
 239 {
 240    (void) message; /* silence warning */
 241 #ifdef USE_X86_ASM
 242    _mesa_x86_cpu_features = _mesa_identify_x86_cpu_features();
 243
 244    if ( getenv( "MESA_NO_ASM" ) ) {
 245       _mesa_x86_cpu_features = 0;
 246    }
 247
 248    if ( _mesa_x86_cpu_features ) {
 249       _mesa_init_x86_transform_asm();
 250    }
 251
 252 #ifdef USE_MMX_ASM
 253    if ( cpu_has_mmx ) {
 254       if ( getenv( "MESA_NO_MMX" ) == 0 ) {
 255          message( "MMX cpu detected.\n" );
 256       } else {
 257          _mesa_x86_cpu_features &= ~(X86_FEATURE_MMX);
 258       }
 259    }
 260 #endif
 261
 262 #ifdef USE_3DNOW_ASM
 263    if ( cpu_has_3dnow ) {
 264       if ( getenv( "MESA_NO_3DNOW" ) == 0 ) {
 265          message( "3DNow! cpu detected.\n" );
 266          _mesa_init_3dnow_transform_asm();
 267       } else {
 268          _mesa_x86_cpu_features &= ~(X86_FEATURE_3DNOW);
 269       }
 270    }
 271 #endif
 272
 273 #ifdef USE_SSE_ASM
 274    if ( cpu_has_xmm && getenv( "MESA_FORCE_SSE" ) == 0 ) {
 275       check_os_sse_support();
 276    }
 277    if ( cpu_has_xmm ) {
 278       if ( getenv( "MESA_NO_SSE" ) == 0 ) {
 279          message( "SSE cpu detected.\n" );
 280          _mesa_init_sse_transform_asm();
 281       } else {
 282          _mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
 283       }
 284    }
 285 #endif
 286 #endif
 287 }
 288