1 /* $Id: common_x86.c,v 1.20 2002/11/13 15:03:31 brianp Exp $ */
4 * Mesa 3-D graphics library
7 * Copyright (C) 1999-2002 Brian Paul All Rights Reserved.
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
23 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
24 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 * Check CPU capabilities & initialize optimized funtions for this particular
31 * Written by Holger Waechtler <holger@akaflieg.extern.tu-berlin.de>
32 * Changed by Andre Werthmann <wertmann@cs.uni-potsdam.de> for using the
33 * new Katmai functions.
38 #if defined(USE_SSE_ASM) && defined(__linux__)
41 #if defined(USE_SSE_ASM) && defined(__FreeBSD__)
42 #include <sys/types.h>
43 #include <sys/sysctl.h>
47 #include "common_x86_asm.h"
51 int _mesa_x86_cpu_features
= 0;
53 /* No reason for this to be public.
55 extern int _mesa_identify_x86_cpu_features( void );
58 static void message( const char *msg
)
64 if ( getenv( "MESA_DEBUG" ) ) {
71 fprintf( stderr
, "%s", msg
);
75 #if defined(USE_SSE_ASM)
77 * We must verify that the Streaming SIMD Extensions are truly supported
78 * on this processor before we go ahead and hook out the optimized code.
79 * Unfortunately, the CPUID bit isn't enough, as the OS must set the
80 * OSFXSR bit in CR4 if it supports the extended FPU save and restore
81 * required to use SSE. Unfortunately, we can't just go ahead and read
82 * this register, as only the kernel can do that. Similarly, we must
83 * verify that the OSXMMEXCPT bit in CR4 has been set by the OS,
84 * signifying that it supports unmasked SIMD FPU exceptions. If we take
85 * an unmasked exception and the OS doesn't correctly support them, the
86 * best we'll get is a SIGILL and the worst we'll get is an infinite
87 * loop in the signal delivery from the kernel as we can't interact with
88 * the SIMD FPU state to clear the exception bits. Either way, this is
92 extern void _mesa_test_os_sse_support( void );
93 extern void _mesa_test_os_sse_exception_support( void );
95 #if defined(__linux__) && defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
96 static void sigill_handler( int signal
, struct sigcontext sc
)
98 message( "SIGILL, " );
100 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
101 * instructions are 3 bytes long. We must increment the instruction
102 * pointer manually to avoid repeated execution of the offending
105 * If the SIGILL is caused by a divide-by-zero when unmasked
106 * exceptions aren't supported, the SIMD FPU status and control
107 * word will be restored at the end of the test, so we don't need
108 * to worry about doing it here. Besides, we may not be able to...
112 _mesa_x86_cpu_features
&= ~(X86_FEATURE_XMM
);
115 static void sigfpe_handler( int signal
, struct sigcontext sc
)
117 message( "SIGFPE, " );
119 if ( sc
.fpstate
->magic
!= 0xffff ) {
120 /* Our signal context has the extended FPU state, so reset the
121 * divide-by-zero exception mask and clear the divide-by-zero
124 sc
.fpstate
->mxcsr
|= 0x00000200;
125 sc
.fpstate
->mxcsr
&= 0xfffffffb;
127 /* If we ever get here, we're completely hosed.
130 _mesa_problem( NULL
, "SSE enabling test failed badly!" );
133 #endif /* __linux__ && _POSIX_SOURCE && X86_FXSR_MAGIC */
135 /* If we're running on a processor that can do SSE, let's see if we
136 * are allowed to or not. This will catch 2.4.0 or later kernels that
137 * haven't been configured for a Pentium III but are running on one,
138 * and RedHat patched 2.2 kernels that have broken exception handling
139 * support for user space apps that do SSE.
141 * GH: Isn't this just awful?
143 static void check_os_sse_support( void )
145 #if defined(__linux__)
146 #if defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
147 struct sigaction saved_sigill
;
148 struct sigaction saved_sigfpe
;
150 /* Save the original signal handlers.
152 sigaction( SIGILL
, NULL
, &saved_sigill
);
153 sigaction( SIGFPE
, NULL
, &saved_sigfpe
);
155 signal( SIGILL
, (void (*)(int))sigill_handler
);
156 signal( SIGFPE
, (void (*)(int))sigfpe_handler
);
158 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it
159 * supports the extended FPU save and restore required for SSE. If
160 * we execute an SSE instruction on a PIII and get a SIGILL, the OS
161 * doesn't support Streaming SIMD Exceptions, even if the processor
165 message( "Testing OS support for SSE... " );
167 _mesa_test_os_sse_support();
176 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
177 * it supports unmasked SIMD FPU exceptions. If we unmask the
178 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
179 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
180 * as expected, we're okay but we need to clean up after it.
182 * Are we being too stringent in our requirement that the OS support
183 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
184 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98
185 * doesn't even support them. We at least know the user-space SSE
186 * support is good in kernels that do support unmasked exceptions,
187 * and therefore to be safe I'm going to leave this test in here.
190 message( "Testing OS support for SSE unmasked exceptions... " );
192 _mesa_test_os_sse_exception_support();
201 /* Restore the original signal handlers.
203 sigaction( SIGILL
, &saved_sigill
, NULL
);
204 sigaction( SIGFPE
, &saved_sigfpe
, NULL
);
206 /* If we've gotten to here and the XMM CPUID bit is still set, we're
207 * safe to go ahead and hook out the SSE code throughout Mesa.
210 message( "Tests of OS support for SSE passed.\n" );
212 message( "Tests of OS support for SSE failed!\n" );
215 /* We can't use POSIX signal handling to test the availability of
216 * SSE, so we disable it by default.
218 message( "Cannot test OS support for SSE, disabling to be safe.\n" );
219 _mesa_x86_cpu_features
&= ~(X86_FEATURE_XMM
);
220 #endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */
221 #elif defined(__FreeBSD__)
223 int ret
, len
, enabled
;
224 len
= sizeof(enabled
);
225 ret
= sysctlbyname("hw.instruction_sse", &enabled
, &len
, NULL
, 0);
227 _mesa_x86_cpu_features
&= ~(X86_FEATURE_XMM
);
230 /* Do nothing on other platforms for now.
232 message( "Not testing OS support for SSE, leaving enabled.\n" );
233 #endif /* __linux__ */
236 #endif /* USE_SSE_ASM */
239 void _mesa_init_all_x86_transform_asm( void )
241 (void) message
; /* silence warning */
243 _mesa_x86_cpu_features
= _mesa_identify_x86_cpu_features();
245 if ( getenv( "MESA_NO_ASM" ) ) {
246 _mesa_x86_cpu_features
= 0;
249 if ( _mesa_x86_cpu_features
) {
250 _mesa_init_x86_transform_asm();
255 if ( getenv( "MESA_NO_MMX" ) == 0 ) {
256 message( "MMX cpu detected.\n" );
258 _mesa_x86_cpu_features
&= ~(X86_FEATURE_MMX
);
264 if ( cpu_has_3dnow
) {
265 if ( getenv( "MESA_NO_3DNOW" ) == 0 ) {
266 message( "3DNow! cpu detected.\n" );
267 _mesa_init_3dnow_transform_asm();
269 _mesa_x86_cpu_features
&= ~(X86_FEATURE_3DNOW
);
275 if ( cpu_has_xmm
&& getenv( "MESA_FORCE_SSE" ) == 0 ) {
276 check_os_sse_support();
279 if ( getenv( "MESA_NO_SSE" ) == 0 ) {
280 message( "SSE cpu detected.\n" );
281 _mesa_init_sse_transform_asm();
283 _mesa_x86_cpu_features
&= ~(X86_FEATURE_XMM
);