src/mesa/x86/common_x86_asm.S

   1 /*
   2  * Mesa 3-D graphics library
   3  * Version:  6.3
   4  *
   5  * Copyright (C) 1999-2004  Brian Paul   All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included
  15  * in all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  21  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /*
  26  * Check extended CPU capabilities.  Now justs returns the raw CPUID
  27  * feature information, allowing the higher level code to interpret the
  28  * results.
  29  *
  30  * Written by Holger Waechtler <holger@akaflieg.extern.tu-berlin.de>
  31  *
  32  * Cleaned up and simplified by Gareth Hughes <gareth@valinux.com>
  33  *
  34  */
  35
  36 /*
  37  * NOTE: Avoid using spaces in between '(' ')' and arguments, especially
  38  * with macros like CONST, LLBL that expand to CONCAT(...).  Putting spaces
  39  * in there will break the build on some platforms.
  40  */
  41
  42 #include "matypes.h"
  43 #include "common_x86_features.h"
  44
  45         SEG_TEXT
  46
  47 ALIGNTEXT4
  48 GLOBL GLNAME(_mesa_x86_has_cpuid)
  49 GLNAME(_mesa_x86_has_cpuid):
  50
  51         /* Test for the CPUID command.  If the ID Flag bit in EFLAGS
  52          * (bit 21) is writable, the CPUID command is present */
  53         PUSHF_L
  54         POP_L   (EAX)
  55         MOV_L   (EAX, ECX)
  56         XOR_L   (CONST(0x00200000), EAX)
  57         PUSH_L  (EAX)
  58         POPF_L
  59         PUSHF_L
  60         POP_L   (EAX)
  61
  62         /* Verify the ID Flag bit has been written. */
  63         CMP_L   (ECX, EAX)
  64         SETNE   (AL)
  65         XOR_L   (CONST(0xff), EAX)
  66
  67         RET
  68
  69
  70 ALIGNTEXT4
  71 GLOBL GLNAME(_mesa_x86_cpuid)
  72 GLNAME(_mesa_x86_cpuid):
  73
  74         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
  75         PUSH_L  (EDI)
  76         PUSH_L  (EBX)
  77
  78         CPUID
  79
  80         MOV_L   (REGOFF(16, ESP), EDI)  /* *eax */
  81         MOV_L   (EAX, REGIND(EDI))
  82         MOV_L   (REGOFF(20, ESP), EDI)  /* *ebx */
  83         MOV_L   (EBX, REGIND(EDI))
  84         MOV_L   (REGOFF(24, ESP), EDI)  /* *ecx */
  85         MOV_L   (ECX, REGIND(EDI))
  86         MOV_L   (REGOFF(28, ESP), EDI)  /* *edx */
  87         MOV_L   (EDX, REGIND(EDI))
  88
  89         POP_L   (EBX)
  90         POP_L   (EDI)
  91         RET
  92
  93 ALIGNTEXT4
  94 GLOBL GLNAME(_mesa_x86_cpuid_eax)
  95 GLNAME(_mesa_x86_cpuid_eax):
  96
  97         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
  98         PUSH_L  (EBX)
  99
 100         CPUID
 101
 102         POP_L   (EBX)
 103         RET
 104
 105 ALIGNTEXT4
 106 GLOBL GLNAME(_mesa_x86_cpuid_ebx)
 107 GLNAME(_mesa_x86_cpuid_ebx):
 108
 109         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
 110         PUSH_L  (EBX)
 111
 112         CPUID
 113         MOV_L   (EBX, EAX)                      /* return EBX */
 114
 115         POP_L   (EBX)
 116         RET
 117
 118 ALIGNTEXT4
 119 GLOBL GLNAME(_mesa_x86_cpuid_ecx)
 120 GLNAME(_mesa_x86_cpuid_ecx):
 121
 122         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
 123         PUSH_L  (EBX)
 124
 125         CPUID
 126         MOV_L   (ECX, EAX)                      /* return ECX */
 127
 128         POP_L   (EBX)
 129         RET
 130
 131 ALIGNTEXT4
 132 GLOBL GLNAME(_mesa_x86_cpuid_edx)
 133 GLNAME(_mesa_x86_cpuid_edx):
 134
 135         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
 136         PUSH_L  (EBX)
 137
 138         CPUID
 139         MOV_L   (EDX, EAX)                      /* return EDX */
 140
 141         POP_L   (EBX)
 142         RET
 143
 144 #ifdef USE_SSE_ASM
 145 /* Execute an SSE instruction to see if the operating system correctly
 146  * supports SSE.  A signal handler for SIGILL should have been set
 147  * before calling this function, otherwise this could kill the client
 148  * application.
 149  *
 150  *        -----> !!!! ATTENTION DEVELOPERS !!!! <-----
 151  *
 152  * If you're debugging with gdb and you get stopped in this function,
 153  * just type 'continue'!  Execution will proceed normally.
 154  * See freedesktop.org bug #1709 for more info.
 155  */
 156 ALIGNTEXT4
 157 GLOBL GLNAME( _mesa_test_os_sse_support )
 158 GLNAME( _mesa_test_os_sse_support ):
 159
 160         XORPS   ( XMM0, XMM0 )
 161
 162         RET
 163
 164
 165 /* Perform an SSE divide-by-zero to see if the operating system
 166  * correctly supports unmasked SIMD FPU exceptions.  Signal handlers for
 167  * SIGILL and SIGFPE should have been set before calling this function,
 168  * otherwise this could kill the client application.
 169  */
 170 ALIGNTEXT4
 171 GLOBL GLNAME( _mesa_test_os_sse_exception_support )
 172 GLNAME( _mesa_test_os_sse_exception_support ):
 173
 174         PUSH_L  ( EBP )
 175         MOV_L   ( ESP, EBP )
 176         SUB_L   ( CONST( 8 ), ESP )
 177
 178         /* Save the original MXCSR register value.
 179          */
 180         STMXCSR ( REGOFF( -4, EBP ) )
 181
 182         /* Unmask the divide-by-zero exception and perform one.
 183          */
 184         STMXCSR ( REGOFF( -8, EBP ) )
 185         AND_L   ( CONST( 0xfffffdff ), REGOFF( -8, EBP ) )
 186         LDMXCSR ( REGOFF( -8, EBP ) )
 187
 188         XORPS   ( XMM0, XMM0 )
 189
 190         PUSH_L  ( CONST( 0x3f800000 ) )
 191         PUSH_L  ( CONST( 0x3f800000 ) )
 192         PUSH_L  ( CONST( 0x3f800000 ) )
 193         PUSH_L  ( CONST( 0x3f800000 ) )
 194
 195         MOVUPS  ( REGIND( ESP ), XMM1 )
 196
 197         DIVPS   ( XMM0, XMM1 )
 198
 199         /* Restore the original MXCSR register value.
 200          */
 201         LDMXCSR ( REGOFF( -4, EBP ) )
 202
 203         LEAVE
 204         RET
 205
 206 #endif
 207