another checkpoint of struct immediate replacement code
[mesa.git] / src / mesa / x86 / common_x86_asm.S
1 /* $Id: common_x86_asm.S,v 1.8 2002/03/07 21:40:08 brianp Exp $ */
2
3 /*
4 * Mesa 3-D graphics library
5 * Version: 3.5
6 *
7 * Copyright (C) 1999-2001 Brian Paul All Rights Reserved.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
23 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
24 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26
27 /*
28 * Check extended CPU capabilities. Now justs returns the raw CPUID
29 * feature information, allowing the higher level code to interpret the
30 * results.
31 *
32 * Written by Holger Waechtler <holger@akaflieg.extern.tu-berlin.de>
33 *
34 * Cleaned up and simplified by Gareth Hughes <gareth@valinux.com>
35 */
36
37 /*
38 * NOTE: Avoid using spaces in between '(' ')' and arguments, especially
39 * with macros like CONST, LLBL that expand to CONCAT(...). Putting spaces
40 * in there will break the build on some platforms.
41 */
42
43 #include "matypes.h"
44 #include "common_x86_features.h"
45
46
47 /* Intel vendor string
48 */
49 #define GENU 0x756e6547 /* "Genu" */
50 #define INEI 0x49656e69 /* "ineI" */
51 #define NTEL 0x6c65746e /* "ntel" */
52
53 /* AMD vendor string
54 */
55 #define AUTH 0x68747541 /* "Auth" */
56 #define ENTI 0x69746e65 /* "enti" */
57 #define CAMD 0x444d4163 /* "cAMD" */
58
59
60 SEG_DATA
61
62 /* We might want to print out some useful messages.
63 */
64 GLNAME( found_intel ): STRING( "Genuine Intel processor found\n\0" )
65 GLNAME( found_amd ): STRING( "Authentic AMD processor found\n\0" )
66
67 #ifdef USE_SSE_ASM
68 GLNAME( sse_test_dummy ):
69 D_LONG 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
70 #endif
71
72
73 SEG_TEXT
74
75 ALIGNTEXT4
76 GLOBL GLNAME( _mesa_identify_x86_cpu_features )
77 GLNAME( _mesa_identify_x86_cpu_features ):
78
79 PUSH_L ( EBX )
80
81 /* Test for the CPUID command. If the ID Flag bit in EFLAGS
82 * (bit 21) is writable, the CPUID command is present.
83 */
84 PUSHF_L
85 POP_L ( EAX )
86 MOV_L ( EAX, ECX )
87 XOR_L ( CONST(0x00200000), EAX )
88 PUSH_L ( EAX )
89 POPF_L
90 PUSHF_L
91 POP_L ( EAX )
92
93 /* Verify the ID Flag bit has been written.
94 */
95 CMP_L ( ECX, EAX )
96 JZ ( LLBL (cpuid_done) )
97
98 /* Get the CPU vendor info.
99 */
100 XOR_L ( EAX, EAX )
101 CPUID
102
103 /* Test for Intel processors. We must look for the
104 * "GenuineIntel" string in EBX, ECX and EDX.
105 */
106 CMP_L ( CONST(GENU), EBX )
107 JNE ( LLBL(cpuid_amd) )
108 CMP_L ( CONST(INEI), EDX )
109 JNE ( LLBL(cpuid_amd) )
110 CMP_L ( CONST(NTEL), ECX )
111 JNE ( LLBL(cpuid_amd) )
112
113 /* We have an Intel processor, so we can get the feature
114 * information with an CPUID input value of 1.
115 */
116 MOV_L ( CONST(0x1), EAX )
117 CPUID
118 MOV_L ( EDX, EAX )
119 JMP ( LLBL(cpuid_done) )
120
121 LLBL(cpuid_amd):
122
123 /* Test for AMD processors. We must look for the
124 * "AuthenticAMD" string in EBX, ECX and EDX.
125 */
126 CMP_L ( CONST(AUTH), EBX )
127 JNE ( LLBL(cpuid_other) )
128 CMP_L ( CONST(ENTI), EDX )
129 JNE ( LLBL(cpuid_other) )
130 CMP_L ( CONST(CAMD), ECX )
131 JNE ( LLBL(cpuid_other) )
132
133 /* We have an AMD processor, so we can get the feature
134 * information after we verify that the extended functions are
135 * supported.
136 */
137 MOV_L ( CONST(0x80000000), EAX )
138 CPUID
139 TEST_L ( EAX, EAX )
140 JZ ( LLBL (cpuid_failed) )
141
142 MOV_L ( CONST(0x80000001), EAX )
143 CPUID
144 MOV_L ( EDX, EAX )
145 JMP ( LLBL (cpuid_done) )
146
147 LLBL(cpuid_other):
148
149 /* Test for other processors here when required.
150 */
151
152 LLBL(cpuid_failed):
153
154 /* If we can't determine the feature information, we must
155 * return zero to indicate that no platform-specific
156 * optimizations can be used.
157 */
158 MOV_L ( CONST(0), EAX )
159
160 LLBL (cpuid_done):
161
162 POP_L ( EBX )
163 RET
164
165
166 #ifdef USE_SSE_ASM
167 /* Execute an SSE instruction to see if the operating system correctly
168 * supports SSE. A signal handler for SIGILL should have been set
169 * before calling this function, otherwise this could kill the client
170 * application.
171 */
172 ALIGNTEXT4
173 GLOBL GLNAME( _mesa_test_os_sse_support )
174 GLNAME( _mesa_test_os_sse_support ):
175
176 XORPS ( XMM0, XMM0 )
177
178 RET
179
180
181 /* Perform an SSE divide-by-zero to see if the operating system
182 * correctly supports unmasked SIMD FPU exceptions. Signal handlers for
183 * SIGILL and SIGFPE should have been set before calling this function,
184 * otherwise this could kill the client application.
185 */
186 ALIGNTEXT4
187 GLOBL GLNAME( _mesa_test_os_sse_exception_support )
188 GLNAME( _mesa_test_os_sse_exception_support ):
189
190 PUSH_L ( EBP )
191 MOV_L ( ESP, EBP )
192 SUB_L ( CONST( 8 ), ESP )
193
194 /* Save the original MXCSR register value.
195 */
196 STMXCSR ( REGOFF( -4, EBP ) )
197
198 /* Unmask the divide-by-zero exception and perform one.
199 */
200 STMXCSR ( REGOFF( -8, EBP ) )
201 AND_L ( CONST( 0xfffffdff ), REGOFF( -8, EBP ) )
202 LDMXCSR ( REGOFF( -8, EBP ) )
203
204 XORPS ( XMM0, XMM0 )
205 MOVUPS ( GLNAME( sse_test_dummy ), XMM1 )
206
207 DIVPS ( XMM0, XMM1 )
208
209 /* Restore the original MXCSR register value.
210 */
211 LDMXCSR ( REGOFF( -4, EBP ) )
212
213 LEAVE
214 RET
215
216 #endif