src/mesa/x86/common_x86_asm.S

   1 /* $Id: common_x86_asm.S,v 1.7 2001/03/29 06:46:16 gareth Exp $ */
   2
   3 /*
   4  * Mesa 3-D graphics library
   5  * Version:  3.5
   6  *
   7  * Copyright (C) 1999-2001  Brian Paul   All Rights Reserved.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included
  17  * in all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  23  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  24  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  */
  26
  27 /*
  28  * Check extended CPU capabilities.  Now justs returns the raw CPUID
  29  * feature information, allowing the higher level code to interpret the
  30  * results.
  31  *
  32  * Written by Holger Waechtler <holger@akaflieg.extern.tu-berlin.de>
  33  *
  34  * Cleaned up and simplified by Gareth Hughes <gareth@valinux.com>
  35  */
  36
  37 #include "matypes.h"
  38 #include "common_x86_features.h"
  39
  40
  41 /* Intel vendor string
  42  */
  43 #define GENU    0x756e6547      /* "Genu" */
  44 #define INEI    0x49656e69      /* "ineI" */
  45 #define NTEL    0x6c65746e      /* "ntel" */
  46
  47 /* AMD vendor string
  48  */
  49 #define AUTH    0x68747541      /* "Auth" */
  50 #define ENTI    0x69746e65      /* "enti" */
  51 #define CAMD    0x444d4163      /* "cAMD" */
  52
  53
  54         SEG_DATA
  55
  56 /* We might want to print out some useful messages.
  57  */
  58 GLNAME( found_intel ):  STRING( "Genuine Intel processor found\n\0" )
  59 GLNAME( found_amd ):    STRING( "Authentic AMD processor found\n\0" )
  60
  61 #ifdef USE_SSE_ASM
  62 GLNAME( sse_test_dummy ):
  63         D_LONG 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
  64 #endif
  65
  66
  67         SEG_TEXT
  68
  69 ALIGNTEXT4
  70 GLOBL GLNAME( _mesa_identify_x86_cpu_features )
  71 GLNAME( _mesa_identify_x86_cpu_features ):
  72
  73         PUSH_L  ( EBX )
  74
  75         /* Test for the CPUID command.  If the ID Flag bit in EFLAGS
  76          * (bit 21) is writable, the CPUID command is present.
  77          */
  78         PUSHF_L
  79         POP_L   ( EAX )
  80         MOV_L   ( EAX, ECX )
  81         XOR_L   ( CONST(0x00200000), EAX )
  82         PUSH_L  ( EAX )
  83         POPF_L
  84         PUSHF_L
  85         POP_L   ( EAX )
  86
  87         /* Verify the ID Flag bit has been written.
  88          */
  89         CMP_L   ( ECX, EAX )
  90         JZ      ( LLBL ( cpuid_done ) )
  91
  92         /* Get the CPU vendor info.
  93          */
  94         XOR_L   ( EAX, EAX )
  95         CPUID
  96
  97         /* Test for Intel processors.  We must look for the
  98          * "GenuineIntel" string in EBX, ECX and EDX.
  99          */
 100         CMP_L   ( CONST(GENU), EBX )
 101         JNE     ( LLBL( cpuid_amd ) )
 102         CMP_L   ( CONST(INEI), EDX )
 103         JNE     ( LLBL( cpuid_amd ) )
 104         CMP_L   ( CONST(NTEL), ECX )
 105         JNE     ( LLBL( cpuid_amd ) )
 106
 107         /* We have an Intel processor, so we can get the feature
 108          * information with an CPUID input value of 1.
 109          */
 110         MOV_L   ( CONST(0x1), EAX )
 111         CPUID
 112         MOV_L   ( EDX, EAX )
 113         JMP     ( LLBL( cpuid_done ) )
 114
 115 LLBL( cpuid_amd ):
 116
 117         /* Test for AMD processors.  We must look for the
 118          * "AuthenticAMD" string in EBX, ECX and EDX.
 119          */
 120         CMP_L   ( CONST(AUTH), EBX )
 121         JNE     ( LLBL( cpuid_other ) )
 122         CMP_L   ( CONST(ENTI), EDX )
 123         JNE     ( LLBL( cpuid_other ) )
 124         CMP_L   ( CONST(CAMD), ECX )
 125         JNE     ( LLBL( cpuid_other ) )
 126
 127         /* We have an AMD processor, so we can get the feature
 128          * information after we verify that the extended functions are
 129          * supported.
 130          */
 131         MOV_L   ( CONST(0x80000000), EAX )
 132         CPUID
 133         TEST_L  ( EAX, EAX )
 134         JZ      ( LLBL ( cpuid_failed ) )
 135
 136         MOV_L   ( CONST(0x80000001), EAX )
 137         CPUID
 138         MOV_L   ( EDX, EAX )
 139         JMP     ( LLBL ( cpuid_done ) )
 140
 141 LLBL( cpuid_other ):
 142
 143         /* Test for other processors here when required.
 144          */
 145
 146 LLBL( cpuid_failed ):
 147
 148         /* If we can't determine the feature information, we must
 149          * return zero to indicate that no platform-specific
 150          * optimizations can be used.
 151          */
 152         MOV_L   ( CONST(0), EAX )
 153
 154 LLBL ( cpuid_done ):
 155
 156         POP_L   ( EBX )
 157         RET
 158
 159
 160 #ifdef USE_SSE_ASM
 161 /* Execute an SSE instruction to see if the operating system correctly
 162  * supports SSE.  A signal handler for SIGILL should have been set
 163  * before calling this function, otherwise this could kill the client
 164  * application.
 165  */
 166 ALIGNTEXT4
 167 GLOBL GLNAME( _mesa_test_os_sse_support )
 168 GLNAME( _mesa_test_os_sse_support ):
 169
 170         XORPS   ( XMM0, XMM0 )
 171
 172         RET
 173
 174
 175 /* Perform an SSE divide-by-zero to see if the operating system
 176  * correctly supports unmasked SIMD FPU exceptions.  Signal handlers for
 177  * SIGILL and SIGFPE should have been set before calling this function,
 178  * otherwise this could kill the client application.
 179  */
 180 ALIGNTEXT4
 181 GLOBL GLNAME( _mesa_test_os_sse_exception_support )
 182 GLNAME( _mesa_test_os_sse_exception_support ):
 183
 184         PUSH_L  ( EBP )
 185         MOV_L   ( ESP, EBP )
 186         SUB_L   ( CONST( 8 ), ESP )
 187
 188         /* Save the original MXCSR register value.
 189          */
 190         STMXCSR ( REGOFF( -4, EBP ) )
 191
 192         /* Unmask the divide-by-zero exception and perform one.
 193          */
 194         STMXCSR ( REGOFF( -8, EBP ) )
 195         AND_L   ( CONST( 0xfffffdff ), REGOFF( -8, EBP ) )
 196         LDMXCSR ( REGOFF( -8, EBP ) )
 197
 198         XORPS   ( XMM0, XMM0 )
 199         MOVUPS  ( GLNAME( sse_test_dummy ), XMM1 )
 200
 201         DIVPS   ( XMM0, XMM1 )
 202
 203         /* Restore the original MXCSR register value.
 204          */
 205         LDMXCSR ( REGOFF( -4, EBP ) )
 206
 207         LEAVE
 208         RET
 209
 210 #endif