src/openpower/decoder/isa/test_caller_svp64_dd_ffirst.py

   1 import unittest
   2 from copy import deepcopy
   3
   4 from nmutil.formaltest import FHDLTestCase
   5 from openpower.decoder.isa.caller import SVP64State
   6 from openpower.decoder.isa.test_caller import run_tst
   7 from openpower.decoder.selectable_int import SelectableInt
   8 from openpower.simulator.program import Program
   9 from openpower.insndb.asm import SVP64Asm
  10 from openpower.util import log
  11
  12 def cmpd(x, y):
  13     class CRfield:
  14         def __repr__(self):
  15             return "<lt %d gt %d eq %d>" % (self.lt, self.gt, self.eq)
  16         def __int__(self):
  17             return (CRf.lt<<3) | (CRf.gt<<2) | (CRf.eq<<1)
  18     CRf = CRfield()
  19     CRf.lt = x < y
  20     CRf.gt = x > y
  21     CRf.eq = x == y
  22     return CRf
  23
  24
  25 # example sv.cmpi/ff=lt 0, 1, *10, 5
  26 # see https://bugs.libre-soc.org/show_bug.cgi?id=1183#c3
  27 def sv_cmpi(gpr, CR, vl, ra, si):
  28     i = 0
  29     while i < vl:
  30         CR[i] = cmpd(gpr[ra + i], si)
  31         log("sv_cmpi test", i, gpr[ra + i], si, CR[i], CR[i].lt)
  32         if CR[i].lt:
  33             break
  34         i += 1
  35     return i # new VL
  36
  37
  38 # example sv.cmpi/ff=lt 0, 1, *10, 5
  39 # see https://bugs.libre-soc.org/show_bug.cgi?id=1183#c3
  40 def sv_maxu(gpr, CR, vl, ra, rb, rt):
  41     i = 0
  42     while i < vl:
  43         CR[0] = cmpd(gpr[ra+i], gpr[rb])
  44         gpr[rt] = gpr[rb] if CR[0].gt else gpr[ra+i]
  45         log("sv_maxss test", i, gpr[ra + i], gpr[rb+i], CR[0], CR[0].gt)
  46         if not CR[0].gt:
  47             break
  48         i += 1
  49     return i # new VL
  50
  51
  52 class DDFFirstTestCase(FHDLTestCase):
  53
  54     def _check_regs(self, sim, expected):
  55         for i in range(32):
  56             self.assertEqual(sim.gpr(i), SelectableInt(expected[i], 64))
  57
  58     def test_sv_maxu_ddffirst_single(self):
  59         lst = SVP64Asm(["sv.minmax./ff=le 4, *10, 4, 1" # scalar RB=RT
  60                         ])
  61         lst = list(lst)
  62
  63         # SVSTATE
  64         svstate = SVP64State()
  65         vl = 4  # VL
  66         svstate.vl = vl  # VL
  67         svstate.maxvl = vl  # MAXVL
  68         print("SVSTATE", bin(svstate.asint()))
  69
  70         gprs = [0] * 32
  71         gprs[4] =  2 # start (RT&RB) accumulator
  72         gprs[10] = 3 # vector starts here
  73         gprs[11] = 4
  74         gprs[12] = 1
  75         gprs[13] = 0
  76
  77         res = []
  78         cr_res = [0]*8
  79
  80         res = deepcopy(gprs)
  81         expected_vl = sv_maxu(res, cr_res, vl, 10, 5, 5)
  82         log("sv_maxu", expected_vl, cr_res)
  83
  84         with Program(lst, bigendian=False) as program:
  85             sim = self.run_tst_program(program, initial_regs=gprs,
  86                                        svstate=svstate)
  87             for i in range(4):
  88                 val = sim.gpr(i).value
  89                 res.append(val)
  90                 cr_res.append(0)
  91                 print("i", i, val)
  92             # confirm that the results are as expected
  93
  94             for i, v in enumerate(cr_res[:vl]):
  95                 crf = sim.crl[i].get_range().value
  96                 print ("crf", i, res[i], bin(crf), bin(int(v)))
  97                 self.assertEqual(crf, int(v))
  98
  99             for i, v in enumerate(res):
 100                 self.assertEqual(v, res[i])
 101
 102             self.assertEqual(sim.svstate.vl, expected_vl)
 103             self.assertEqual(sim.svstate.maxvl, 4)
 104             self.assertEqual(sim.svstate.srcstep, 0)
 105             self.assertEqual(sim.svstate.dststep, 0)
 106
 107     def test_1(self):
 108         lst = SVP64Asm(["sv.cmpi/ff=lt 0, 1, *10, 5"
 109                         ])
 110         lst = list(lst)
 111
 112         # SVSTATE
 113         svstate = SVP64State()
 114         vl = 3  # VL
 115         svstate.vl = vl  # VL
 116         svstate.maxvl = vl  # MAXVL
 117         print("SVSTATE", bin(svstate.asint()))
 118
 119         gprs = [0] * 32
 120         gprs[10] = 7
 121         gprs[11] = 5
 122         gprs[12] = 12
 123
 124         res = []
 125         cr_res = [0]*8
 126
 127         newvl = sv_cmpi(gprs, cr_res, vl, 10, 5)
 128         log("sv_cmpi", newvl, cr_res)
 129
 130         with Program(lst, bigendian=False) as program:
 131             sim = self.run_tst_program(program, initial_regs=gprs,
 132                                        svstate=svstate)
 133             for i in range(4):
 134                 val = sim.gpr(i).value
 135                 res.append(val)
 136                 cr_res.append(0)
 137                 print("i", i, val)
 138             # confirm that the results are as expected
 139             expected = deepcopy(vec)
 140             expected_vl = 0
 141             for i in range(4):
 142                 # calculate expected result and expected CR field
 143                 result = vec[i] - gprs[8]
 144                 crf = ((result==0)<<1) | ((result > 0)<<2) | ((result < 0) << 3)
 145                 cr_res[i] = crf
 146                 if result <= 0:
 147                     break
 148                 # VLi=0 - test comes FIRST!
 149                 expected[i] = result
 150                 # only write out if successful
 151                 expected_vl += 1
 152
 153             for i, v in enumerate(cr_res):
 154                 crf = sim.crl[i].get_range().value
 155                 print ("crf", i, res[i], bin(crf), bin(v))
 156                 self.assertEqual(crf, v)
 157
 158             for i, v in enumerate(res):
 159                 self.assertEqual(v, expected[i])
 160
 161             self.assertEqual(sim.svstate.vl, expected_vl)
 162             self.assertEqual(sim.svstate.maxvl, 4)
 163             self.assertEqual(sim.svstate.srcstep, 0)
 164             self.assertEqual(sim.svstate.dststep, 0)
 165
 166     def test_sv_addi_ffirst_le(self):
 167         lst = SVP64Asm(["sv.subf./ff=le *0,8,*0"
 168                         ])
 169         lst = list(lst)
 170
 171         # SVSTATE
 172         svstate = SVP64State()
 173         svstate.vl = 4  # VL
 174         svstate.maxvl = 4  # MAXVL
 175         print("SVSTATE", bin(svstate.asint()))
 176
 177         gprs = [0] * 64
 178         gprs[8] = 3
 179         vec = [9, 8, 3, 4]
 180
 181         res = []
 182         cr_res = []
 183         # store GPRs
 184         for i, x in enumerate(vec):
 185             gprs[i] = x
 186
 187         with Program(lst, bigendian=False) as program:
 188             sim = self.run_tst_program(program, initial_regs=gprs,
 189                                        svstate=svstate)
 190             for i in range(4):
 191                 val = sim.gpr(i).value
 192                 res.append(val)
 193                 cr_res.append(0)
 194                 print("i", i, val)
 195             # confirm that the results are as expected
 196             expected = deepcopy(vec)
 197             expected_vl = 0
 198             for i in range(4):
 199                 # calculate expected result and expected CR field
 200                 result = vec[i] - gprs[8]
 201                 crf = ((result==0)<<1) | ((result > 0)<<2) | ((result < 0) << 3)
 202                 cr_res[i] = crf
 203                 if result <= 0:
 204                     break
 205                 # VLi=0 - test comes FIRST!
 206                 expected[i] = result
 207                 # only write out if successful
 208                 expected_vl += 1
 209
 210             for i, v in enumerate(cr_res):
 211                 crf = sim.crl[i].get_range().value
 212                 print ("crf", i, res[i], bin(crf), bin(v))
 213                 self.assertEqual(crf, v)
 214
 215             for i, v in enumerate(res):
 216                 self.assertEqual(v, expected[i])
 217
 218             self.assertEqual(sim.svstate.vl, expected_vl)
 219             self.assertEqual(sim.svstate.maxvl, 4)
 220             self.assertEqual(sim.svstate.srcstep, 0)
 221             self.assertEqual(sim.svstate.dststep, 0)
 222
 223     def test_sv_addi_ffirst(self):
 224         lst = SVP64Asm(["sv.subf./ff=eq *0,8,*0"
 225                         ])
 226         lst = list(lst)
 227
 228         # SVSTATE
 229         svstate = SVP64State()
 230         svstate.vl = 4  # VL
 231         svstate.maxvl = 4  # MAXVL
 232         print("SVSTATE", bin(svstate.asint()))
 233
 234         gprs = [0] * 64
 235         gprs[8] = 3
 236         vec = [9, 8, 3, 4]
 237
 238         res = []
 239         cr_res = []
 240         # store GPRs
 241         for i, x in enumerate(vec):
 242             gprs[i] = x
 243
 244         with Program(lst, bigendian=False) as program:
 245             sim = self.run_tst_program(program, initial_regs=gprs,
 246                                        svstate=svstate)
 247             for i in range(4):
 248                 val = sim.gpr(i).value
 249                 res.append(val)
 250                 cr_res.append(0)
 251                 print("i", i, val)
 252             # confirm that the results are as expected
 253             expected = deepcopy(vec)
 254             for i in range(4):
 255                 result = vec[i] - gprs[8]
 256                 crf = ((result==0)<<1) | ((result > 0)<<2) | ((result < 0) << 3)
 257                 cr_res[i] = crf
 258                 if result == 0:
 259                     break
 260                 # VLi=0 - test comes FIRST!
 261                 expected[i] = result
 262             for i, v in enumerate(cr_res):
 263                 crf = sim.crl[i].get_range().value
 264                 print ("crf", i, res[i], bin(crf), bin(v))
 265                 self.assertEqual(crf, v)
 266
 267             for i, v in enumerate(res):
 268                 self.assertEqual(v, expected[i])
 269
 270             self.assertEqual(sim.svstate.vl, 2)
 271             self.assertEqual(sim.svstate.maxvl, 4)
 272             self.assertEqual(sim.svstate.srcstep, 0)
 273             self.assertEqual(sim.svstate.dststep, 0)
 274
 275     def test_sv_addi_ffirst_rc1(self):
 276         lst = SVP64Asm(["sv.subf/ff=RC1 *0,8,*0"  # RC1 auto-sets EQ (and Rc=1)
 277                         ])
 278         lst = list(lst)
 279
 280         # SVSTATE
 281         svstate = SVP64State()
 282         svstate.vl = 4  # VL
 283         svstate.maxvl = 4  # MAXVL
 284         print("SVSTATE", bin(svstate.asint()))
 285
 286         gprs = [0] * 64
 287         gprs[8] = 3
 288         vec = [9, 8, 3, 4]
 289
 290         res = []
 291         # store GPRs
 292         for i, x in enumerate(vec):
 293             gprs[i] = x
 294
 295         with Program(lst, bigendian=False) as program:
 296             sim = self.run_tst_program(program, initial_regs=gprs,
 297                                        svstate=svstate)
 298             for i in range(4):
 299                 val = sim.gpr(i).value
 300                 res.append(val)
 301                 print("i", i, val)
 302             # confirm that the results are as expected
 303             expected = deepcopy(vec)
 304             for i in range(4):
 305                 result = expected[i] - gprs[8]
 306                 if result == 0:
 307                     break
 308                 # VLi=0 - test comes FIRST!
 309                 expected[i] = result
 310             for i, v in enumerate(res):
 311                 self.assertEqual(v, expected[i])
 312
 313             self.assertEqual(sim.svstate.vl, 2)
 314             self.assertEqual(sim.svstate.maxvl, 4)
 315             self.assertEqual(sim.svstate.srcstep, 0)
 316             self.assertEqual(sim.svstate.dststep, 0)
 317
 318     def test_sv_addi_ffirst_vli(self):
 319         """data-dependent fail-first with VLi=1, the test comes *after* write
 320         """
 321         lst = SVP64Asm(["sv.subf/ff=RC1/vli *0,8,*0"
 322                         ])
 323         lst = list(lst)
 324
 325         # SVSTATE
 326         svstate = SVP64State()
 327         svstate.vl = 4  # VL
 328         svstate.maxvl = 4  # MAXVL
 329         print("SVSTATE", bin(svstate.asint()))
 330
 331         gprs = [0] * 64
 332         gprs[8] = 3
 333         vec = [9, 8, 3, 4]
 334
 335         res = []
 336         # store GPRs
 337         for i, x in enumerate(vec):
 338             gprs[i] = x
 339
 340         with Program(lst, bigendian=False) as program:
 341             sim = self.run_tst_program(program, initial_regs=gprs,
 342                                        svstate=svstate)
 343             for i in range(4):
 344                 val = sim.gpr(i).value
 345                 res.append(val)
 346                 print("i", i, val)
 347             # confirm that the results are as expected
 348             expected = deepcopy(vec)
 349             for i in range(4):
 350                 # VLi=1 - test comes AFTER write!
 351                 expected[i] -= gprs[8]
 352                 if expected[i] == 0:
 353                     break
 354             for i, v in enumerate(res):
 355                 self.assertEqual(v, expected[i])
 356
 357             self.assertEqual(sim.svstate.vl, 3)
 358             self.assertEqual(sim.svstate.maxvl, 4)
 359             self.assertEqual(sim.svstate.srcstep, 0)
 360             self.assertEqual(sim.svstate.dststep, 0)
 361
 362     def run_tst_program(self, prog, initial_regs=None,
 363                         svstate=None,
 364                         initial_mem=None,
 365                         initial_fprs=None):
 366         if initial_regs is None:
 367             initial_regs = [0] * 32
 368         simulator = run_tst(prog, initial_regs, mem=initial_mem,
 369                             initial_fprs=initial_fprs,
 370                             svstate=svstate)
 371
 372         print("GPRs")
 373         simulator.gpr.dump()
 374         print("FPRs")
 375         simulator.fpr.dump()
 376
 377         return simulator
 378
 379
 380 if __name__ == "__main__":
 381     unittest.main()