src/openpower/test/alu/fmvis_cases.py

   1 from openpower.sv.trans.svp64 import SVP64Asm
   2 import random
   3 from openpower.test.common import TestAccumulatorBase
   4 from openpower.endian import bigendian
   5 from openpower.simulator.program import Program
   6 from openpower.decoder.selectable_int import SelectableInt
   7 from openpower.decoder.power_enums import XER_bits
   8 from openpower.decoder.isa.caller import special_sprs
   9 from openpower.decoder.helpers import exts
  10 from openpower.test.state import ExpectedState
  11 import unittest
  12
  13 class FMVISTestCase(TestAccumulatorBase):
  14
  15     def case_0_fmvis(self):
  16         lst = SVP64Asm(["fmvis 5, 0x4000", # 2.0
  17                         "fmvis 6, 0x4048", # 3.125
  18                         "fmvis 7, 0x3E80", # 0.25
  19                         "fmvis 8, 0xc048", # -3.125
  20                        ])
  21         lst = list(lst)
  22
  23         expected_fprs = [0] * 32
  24         expected_fprs[5] = 0x4000000000000000 # 2.0 in FP64 form
  25         expected_fprs[6] = 0x4009000000000000 # 3.125 in FP64 form
  26         expected_fprs[7] = 0x3FD0000000000000 # 0.25 in FP64 form
  27         expected_fprs[8] = 0xC009000000000000 # -3.125 in FP64 form
  28         e = ExpectedState(pc=0x10, # 4 instructions so 4x4=0x10
  29                           fp_regs=expected_fprs) # expected results
  30         self.add_case(Program(lst, bigendian), expected=e)
  31
  32     def case_1_fishmv(self):
  33
  34         lst = SVP64Asm(["fmvis  3, 0x4049",  # 1st half of 3.14159 in FP32 form
  35                         "fishmv 3, 0x0FD0",  # 2nd half of 3.14159 in FP32 form
  36                         "fmvis  4, 0x3F80",  # 1st half of 1.00195 in FP32 form
  37                         "fishmv 4, 0x4000",  # 2nd half of 1.00195 in FP32 form
  38                         "fmvis  5, 0xC049",  # 1st half of -3.14159 in FP32 form
  39                         "fishmv 5, 0x0FD0",  # 2nd half of -3.14159 in FP32 form
  40                        ])
  41         lst = list(lst)
  42
  43         expected_fprs = [0] * 32
  44         expected_fprs[3] = 0x400921fa00000000 # 3.14159 in FP64 form
  45         expected_fprs[4] = 0x3ff0080000000000 # 1.00195 in FP64 form
  46         expected_fprs[5] = 0xC00921fa00000000 # -3.14159 in FP64 form
  47         e = ExpectedState(pc=0x18, fp_regs=expected_fprs)
  48         self.add_case(Program(lst, bigendian), expected=e)