9dd48c9721aef2549f123f958b31fdc819f2447b
1 from openpower
.sv
.trans
.svp64
import SVP64Asm
3 from openpower
.test
.common
import TestAccumulatorBase
4 from openpower
.endian
import bigendian
5 from openpower
.simulator
.program
import Program
6 from openpower
.decoder
.selectable_int
import SelectableInt
7 from openpower
.decoder
.power_enums
import XER_bits
8 from openpower
.decoder
.isa
.caller
import special_sprs
9 from openpower
.decoder
.helpers
import exts
10 from openpower
.test
.state
import ExpectedState
13 class MADDSUBRSTestCase(TestAccumulatorBase
):
15 def case_0_maddsubrs(self
):
16 isa
= SVP64Asm(["maddsubrs 1,2,14,3"])
19 initial_regs
= [0] * 32
20 initial_regs
[1] = 0x00000a70
21 initial_regs
[2] = 0x0000e6b8
22 initial_regs
[3] = 0x00002d41
24 e
= ExpectedState(pc
=4)
25 e
.intregs
[1] = 0x0000aa85
26 e
.intregs
[2] = 0xffffffffffff643e
27 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)