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[mesa.git] / src / panfrost / bifrost / bi_pack.c
1 /*
2 * Copyright (C) 2020 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "compiler.h"
25
26 #define RETURN_PACKED(str) { \
27 uint64_t temp = 0; \
28 memcpy(&temp, &str, sizeof(str)); \
29 return temp; \
30 }
31
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
35
36 static uint64_t
37 bi_pack_header(bi_clause *clause, bi_clause *next, bool is_fragment)
38 {
39 struct bifrost_header header = {
40 .back_to_back = clause->back_to_back,
41 .no_end_of_shader = (next != NULL),
42 .elide_writes = is_fragment,
43 .branch_cond = clause->branch_conditional,
44 .datareg_writebarrier = clause->data_register_write_barrier,
45 .datareg = clause->data_register,
46 .scoreboard_deps = next ? next->dependencies : 0,
47 .scoreboard_index = clause->scoreboard_id,
48 .clause_type = clause->clause_type,
49 .next_clause_type = next ? next->clause_type : 0,
50 };
51
52 header.branch_cond |= header.back_to_back;
53
54 uint64_t u = 0;
55 memcpy(&u, &header, sizeof(header));
56 return u;
57 }
58
59 /* Represents the assignment of ports for a given bundle */
60
61 struct bi_registers {
62 /* Register to assign to each port */
63 unsigned port[4];
64
65 /* Read ports can be disabled */
66 bool enabled[2];
67
68 /* Should we write FMA? what about ADD? If only a single port is
69 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
70 bool write_fma, write_add;
71
72 /* Should we read with port 3? */
73 bool read_port3;
74
75 /* Packed uniform/constant */
76 uint8_t uniform_constant;
77
78 /* Whether writes are actually for the last instruction */
79 bool first_instruction;
80 };
81
82 static inline void
83 bi_print_ports(struct bi_registers *regs)
84 {
85 for (unsigned i = 0; i < 2; ++i) {
86 if (regs->enabled[i])
87 printf("port %u: %u\n", i, regs->port[i]);
88 }
89
90 if (regs->write_fma || regs->write_add) {
91 printf("port 2 (%s): %u\n",
92 regs->write_add ? "ADD" : "FMA",
93 regs->port[2]);
94 }
95
96 if ((regs->write_fma && regs->write_add) || regs->read_port3) {
97 printf("port 3 (%s): %u\n",
98 regs->read_port3 ? "read" : "FMA",
99 regs->port[3]);
100 }
101 }
102
103 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
104 * pushed uniform per bundle. Figure out which one we need in the bundle (the
105 * scheduler needs to ensure we only have one type per bundle), validate
106 * everything, and rewrite away the register/uniform indices to use 3-bit
107 * sources directly. */
108
109 static unsigned
110 bi_lookup_constant(bi_clause *clause, uint64_t cons, bool *hi, bool b64)
111 {
112 uint64_t want = (cons >> 4);
113
114 for (unsigned i = 0; i < clause->constant_count; ++i) {
115 /* Only check top 60-bits since that's what's actually embedded
116 * in the clause, the bottom 4-bits are bundle-inline */
117
118 uint64_t candidates[2] = {
119 clause->constants[i] >> 4,
120 clause->constants[i] >> 36
121 };
122
123 /* For <64-bit mode, we treat lo/hi separately */
124
125 if (!b64)
126 candidates[0] &= (0xFFFFFFFF >> 4);
127
128 if (candidates[0] == want)
129 return i;
130
131 if (candidates[1] == want && !b64) {
132 *hi = true;
133 return i;
134 }
135 }
136
137 unreachable("Invalid constant accessed");
138 }
139
140 static unsigned
141 bi_constant_field(unsigned idx)
142 {
143 assert(idx <= 5);
144
145 const unsigned values[] = {
146 4, 5, 6, 7, 2, 3
147 };
148
149 return values[idx] << 4;
150 }
151
152 static bool
153 bi_assign_uniform_constant_single(
154 struct bi_registers *regs,
155 bi_clause *clause,
156 bi_instruction *ins, bool assigned, bool fast_zero)
157 {
158 if (!ins)
159 return assigned;
160
161 if (ins->type == BI_BLEND) {
162 assert(!assigned);
163 regs->uniform_constant = 0x8;
164 return true;
165 }
166
167 bi_foreach_src(ins, s) {
168 if (s == 0 && (ins->type == BI_LOAD_VAR_ADDRESS || ins->type == BI_LOAD_ATTR)) continue;
169
170 if (ins->src[s] & BIR_INDEX_CONSTANT) {
171 bool hi = false;
172 bool b64 = nir_alu_type_get_type_size(ins->src_types[s]) > 32;
173 uint64_t cons = bi_get_immediate(ins, s);
174 unsigned idx = bi_lookup_constant(clause, cons, &hi, b64);
175 unsigned lo = clause->constants[idx] & 0xF;
176 unsigned f = bi_constant_field(idx) | lo;
177
178 if (assigned && regs->uniform_constant != f)
179 unreachable("Mismatched uniform/const field: imm");
180
181 regs->uniform_constant = f;
182 ins->src[s] = BIR_INDEX_PASS | (hi ? BIFROST_SRC_CONST_HI : BIFROST_SRC_CONST_LO);
183 assigned = true;
184 } else if (ins->src[s] & BIR_INDEX_ZERO && (ins->type == BI_LOAD_UNIFORM || ins->type == BI_LOAD_VAR)) {
185 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
186 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_HI;
187 } else if (ins->src[s] & BIR_INDEX_ZERO && !fast_zero) {
188 /* FMAs have a fast zero port, ADD needs to use the
189 * uniform/const port's special 0 mode handled here */
190 unsigned f = 0;
191
192 if (assigned && regs->uniform_constant != f)
193 unreachable("Mismatched uniform/const field: 0");
194
195 regs->uniform_constant = f;
196 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_LO;
197 assigned = true;
198 } else if (s & BIR_INDEX_UNIFORM) {
199 unreachable("Push uniforms not implemented yet");
200 }
201 }
202
203 return assigned;
204 }
205
206 static void
207 bi_assign_uniform_constant(
208 bi_clause *clause,
209 struct bi_registers *regs,
210 bi_bundle bundle)
211 {
212 bool assigned =
213 bi_assign_uniform_constant_single(regs, clause, bundle.fma, false, true);
214
215 bi_assign_uniform_constant_single(regs, clause, bundle.add, assigned, false);
216 }
217
218 /* Assigns a port for reading, before anything is written */
219
220 static void
221 bi_assign_port_read(struct bi_registers *regs, unsigned src)
222 {
223 /* We only assign for registers */
224 if (!(src & BIR_INDEX_REGISTER))
225 return;
226
227 unsigned reg = src & ~BIR_INDEX_REGISTER;
228
229 /* Check if we already assigned the port */
230 for (unsigned i = 0; i <= 1; ++i) {
231 if (regs->port[i] == reg && regs->enabled[i])
232 return;
233 }
234
235 if (regs->port[3] == reg && regs->read_port3)
236 return;
237
238 /* Assign it now */
239
240 for (unsigned i = 0; i <= 1; ++i) {
241 if (!regs->enabled[i]) {
242 regs->port[i] = reg;
243 regs->enabled[i] = true;
244 return;
245 }
246 }
247
248 if (!regs->read_port3) {
249 regs->port[3] = reg;
250 regs->read_port3 = true;
251 return;
252 }
253
254 bi_print_ports(regs);
255 unreachable("Failed to find a free port for src");
256 }
257
258 static struct bi_registers
259 bi_assign_ports(bi_bundle now, bi_bundle prev)
260 {
261 struct bi_registers regs = { 0 };
262
263 /* We assign ports for the main register mechanism. Special ops
264 * use the data registers, which has its own mechanism entirely
265 * and thus gets skipped over here. */
266
267 unsigned read_dreg = now.add &&
268 bi_class_props[now.add->type] & BI_DATA_REG_SRC;
269
270 unsigned write_dreg = prev.add &&
271 bi_class_props[prev.add->type] & BI_DATA_REG_DEST;
272
273 /* First, assign reads */
274
275 if (now.fma)
276 bi_foreach_src(now.fma, src)
277 bi_assign_port_read(&regs, now.fma->src[src]);
278
279 if (now.add) {
280 bi_foreach_src(now.add, src) {
281 if (!(src == 0 && read_dreg))
282 bi_assign_port_read(&regs, now.add->src[src]);
283 }
284 }
285
286 /* Next, assign writes */
287
288 if (prev.add && prev.add->dest & BIR_INDEX_REGISTER && !write_dreg) {
289 regs.port[2] = prev.add->dest & ~BIR_INDEX_REGISTER;
290 regs.write_add = true;
291 }
292
293 if (prev.fma && prev.fma->dest & BIR_INDEX_REGISTER) {
294 unsigned r = prev.fma->dest & ~BIR_INDEX_REGISTER;
295
296 if (regs.write_add) {
297 /* Scheduler constraint: cannot read 3 and write 2 */
298 assert(!regs.read_port3);
299 regs.port[3] = r;
300 } else {
301 regs.port[2] = r;
302 }
303
304 regs.write_fma = true;
305 }
306
307 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
308
309 if (regs.enabled[0] && regs.enabled[1] && regs.port[1] < regs.port[0]) {
310 unsigned temp = regs.port[0];
311 regs.port[0] = regs.port[1];
312 regs.port[1] = temp;
313 }
314
315 return regs;
316 }
317
318 /* Determines the register control field, ignoring the first? flag */
319
320 static enum bifrost_reg_control
321 bi_pack_register_ctrl_lo(struct bi_registers r)
322 {
323 if (r.write_fma) {
324 if (r.write_add) {
325 assert(!r.read_port3);
326 return BIFROST_WRITE_ADD_P2_FMA_P3;
327 } else {
328 if (r.read_port3)
329 return BIFROST_WRITE_FMA_P2_READ_P3;
330 else
331 return BIFROST_WRITE_FMA_P2;
332 }
333 } else if (r.write_add) {
334 if (r.read_port3)
335 return BIFROST_WRITE_ADD_P2_READ_P3;
336 else
337 return BIFROST_WRITE_ADD_P2;
338 } else if (r.read_port3)
339 return BIFROST_READ_P3;
340 else
341 return BIFROST_REG_NONE;
342 }
343
344 /* Ditto but account for the first? flag this time */
345
346 static enum bifrost_reg_control
347 bi_pack_register_ctrl(struct bi_registers r)
348 {
349 enum bifrost_reg_control ctrl = bi_pack_register_ctrl_lo(r);
350
351 if (r.first_instruction) {
352 if (ctrl == BIFROST_REG_NONE)
353 ctrl = BIFROST_FIRST_NONE;
354 else if (ctrl == BIFROST_WRITE_FMA_P2_READ_P3)
355 ctrl = BIFROST_FIRST_WRITE_FMA_P2_READ_P3;
356 else
357 ctrl |= BIFROST_FIRST_NONE;
358 }
359
360 return ctrl;
361 }
362
363 static uint64_t
364 bi_pack_registers(struct bi_registers regs)
365 {
366 enum bifrost_reg_control ctrl = bi_pack_register_ctrl(regs);
367 struct bifrost_regs s = { 0 };
368 uint64_t packed = 0;
369
370 if (regs.enabled[1]) {
371 /* Gotta save that bit!~ Required by the 63-x trick */
372 assert(regs.port[1] > regs.port[0]);
373 assert(regs.enabled[0]);
374
375 /* Do the 63-x trick, see docs/disasm */
376 if (regs.port[0] > 31) {
377 regs.port[0] = 63 - regs.port[0];
378 regs.port[1] = 63 - regs.port[1];
379 }
380
381 assert(regs.port[0] <= 31);
382 assert(regs.port[1] <= 63);
383
384 s.ctrl = ctrl;
385 s.reg1 = regs.port[1];
386 s.reg0 = regs.port[0];
387 } else {
388 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
389 s.ctrl = 0;
390 s.reg1 = ctrl << 2;
391
392 if (regs.enabled[0]) {
393 /* Bit 0 upper bit of port 0 */
394 s.reg1 |= (regs.port[0] >> 5);
395
396 /* Rest of port 0 in usual spot */
397 s.reg0 = (regs.port[0] & 0b11111);
398 } else {
399 /* Bit 1 set if port 0 also disabled */
400 s.reg1 |= (1 << 1);
401 }
402 }
403
404 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
405 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
406
407 bool has_port2 = regs.write_fma || regs.write_add;
408 bool has_port3 = regs.read_port3 || (regs.write_fma && regs.write_add);
409
410 if (!has_port3)
411 regs.port[3] = regs.port[2];
412
413 if (!has_port2)
414 regs.port[2] = regs.port[3];
415
416 s.reg3 = regs.port[3];
417 s.reg2 = regs.port[2];
418 s.uniform_const = regs.uniform_constant;
419
420 memcpy(&packed, &s, sizeof(s));
421 return packed;
422 }
423
424 static void
425 bi_set_data_register(bi_clause *clause, unsigned idx)
426 {
427 assert(idx & BIR_INDEX_REGISTER);
428 unsigned reg = idx & ~BIR_INDEX_REGISTER;
429 assert(reg <= 63);
430 clause->data_register = reg;
431 }
432
433 static void
434 bi_read_data_register(bi_clause *clause, bi_instruction *ins)
435 {
436 bi_set_data_register(clause, ins->src[0]);
437 }
438
439 static void
440 bi_write_data_register(bi_clause *clause, bi_instruction *ins)
441 {
442 bi_set_data_register(clause, ins->dest);
443 }
444
445 static enum bifrost_packed_src
446 bi_get_src_reg_port(struct bi_registers *regs, unsigned src)
447 {
448 unsigned reg = src & ~BIR_INDEX_REGISTER;
449
450 if (regs->port[0] == reg && regs->enabled[0])
451 return BIFROST_SRC_PORT0;
452 else if (regs->port[1] == reg && regs->enabled[1])
453 return BIFROST_SRC_PORT1;
454 else if (regs->port[3] == reg && regs->read_port3)
455 return BIFROST_SRC_PORT3;
456 else
457 unreachable("Tried to access register with no port");
458 }
459
460 static enum bifrost_packed_src
461 bi_get_src(bi_instruction *ins, struct bi_registers *regs, unsigned s, bool is_fma)
462 {
463 unsigned src = ins->src[s];
464
465 if (src & BIR_INDEX_REGISTER)
466 return bi_get_src_reg_port(regs, src);
467 else if (src & BIR_INDEX_ZERO && is_fma)
468 return BIFROST_SRC_STAGE;
469 else if (src & BIR_INDEX_PASS)
470 return src & ~BIR_INDEX_PASS;
471 else
472 unreachable("Unknown src");
473 }
474
475 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
476 * 16-bit and written components must correspond to valid swizzles (component x
477 * or y). */
478
479 static unsigned
480 bi_swiz16(bi_instruction *ins, unsigned src)
481 {
482 assert(nir_alu_type_get_type_size(ins->src_types[src]) == 16);
483 unsigned swizzle = 0;
484
485 for (unsigned c = 0; c < 2; ++c) {
486 if (!bi_writes_component(ins, src)) continue;
487
488 unsigned k = ins->swizzle[src][c];
489 assert(k <= 1);
490 swizzle |= (k << c);
491 }
492
493 return swizzle;
494 }
495
496 static unsigned
497 bi_pack_fma_fma(bi_instruction *ins, struct bi_registers *regs)
498 {
499 /* (-a)(-b) = ab, so we only need one negate bit */
500 bool negate_mul = ins->src_neg[0] ^ ins->src_neg[1];
501
502 if (ins->op.mscale) {
503 assert(!(ins->src_abs[0] && ins->src_abs[1]));
504 assert(!ins->src_abs[2] || !ins->src_neg[3] || !ins->src_abs[3]);
505
506 /* We can have exactly one abs, and can flip the multiplication
507 * to make it fit if we have to */
508 bool flip_ab = ins->src_abs[1];
509
510 struct bifrost_fma_mscale pack = {
511 .src0 = bi_get_src(ins, regs, flip_ab ? 1 : 0, true),
512 .src1 = bi_get_src(ins, regs, flip_ab ? 0 : 1, true),
513 .src2 = bi_get_src(ins, regs, 2, true),
514 .src3 = bi_get_src(ins, regs, 3, true),
515 .mscale_mode = 0,
516 .mode = ins->outmod,
517 .src0_abs = ins->src_abs[0] || ins->src_abs[1],
518 .src1_neg = negate_mul,
519 .src2_neg = ins->src_neg[2],
520 .op = BIFROST_FMA_OP_MSCALE,
521 };
522
523 RETURN_PACKED(pack);
524 } else if (ins->dest_type == nir_type_float32) {
525 struct bifrost_fma_fma pack = {
526 .src0 = bi_get_src(ins, regs, 0, true),
527 .src1 = bi_get_src(ins, regs, 1, true),
528 .src2 = bi_get_src(ins, regs, 2, true),
529 .src0_abs = ins->src_abs[0],
530 .src1_abs = ins->src_abs[1],
531 .src2_abs = ins->src_abs[2],
532 .src0_neg = negate_mul,
533 .src2_neg = ins->src_neg[2],
534 .outmod = ins->outmod,
535 .roundmode = ins->roundmode,
536 .op = BIFROST_FMA_OP_FMA
537 };
538
539 RETURN_PACKED(pack);
540 } else if (ins->dest_type == nir_type_float16) {
541 struct bifrost_fma_fma16 pack = {
542 .src0 = bi_get_src(ins, regs, 0, true),
543 .src1 = bi_get_src(ins, regs, 1, true),
544 .src2 = bi_get_src(ins, regs, 2, true),
545 .swizzle_0 = bi_swiz16(ins, 0),
546 .swizzle_1 = bi_swiz16(ins, 1),
547 .swizzle_2 = bi_swiz16(ins, 2),
548 .src0_neg = negate_mul,
549 .src2_neg = ins->src_neg[2],
550 .outmod = ins->outmod,
551 .roundmode = ins->roundmode,
552 .op = BIFROST_FMA_OP_FMA16
553 };
554
555 RETURN_PACKED(pack);
556 } else {
557 unreachable("Invalid fma dest type");
558 }
559 }
560
561 static unsigned
562 bi_pack_fma_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
563 {
564 unsigned op =
565 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD32 :
566 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN32 :
567 BIFROST_FMA_OP_FMAX32;
568
569 struct bifrost_fma_add pack = {
570 .src0 = bi_get_src(ins, regs, 0, true),
571 .src1 = bi_get_src(ins, regs, 1, true),
572 .src0_abs = ins->src_abs[0],
573 .src1_abs = ins->src_abs[1],
574 .src0_neg = ins->src_neg[0],
575 .src1_neg = ins->src_neg[1],
576 .unk = 0x0,
577 .outmod = ins->outmod,
578 .roundmode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
579 .op = op
580 };
581
582 RETURN_PACKED(pack);
583 }
584
585 static unsigned
586 bi_pack_fmadd_min_f16(bi_instruction *ins, struct bi_registers *regs, bool FMA)
587 {
588 unsigned op =
589 (!FMA) ? ((ins->op.minmax == BI_MINMAX_MIN) ?
590 BIFROST_ADD_OP_FMIN16 : BIFROST_ADD_OP_FMAX16) :
591 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD16 :
592 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN16 :
593 BIFROST_FMA_OP_FMAX16;
594
595 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
596 * l be an auxiliary bit we encode. Then the hardware determines:
597 *
598 * abs0 = l || k
599 * abs1 = l && k
600 *
601 * Since add/min/max are commutative, this saves a bit by using the
602 * order of the operands as a bit (k). To pack this, first note:
603 *
604 * (l && k) implies (l || k).
605 *
606 * That is, if the second argument is abs'd, then the first argument
607 * also has abs. So there are three cases:
608 *
609 * Case 0: Neither src has absolute value. Then we have l = k = 0.
610 *
611 * Case 1: Exactly one src has absolute value. Assign that source to
612 * src0 and the other source to src1. Compute k = src1 < src0 based on
613 * that assignment. Then l = ~k.
614 *
615 * Case 2: Both sources have absolute value. Then we have l = k = 1.
616 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
617 * That is, this encoding is only valid if src1 and src0 are distinct.
618 * This is a scheduling restriction (XXX); if an op of this type
619 * requires both identical sources to have abs value, then we must
620 * schedule to ADD (which does not use this ordering trick).
621 */
622
623 unsigned abs_0 = ins->src_abs[0], abs_1 = ins->src_abs[1];
624 unsigned src_0 = bi_get_src(ins, regs, 0, true);
625 unsigned src_1 = bi_get_src(ins, regs, 1, true);
626 bool l = false;
627 bool flip = false;
628
629 assert(!(abs_0 && abs_1));
630
631 if (!abs_0 && !abs_1) {
632 /* Force k = 0 <===> NOT(src1 < src0) */
633 flip = (src_1 < src_0);
634 } else if (abs_0 && !abs_1) {
635 l = src_1 >= src_0;
636 } else if (abs_1 && !abs_0) {
637 flip = true;
638 l = src_0 >= src_1;
639 } else {
640 flip = (src_0 >= src_1);
641 l = true;
642 }
643
644 if (FMA) {
645 struct bifrost_fma_add_minmax16 pack = {
646 .src0 = flip ? src_1 : src_0,
647 .src1 = flip ? src_0 : src_1,
648 .src0_neg = ins->src_neg[flip ? 1 : 0],
649 .src1_neg = ins->src_neg[flip ? 0 : 1],
650 .abs1 = l,
651 .outmod = ins->outmod,
652 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
653 .op = op
654 };
655
656 RETURN_PACKED(pack);
657 } else {
658 /* Can't have modes for fp16 */
659 assert(ins->outmod == 0);
660
661 struct bifrost_add_fmin16 pack = {
662 .src0 = flip ? src_1 : src_0,
663 .src1 = flip ? src_0 : src_1,
664 .src0_neg = ins->src_neg[flip ? 1 : 0],
665 .src1_neg = ins->src_neg[flip ? 0 : 1],
666 .abs1 = l,
667 .src0_swizzle = bi_swiz16(ins, 0),
668 .src1_swizzle = bi_swiz16(ins, 1),
669 .mode = ins->minmax,
670 .op = op
671 };
672
673 RETURN_PACKED(pack);
674 }
675 }
676
677 static unsigned
678 bi_pack_fma_addmin(bi_instruction *ins, struct bi_registers *regs)
679 {
680 if (ins->dest_type == nir_type_float32)
681 return bi_pack_fma_addmin_f32(ins, regs);
682 else if(ins->dest_type == nir_type_float16)
683 return bi_pack_fmadd_min_f16(ins, regs, true);
684 else
685 unreachable("Unknown FMA/ADD type");
686 }
687
688 static unsigned
689 bi_pack_fma_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
690 {
691 struct bifrost_fma_inst pack = {
692 .src0 = bi_get_src(ins, regs, 0, true),
693 .op = op
694 };
695
696 RETURN_PACKED(pack);
697 }
698
699 static unsigned
700 bi_pack_fma_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
701 {
702 struct bifrost_fma_2src pack = {
703 .src0 = bi_get_src(ins, regs, 0, true),
704 .src1 = bi_get_src(ins, regs, 1, true),
705 .op = op
706 };
707
708 RETURN_PACKED(pack);
709 }
710
711 static unsigned
712 bi_pack_add_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
713 {
714 struct bifrost_add_inst pack = {
715 .src0 = bi_get_src(ins, regs, 0, true),
716 .op = op
717 };
718
719 RETURN_PACKED(pack);
720 }
721
722 static enum bifrost_csel_cond
723 bi_cond_to_csel(enum bi_cond cond, bool *flip, bool *invert, nir_alu_type T)
724 {
725 nir_alu_type B = nir_alu_type_get_base_type(T);
726 unsigned idx = (B == nir_type_float) ? 0 :
727 ((B == nir_type_int) ? 1 : 2);
728
729 switch (cond){
730 case BI_COND_LT:
731 *flip = true;
732 case BI_COND_GT: {
733 const enum bifrost_csel_cond ops[] = {
734 BIFROST_FGT_F,
735 BIFROST_IGT_I,
736 BIFROST_UGT_I
737 };
738
739 return ops[idx];
740 }
741 case BI_COND_LE:
742 *flip = true;
743 case BI_COND_GE: {
744 const enum bifrost_csel_cond ops[] = {
745 BIFROST_FGE_F,
746 BIFROST_IGE_I,
747 BIFROST_UGE_I
748 };
749
750 return ops[idx];
751 }
752 case BI_COND_NE:
753 *invert = true;
754 case BI_COND_EQ: {
755 const enum bifrost_csel_cond ops[] = {
756 BIFROST_FEQ_F,
757 BIFROST_IEQ_F,
758 BIFROST_IEQ_F /* sign is irrelevant */
759 };
760
761 return ops[idx];
762 }
763 default:
764 unreachable("Invalid op for csel");
765 }
766 }
767
768 static unsigned
769 bi_pack_fma_csel(bi_instruction *ins, struct bi_registers *regs)
770 {
771 /* TODO: Use csel3 as well */
772 bool flip = false, invert = false;
773
774 enum bifrost_csel_cond cond =
775 bi_cond_to_csel(ins->csel_cond, &flip, &invert, ins->src_types[0]);
776
777 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
778
779 unsigned cmp_0 = (flip ? 1 : 0);
780 unsigned cmp_1 = (flip ? 0 : 1);
781 unsigned res_0 = (invert ? 3 : 2);
782 unsigned res_1 = (invert ? 2 : 3);
783
784 struct bifrost_csel4 pack = {
785 .src0 = bi_get_src(ins, regs, cmp_0, true),
786 .src1 = bi_get_src(ins, regs, cmp_1, true),
787 .src2 = bi_get_src(ins, regs, res_0, true),
788 .src3 = bi_get_src(ins, regs, res_1, true),
789 .cond = cond,
790 .op = (size == 16) ? BIFROST_FMA_OP_CSEL4_V16 :
791 BIFROST_FMA_OP_CSEL4
792 };
793
794 RETURN_PACKED(pack);
795 }
796
797 static unsigned
798 bi_pack_fma_frexp(bi_instruction *ins, struct bi_registers *regs)
799 {
800 unsigned op = BIFROST_FMA_OP_FREXPE_LOG;
801 return bi_pack_fma_1src(ins, regs, op);
802 }
803
804 static unsigned
805 bi_pack_fma_reduce(bi_instruction *ins, struct bi_registers *regs)
806 {
807 if (ins->op.reduce == BI_REDUCE_ADD_FREXPM) {
808 return bi_pack_fma_2src(ins, regs, BIFROST_FMA_OP_ADD_FREXPM);
809 } else {
810 unreachable("Invalid reduce op");
811 }
812 }
813
814 /* We have a single convert opcode in the IR but a number of opcodes that could
815 * come out. In particular we have native opcodes for:
816 *
817 * [ui]16 --> [fui]32 -- int16_to_32
818 * f16 --> f32 -- float16_to_32
819 * f32 --> f16 -- float32_to_16
820 * f32 --> [ui]32 -- float32_to_int
821 * [ui]32 --> f32 -- int_to_float32
822 * [fui]16 --> [fui]16 -- f2i_i2f16
823 */
824
825 static unsigned
826 bi_pack_convert(bi_instruction *ins, struct bi_registers *regs, bool FMA)
827 {
828 nir_alu_type from_base = nir_alu_type_get_base_type(ins->src_types[0]);
829 unsigned from_size = nir_alu_type_get_type_size(ins->src_types[0]);
830 bool from_unsigned = from_base == nir_type_uint;
831
832 nir_alu_type to_base = nir_alu_type_get_base_type(ins->dest_type);
833 unsigned to_size = nir_alu_type_get_type_size(ins->dest_type);
834 bool to_unsigned = to_base == nir_type_uint;
835 bool to_float = to_base == nir_type_float;
836
837 /* Sanity check */
838 assert((from_base != to_base) || (from_size != to_size));
839 assert((MAX2(from_size, to_size) / MIN2(from_size, to_size)) <= 2);
840
841 /* f32 to f16 is special */
842 if (from_size == 32 && to_size == 16 && from_base == nir_type_float && to_base == from_base) {
843 /* TODO: second vectorized source? */
844 struct bifrost_fma_2src pfma = {
845 .src0 = bi_get_src(ins, regs, 0, true),
846 .src1 = BIFROST_SRC_STAGE, /* 0 */
847 .op = BIFROST_FMA_FLOAT32_TO_16
848 };
849
850 struct bifrost_add_2src padd = {
851 .src0 = bi_get_src(ins, regs, 0, true),
852 .src1 = BIFROST_SRC_STAGE, /* 0 */
853 .op = BIFROST_ADD_FLOAT32_TO_16
854 };
855
856 if (FMA) {
857 RETURN_PACKED(pfma);
858 } else {
859 RETURN_PACKED(padd);
860 }
861 }
862
863 /* Otherwise, figure out the mode */
864 unsigned op = 0;
865
866 if (from_size == 16 && to_size == 32) {
867 unsigned component = ins->swizzle[0][0];
868 assert(component <= 1);
869
870 if (from_base == nir_type_float)
871 op = BIFROST_CONVERT_5(component);
872 else
873 op = BIFROST_CONVERT_4(from_unsigned, component, to_float);
874 } else {
875 unsigned mode = 0;
876 unsigned swizzle = (from_size == 16) ? bi_swiz16(ins, 0) : 0;
877 bool is_unsigned = from_unsigned;
878
879 if (from_base == nir_type_float) {
880 assert(to_base != nir_type_float);
881 is_unsigned = to_unsigned;
882
883 if (from_size == 32 && to_size == 32)
884 mode = BIFROST_CONV_F32_TO_I32;
885 else if (from_size == 16 && to_size == 16)
886 mode = BIFROST_CONV_F16_TO_I16;
887 else
888 unreachable("Invalid float conversion");
889 } else {
890 assert(to_base == nir_type_float);
891 assert(from_size == to_size);
892
893 if (to_size == 32)
894 mode = BIFROST_CONV_I32_TO_F32;
895 else if (to_size == 16)
896 mode = BIFROST_CONV_I16_TO_F16;
897 else
898 unreachable("Invalid int conversion");
899 }
900
901 /* Fixup swizzle for 32-bit only modes */
902
903 if (mode == BIFROST_CONV_I32_TO_F32)
904 swizzle = 0b11;
905 else if (mode == BIFROST_CONV_F32_TO_I32)
906 swizzle = 0b10;
907
908 op = BIFROST_CONVERT(is_unsigned, ins->roundmode, swizzle, mode);
909
910 /* Unclear what the top bit is for... maybe 16-bit related */
911 bool mode2 = mode == BIFROST_CONV_F16_TO_I16;
912 bool mode6 = mode == BIFROST_CONV_I16_TO_F16;
913
914 if (!(mode2 || mode6))
915 op |= 0x100;
916 }
917
918 if (FMA)
919 return bi_pack_fma_1src(ins, regs, BIFROST_FMA_CONVERT | op);
920 else
921 return bi_pack_add_1src(ins, regs, BIFROST_ADD_CONVERT | op);
922 }
923
924 static unsigned
925 bi_pack_fma_select(bi_instruction *ins, struct bi_registers *regs)
926 {
927 unsigned size = nir_alu_type_get_type_size(ins->src_types[0]);
928
929 if (size == 16) {
930 unsigned swiz = (ins->swizzle[0][0] | (ins->swizzle[1][0] << 1));
931 unsigned op = BIFROST_FMA_SEL_16(swiz);
932 return bi_pack_fma_2src(ins, regs, op);
933 } else {
934 unreachable("Unimplemented");
935 }
936 }
937
938 static unsigned
939 bi_pack_fma(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
940 {
941 if (!bundle.fma)
942 return BIFROST_FMA_NOP;
943
944 switch (bundle.fma->type) {
945 case BI_ADD:
946 return bi_pack_fma_addmin(bundle.fma, regs);
947 case BI_CMP:
948 case BI_BITWISE:
949 return BIFROST_FMA_NOP;
950 case BI_CONVERT:
951 return bi_pack_convert(bundle.fma, regs, true);
952 case BI_CSEL:
953 return bi_pack_fma_csel(bundle.fma, regs);
954 case BI_FMA:
955 return bi_pack_fma_fma(bundle.fma, regs);
956 case BI_FREXP:
957 return bi_pack_fma_frexp(bundle.fma, regs);
958 case BI_ISUB:
959 return BIFROST_FMA_NOP;
960 case BI_MINMAX:
961 return bi_pack_fma_addmin(bundle.fma, regs);
962 case BI_MOV:
963 return bi_pack_fma_1src(bundle.fma, regs, BIFROST_FMA_OP_MOV);
964 case BI_SHIFT:
965 return BIFROST_FMA_NOP;
966 case BI_SELECT:
967 return bi_pack_fma_select(bundle.fma, regs);
968 case BI_ROUND:
969 return BIFROST_FMA_NOP;
970 case BI_REDUCE_FMA:
971 return bi_pack_fma_reduce(bundle.fma, regs);
972 default:
973 unreachable("Cannot encode class as FMA");
974 }
975 }
976
977 static unsigned
978 bi_pack_add_ld_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
979 {
980 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
981 assert(size == 32 || size == 16);
982
983 unsigned op = (size == 32) ?
984 BIFROST_ADD_OP_LD_VAR_32 :
985 BIFROST_ADD_OP_LD_VAR_16;
986
987 unsigned packed_addr = 0;
988
989 if (ins->src[0] & BIR_INDEX_CONSTANT) {
990 /* Direct uses address field directly */
991 packed_addr = bi_get_immediate(ins, 0);
992 assert(packed_addr < 0b1000);
993 } else {
994 /* Indirect gets an extra source */
995 packed_addr = bi_get_src(ins, regs, 0, false) | 0b11000;
996 }
997
998 /* The destination is thrown in the data register */
999 assert(ins->dest & BIR_INDEX_REGISTER);
1000 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
1001
1002 unsigned channels = ins->vector_channels;
1003 assert(channels >= 1 && channels <= 4);
1004
1005 struct bifrost_ld_var pack = {
1006 .src0 = bi_get_src(ins, regs, 1, false),
1007 .addr = packed_addr,
1008 .channels = MALI_POSITIVE(channels),
1009 .interp_mode = ins->load_vary.interp_mode,
1010 .reuse = ins->load_vary.reuse,
1011 .flat = ins->load_vary.flat,
1012 .op = op
1013 };
1014
1015 RETURN_PACKED(pack);
1016 }
1017
1018 static unsigned
1019 bi_pack_add_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
1020 {
1021 struct bifrost_add_2src pack = {
1022 .src0 = bi_get_src(ins, regs, 0, true),
1023 .src1 = bi_get_src(ins, regs, 1, true),
1024 .op = op
1025 };
1026
1027 RETURN_PACKED(pack);
1028 }
1029
1030 static unsigned
1031 bi_pack_add_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
1032 {
1033 unsigned op =
1034 (ins->type == BI_ADD) ? BIFROST_ADD_OP_FADD32 :
1035 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_ADD_OP_FMIN32 :
1036 BIFROST_ADD_OP_FMAX32;
1037
1038 struct bifrost_add_faddmin pack = {
1039 .src0 = bi_get_src(ins, regs, 0, true),
1040 .src1 = bi_get_src(ins, regs, 1, true),
1041 .src0_abs = ins->src_abs[0],
1042 .src1_abs = ins->src_abs[1],
1043 .src0_neg = ins->src_neg[0],
1044 .src1_neg = ins->src_neg[1],
1045 .outmod = ins->outmod,
1046 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
1047 .op = op
1048 };
1049
1050 RETURN_PACKED(pack);
1051 }
1052
1053 static unsigned
1054 bi_pack_add_add_f16(bi_instruction *ins, struct bi_registers *regs)
1055 {
1056 /* ADD.v2f16 can't have outmod */
1057 assert(ins->outmod == BIFROST_NONE);
1058
1059 struct bifrost_add_faddmin pack = {
1060 .src0 = bi_get_src(ins, regs, 0, true),
1061 .src1 = bi_get_src(ins, regs, 1, true),
1062 .src0_abs = ins->src_abs[0],
1063 .src1_abs = ins->src_abs[1],
1064 .src0_neg = ins->src_neg[0],
1065 .src1_neg = ins->src_neg[1],
1066 .select = bi_swiz16(ins, 0), /* swizzle_0 */
1067 .outmod = bi_swiz16(ins, 1), /* swizzle_1 */
1068 .mode = ins->roundmode,
1069 .op = BIFROST_ADD_OP_FADD16
1070 };
1071
1072 RETURN_PACKED(pack);
1073 }
1074
1075 static unsigned
1076 bi_pack_add_addmin(bi_instruction *ins, struct bi_registers *regs)
1077 {
1078 if (ins->dest_type == nir_type_float32)
1079 return bi_pack_add_addmin_f32(ins, regs);
1080 else if (ins->dest_type == nir_type_float16) {
1081 if (ins->type == BI_ADD)
1082 return bi_pack_add_add_f16(ins, regs);
1083 else
1084 return bi_pack_fmadd_min_f16(ins, regs, false);
1085 } else
1086 unreachable("Unknown FMA/ADD type");
1087 }
1088
1089 static unsigned
1090 bi_pack_add_ld_ubo(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1091 {
1092 assert(ins->vector_channels >= 1 && ins->vector_channels <= 4);
1093
1094 const unsigned ops[4] = {
1095 BIFROST_ADD_OP_LD_UBO_1,
1096 BIFROST_ADD_OP_LD_UBO_2,
1097 BIFROST_ADD_OP_LD_UBO_3,
1098 BIFROST_ADD_OP_LD_UBO_4
1099 };
1100
1101 bi_write_data_register(clause, ins);
1102 return bi_pack_add_2src(ins, regs, ops[ins->vector_channels - 1]);
1103 }
1104
1105 static enum bifrost_ldst_type
1106 bi_pack_ldst_type(nir_alu_type T)
1107 {
1108 switch (T) {
1109 case nir_type_float16: return BIFROST_LDST_F16;
1110 case nir_type_float32: return BIFROST_LDST_F32;
1111 case nir_type_int32: return BIFROST_LDST_I32;
1112 case nir_type_uint32: return BIFROST_LDST_U32;
1113 default: unreachable("Invalid type loaded");
1114 }
1115 }
1116
1117 static unsigned
1118 bi_pack_add_ld_var_addr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1119 {
1120 struct bifrost_ld_var_addr pack = {
1121 .src0 = bi_get_src(ins, regs, 1, false),
1122 .src1 = bi_get_src(ins, regs, 2, false),
1123 .location = bi_get_immediate(ins, 0),
1124 .type = bi_pack_ldst_type(ins->src_types[3]),
1125 .op = BIFROST_ADD_OP_LD_VAR_ADDR
1126 };
1127
1128 bi_write_data_register(clause, ins);
1129 RETURN_PACKED(pack);
1130 }
1131
1132 static unsigned
1133 bi_pack_add_ld_attr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1134 {
1135 assert(ins->vector_channels >= 0 && ins->vector_channels <= 4);
1136
1137 struct bifrost_ld_attr pack = {
1138 .src0 = bi_get_src(ins, regs, 1, false),
1139 .src1 = bi_get_src(ins, regs, 2, false),
1140 .location = bi_get_immediate(ins, 0),
1141 .channels = MALI_POSITIVE(ins->vector_channels),
1142 .type = bi_pack_ldst_type(ins->dest_type),
1143 .op = BIFROST_ADD_OP_LD_ATTR
1144 };
1145
1146 bi_write_data_register(clause, ins);
1147 RETURN_PACKED(pack);
1148 }
1149
1150 static unsigned
1151 bi_pack_add_st_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1152 {
1153 assert(ins->vector_channels >= 1 && ins->vector_channels <= 4);
1154
1155 struct bifrost_st_vary pack = {
1156 .src0 = bi_get_src(ins, regs, 1, false),
1157 .src1 = bi_get_src(ins, regs, 2, false),
1158 .src2 = bi_get_src(ins, regs, 3, false),
1159 .channels = MALI_POSITIVE(ins->vector_channels),
1160 .op = BIFROST_ADD_OP_ST_VAR
1161 };
1162
1163 bi_read_data_register(clause, ins);
1164 RETURN_PACKED(pack);
1165 }
1166
1167 static unsigned
1168 bi_pack_add_atest(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1169 {
1170 bool fp16 = (ins->src_types[1] == nir_type_float16);
1171
1172 struct bifrost_add_atest pack = {
1173 .src0 = bi_get_src(ins, regs, 0, false),
1174 .src1 = bi_get_src(ins, regs, 1, false),
1175 .half = fp16,
1176 .component = fp16 ? ins->swizzle[1][0] : 1, /* Set for fp32 */
1177 .op = BIFROST_ADD_OP_ATEST,
1178 };
1179
1180 /* Despite *also* writing with the usual mechanism... quirky and
1181 * perhaps unnecessary, but let's match the blob */
1182 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
1183
1184 RETURN_PACKED(pack);
1185 }
1186
1187 static unsigned
1188 bi_pack_add_blend(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1189 {
1190 struct bifrost_add_inst pack = {
1191 .src0 = bi_get_src(ins, regs, 1, false),
1192 .op = BIFROST_ADD_OP_BLEND
1193 };
1194
1195 /* TODO: Pack location in uniform_const */
1196 assert(ins->blend_location == 0);
1197
1198 bi_read_data_register(clause, ins);
1199 RETURN_PACKED(pack);
1200 }
1201
1202 static unsigned
1203 bi_pack_add_special(bi_instruction *ins, struct bi_registers *regs)
1204 {
1205 unsigned op = 0;
1206 bool fp16 = ins->dest_type == nir_type_float16;
1207 bool Y = ins->swizzle[0][0];
1208
1209 if (ins->op.special == BI_SPECIAL_FRCP) {
1210 op = fp16 ?
1211 (Y ? BIFROST_ADD_OP_FRCP_FAST_F16_Y :
1212 BIFROST_ADD_OP_FRCP_FAST_F16_X) :
1213 BIFROST_ADD_OP_FRCP_FAST_F32;
1214 } else if (ins->op.special == BI_SPECIAL_FRSQ) {
1215 op = fp16 ?
1216 (Y ? BIFROST_ADD_OP_FRSQ_FAST_F16_Y :
1217 BIFROST_ADD_OP_FRSQ_FAST_F16_X) :
1218 BIFROST_ADD_OP_FRSQ_FAST_F32;
1219
1220 } else if (ins->op.special == BI_SPECIAL_EXP2_LOW) {
1221 assert(!fp16);
1222 op = BIFROST_ADD_OP_FEXP2_FAST;
1223 } else {
1224 unreachable("Unknown special op");
1225 }
1226
1227 return bi_pack_add_1src(ins, regs, op);
1228 }
1229
1230 static unsigned
1231 bi_pack_add_table(bi_instruction *ins, struct bi_registers *regs)
1232 {
1233 unsigned op = 0;
1234 assert(ins->dest_type == nir_type_float32);
1235
1236 op = BIFROST_ADD_OP_LOG2_HELP;
1237 return bi_pack_add_1src(ins, regs, op);
1238 }
1239 static unsigned
1240 bi_pack_add_tex_compact(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1241 {
1242 bool f16 = ins->dest_type == nir_type_float16;
1243
1244 struct bifrost_tex_compact pack = {
1245 .src0 = bi_get_src(ins, regs, 0, false),
1246 .src1 = bi_get_src(ins, regs, 1, false),
1247 .op = f16 ? BIFROST_ADD_OP_TEX_COMPACT_F16 :
1248 BIFROST_ADD_OP_TEX_COMPACT_F32,
1249 .unknown = 1,
1250 .tex_index = 0,
1251 .sampler_index = 0
1252 };
1253
1254 bi_write_data_register(clause, ins);
1255 RETURN_PACKED(pack);
1256 }
1257
1258 static unsigned
1259 bi_pack_add(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
1260 {
1261 if (!bundle.add)
1262 return BIFROST_ADD_NOP;
1263
1264 switch (bundle.add->type) {
1265 case BI_ADD:
1266 return bi_pack_add_addmin(bundle.add, regs);
1267 case BI_ATEST:
1268 return bi_pack_add_atest(clause, bundle.add, regs);
1269 case BI_BRANCH:
1270 case BI_CMP:
1271 return BIFROST_ADD_NOP;
1272 case BI_BLEND:
1273 return bi_pack_add_blend(clause, bundle.add, regs);
1274 case BI_BITWISE:
1275 return BIFROST_ADD_NOP;
1276 case BI_CONVERT:
1277 return bi_pack_convert(bundle.add, regs, false);
1278 case BI_DISCARD:
1279 case BI_FREXP:
1280 case BI_ISUB:
1281 case BI_LOAD:
1282 return BIFROST_ADD_NOP;
1283 case BI_LOAD_ATTR:
1284 return bi_pack_add_ld_attr(clause, bundle.add, regs);
1285 case BI_LOAD_UNIFORM:
1286 return bi_pack_add_ld_ubo(clause, bundle.add, regs);
1287 case BI_LOAD_VAR:
1288 return bi_pack_add_ld_vary(clause, bundle.add, regs);
1289 case BI_LOAD_VAR_ADDRESS:
1290 return bi_pack_add_ld_var_addr(clause, bundle.add, regs);
1291 case BI_MINMAX:
1292 return bi_pack_add_addmin(bundle.add, regs);
1293 case BI_MOV:
1294 case BI_SHIFT:
1295 case BI_STORE:
1296 return BIFROST_ADD_NOP;
1297 case BI_STORE_VAR:
1298 return bi_pack_add_st_vary(clause, bundle.add, regs);
1299 case BI_SPECIAL:
1300 return bi_pack_add_special(bundle.add, regs);
1301 case BI_TABLE:
1302 return bi_pack_add_table(bundle.add, regs);
1303 case BI_SELECT:
1304 return BIFROST_ADD_NOP;
1305 case BI_TEX:
1306 if (bundle.add->op.texture == BI_TEX_COMPACT)
1307 return bi_pack_add_tex_compact(clause, bundle.add, regs);
1308 else
1309 unreachable("Unknown tex type");
1310 case BI_ROUND:
1311 return BIFROST_ADD_NOP;
1312 default:
1313 unreachable("Cannot encode class as ADD");
1314 }
1315 }
1316
1317 struct bi_packed_bundle {
1318 uint64_t lo;
1319 uint64_t hi;
1320 };
1321
1322 static struct bi_packed_bundle
1323 bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_bundle)
1324 {
1325 struct bi_registers regs = bi_assign_ports(bundle, prev);
1326 bi_assign_uniform_constant(clause, &regs, bundle);
1327 regs.first_instruction = first_bundle;
1328
1329 uint64_t reg = bi_pack_registers(regs);
1330 uint64_t fma = bi_pack_fma(clause, bundle, &regs);
1331 uint64_t add = bi_pack_add(clause, bundle, &regs);
1332
1333 struct bi_packed_bundle packed = {
1334 .lo = reg | (fma << 35) | ((add & 0b111111) << 58),
1335 .hi = add >> 6
1336 };
1337
1338 return packed;
1339 }
1340
1341 /* Packs the next two constants as a dedicated constant quadword at the end of
1342 * the clause, returning the number packed. */
1343
1344 static unsigned
1345 bi_pack_constants(bi_context *ctx, bi_clause *clause,
1346 unsigned index,
1347 struct util_dynarray *emission)
1348 {
1349 /* After these two, are we done? Determines tag */
1350 bool done = clause->constant_count <= (index + 2);
1351 bool only = clause->constant_count <= (index + 1);
1352
1353 /* TODO: Pos */
1354 assert(index == 0 && clause->bundle_count == 1);
1355 assert(only);
1356
1357 uint64_t hi = clause->constants[index + 0] >> 60ull;
1358
1359 struct bifrost_fmt_constant quad = {
1360 .pos = 0, /* TODO */
1361 .tag = done ? BIFROST_FMTC_FINAL : BIFROST_FMTC_CONSTANTS,
1362 .imm_1 = clause->constants[index + 0] >> 4,
1363 .imm_2 = ((hi < 8) ? (hi << 60ull) : 0) >> 4,
1364 };
1365
1366 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1367 * of the second constant with the first must be less than 8, otherwise
1368 * we have to swap them. On G52, I'm able to reproduce a similar issue
1369 * but with a different workaround (modeled above with a single
1370 * constant, unclear how to workaround for multiple constants.) Further
1371 * investigation needed. Possibly an errata. XXX */
1372
1373 util_dynarray_append(emission, struct bifrost_fmt_constant, quad);
1374
1375 return 2;
1376 }
1377
1378 static void
1379 bi_pack_clause(bi_context *ctx, bi_clause *clause, bi_clause *next,
1380 struct util_dynarray *emission)
1381 {
1382 struct bi_packed_bundle ins_1 = bi_pack_bundle(clause, clause->bundles[0], clause->bundles[0], true);
1383 assert(clause->bundle_count == 1);
1384
1385 /* Used to decide if we elide writes */
1386 bool is_fragment = ctx->stage == MESA_SHADER_FRAGMENT;
1387
1388 /* State for packing constants throughout */
1389 unsigned constant_index = 0;
1390
1391 struct bifrost_fmt1 quad_1 = {
1392 .tag = clause->constant_count ? BIFROST_FMT1_CONSTANTS : BIFROST_FMT1_FINAL,
1393 .header = bi_pack_header(clause, next, is_fragment),
1394 .ins_1 = ins_1.lo,
1395 .ins_2 = ins_1.hi & ((1 << 11) - 1),
1396 .ins_0 = (ins_1.hi >> 11) & 0b111,
1397 };
1398
1399 util_dynarray_append(emission, struct bifrost_fmt1, quad_1);
1400
1401 /* Pack the remaining constants */
1402
1403 while (constant_index < clause->constant_count) {
1404 constant_index += bi_pack_constants(ctx, clause,
1405 constant_index, emission);
1406 }
1407 }
1408
1409 static bi_clause *
1410 bi_next_clause(bi_context *ctx, pan_block *block, bi_clause *clause)
1411 {
1412 /* Try the next clause in this block */
1413 if (clause->link.next != &((bi_block *) block)->clauses)
1414 return list_first_entry(&(clause->link), bi_clause, link);
1415
1416 /* Try the next block, or the one after that if it's empty, etc .*/
1417 pan_block *next_block = pan_next_block(block);
1418
1419 bi_foreach_block_from(ctx, next_block, block) {
1420 bi_block *blk = (bi_block *) block;
1421
1422 if (!list_is_empty(&blk->clauses))
1423 return list_first_entry(&(blk->clauses), bi_clause, link);
1424 }
1425
1426 return NULL;
1427 }
1428
1429 void
1430 bi_pack(bi_context *ctx, struct util_dynarray *emission)
1431 {
1432 util_dynarray_init(emission, NULL);
1433
1434 bi_foreach_block(ctx, _block) {
1435 bi_block *block = (bi_block *) _block;
1436
1437 bi_foreach_clause_in_block(block, clause) {
1438 bi_clause *next = bi_next_clause(ctx, _block, clause);
1439 bi_pack_clause(ctx, clause, next, emission);
1440 }
1441 }
1442 }