2 * Copyright (C) 2020 Collabora, Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #define RETURN_PACKED(str) { \
28 memcpy(&temp, &str, sizeof(str)); \
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
37 bi_pack_header(bi_clause
*clause
, bi_clause
*next
, bool is_fragment
)
39 struct bifrost_header header
= {
40 .back_to_back
= clause
->back_to_back
,
41 .no_end_of_shader
= (next
!= NULL
),
42 .elide_writes
= is_fragment
,
43 .branch_cond
= clause
->branch_conditional
,
44 .datareg_writebarrier
= clause
->data_register_write_barrier
,
45 .datareg
= clause
->data_register
,
46 .scoreboard_deps
= next
? next
->dependencies
: 0,
47 .scoreboard_index
= clause
->scoreboard_id
,
48 .clause_type
= clause
->clause_type
,
49 .next_clause_type
= next
? next
->clause_type
: 0,
52 header
.branch_cond
|= header
.back_to_back
;
55 memcpy(&u
, &header
, sizeof(header
));
59 /* Represents the assignment of ports for a given bundle */
62 /* Register to assign to each port */
65 /* Read ports can be disabled */
68 /* Should we write FMA? what about ADD? If only a single port is
69 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
70 bool write_fma
, write_add
;
72 /* Should we read with port 3? */
75 /* Packed uniform/constant */
76 uint8_t uniform_constant
;
78 /* Whether writes are actually for the last instruction */
79 bool first_instruction
;
83 bi_print_ports(struct bi_registers
*regs
)
85 for (unsigned i
= 0; i
< 2; ++i
) {
87 printf("port %u: %u\n", i
, regs
->port
[i
]);
90 if (regs
->write_fma
|| regs
->write_add
) {
91 printf("port 2 (%s): %u\n",
92 regs
->write_add
? "ADD" : "FMA",
96 if ((regs
->write_fma
&& regs
->write_add
) || regs
->read_port3
) {
97 printf("port 3 (%s): %u\n",
98 regs
->read_port3
? "read" : "FMA",
103 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
104 * pushed uniform per bundle. Figure out which one we need in the bundle (the
105 * scheduler needs to ensure we only have one type per bundle), validate
106 * everything, and rewrite away the register/uniform indices to use 3-bit
107 * sources directly. */
110 bi_lookup_constant(bi_clause
*clause
, uint64_t cons
, bool *hi
, bool b64
)
112 uint64_t want
= (cons
>> 4);
114 for (unsigned i
= 0; i
< clause
->constant_count
; ++i
) {
115 /* Only check top 60-bits since that's what's actually embedded
116 * in the clause, the bottom 4-bits are bundle-inline */
118 uint64_t candidates
[2] = {
119 clause
->constants
[i
] >> 4,
120 clause
->constants
[i
] >> 36
123 /* For <64-bit mode, we treat lo/hi separately */
126 candidates
[0] &= (0xFFFFFFFF >> 4);
128 if (candidates
[0] == want
)
131 if (candidates
[1] == want
&& !b64
) {
137 unreachable("Invalid constant accessed");
141 bi_constant_field(unsigned idx
)
145 const unsigned values
[] = {
149 return values
[idx
] << 4;
153 bi_assign_uniform_constant_single(
154 struct bi_registers
*regs
,
156 bi_instruction
*ins
, bool assigned
, bool fast_zero
)
161 if (ins
->type
== BI_BLEND
) {
163 regs
->uniform_constant
= 0x8;
167 bi_foreach_src(ins
, s
) {
168 if (s
== 0 && (ins
->type
== BI_LOAD_VAR_ADDRESS
|| ins
->type
== BI_LOAD_ATTR
)) continue;
170 if (ins
->src
[s
] & BIR_INDEX_CONSTANT
) {
172 bool b64
= nir_alu_type_get_type_size(ins
->src_types
[s
]) > 32;
173 uint64_t cons
= bi_get_immediate(ins
, s
);
174 unsigned idx
= bi_lookup_constant(clause
, cons
, &hi
, b64
);
175 unsigned lo
= clause
->constants
[idx
] & 0xF;
176 unsigned f
= bi_constant_field(idx
) | lo
;
178 if (assigned
&& regs
->uniform_constant
!= f
)
179 unreachable("Mismatched uniform/const field: imm");
181 regs
->uniform_constant
= f
;
182 ins
->src
[s
] = BIR_INDEX_PASS
| (hi
? BIFROST_SRC_CONST_HI
: BIFROST_SRC_CONST_LO
);
184 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& (ins
->type
== BI_LOAD_UNIFORM
|| ins
->type
== BI_LOAD_VAR
)) {
185 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
186 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_HI
;
187 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& !fast_zero
) {
188 /* FMAs have a fast zero port, ADD needs to use the
189 * uniform/const port's special 0 mode handled here */
192 if (assigned
&& regs
->uniform_constant
!= f
)
193 unreachable("Mismatched uniform/const field: 0");
195 regs
->uniform_constant
= f
;
196 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_LO
;
198 } else if (s
& BIR_INDEX_UNIFORM
) {
199 unreachable("Push uniforms not implemented yet");
207 bi_assign_uniform_constant(
209 struct bi_registers
*regs
,
213 bi_assign_uniform_constant_single(regs
, clause
, bundle
.fma
, false, true);
215 bi_assign_uniform_constant_single(regs
, clause
, bundle
.add
, assigned
, false);
218 /* Assigns a port for reading, before anything is written */
221 bi_assign_port_read(struct bi_registers
*regs
, unsigned src
)
223 /* We only assign for registers */
224 if (!(src
& BIR_INDEX_REGISTER
))
227 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
229 /* Check if we already assigned the port */
230 for (unsigned i
= 0; i
<= 1; ++i
) {
231 if (regs
->port
[i
] == reg
&& regs
->enabled
[i
])
235 if (regs
->port
[3] == reg
&& regs
->read_port3
)
240 for (unsigned i
= 0; i
<= 1; ++i
) {
241 if (!regs
->enabled
[i
]) {
243 regs
->enabled
[i
] = true;
248 if (!regs
->read_port3
) {
250 regs
->read_port3
= true;
254 bi_print_ports(regs
);
255 unreachable("Failed to find a free port for src");
258 static struct bi_registers
259 bi_assign_ports(bi_bundle now
, bi_bundle prev
)
261 struct bi_registers regs
= { 0 };
263 /* We assign ports for the main register mechanism. Special ops
264 * use the data registers, which has its own mechanism entirely
265 * and thus gets skipped over here. */
267 unsigned read_dreg
= now
.add
&&
268 bi_class_props
[now
.add
->type
] & BI_DATA_REG_SRC
;
270 unsigned write_dreg
= prev
.add
&&
271 bi_class_props
[prev
.add
->type
] & BI_DATA_REG_DEST
;
273 /* First, assign reads */
276 bi_foreach_src(now
.fma
, src
)
277 bi_assign_port_read(®s
, now
.fma
->src
[src
]);
280 bi_foreach_src(now
.add
, src
) {
281 if (!(src
== 0 && read_dreg
))
282 bi_assign_port_read(®s
, now
.add
->src
[src
]);
286 /* Next, assign writes */
288 if (prev
.add
&& prev
.add
->dest
& BIR_INDEX_REGISTER
&& !write_dreg
) {
289 regs
.port
[2] = prev
.add
->dest
& ~BIR_INDEX_REGISTER
;
290 regs
.write_add
= true;
293 if (prev
.fma
&& prev
.fma
->dest
& BIR_INDEX_REGISTER
) {
294 unsigned r
= prev
.fma
->dest
& ~BIR_INDEX_REGISTER
;
296 if (regs
.write_add
) {
297 /* Scheduler constraint: cannot read 3 and write 2 */
298 assert(!regs
.read_port3
);
304 regs
.write_fma
= true;
307 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
309 if (regs
.enabled
[0] && regs
.enabled
[1] && regs
.port
[1] < regs
.port
[0]) {
310 unsigned temp
= regs
.port
[0];
311 regs
.port
[0] = regs
.port
[1];
318 /* Determines the register control field, ignoring the first? flag */
320 static enum bifrost_reg_control
321 bi_pack_register_ctrl_lo(struct bi_registers r
)
325 assert(!r
.read_port3
);
326 return BIFROST_WRITE_ADD_P2_FMA_P3
;
329 return BIFROST_WRITE_FMA_P2_READ_P3
;
331 return BIFROST_WRITE_FMA_P2
;
333 } else if (r
.write_add
) {
335 return BIFROST_WRITE_ADD_P2_READ_P3
;
337 return BIFROST_WRITE_ADD_P2
;
338 } else if (r
.read_port3
)
339 return BIFROST_READ_P3
;
341 return BIFROST_REG_NONE
;
344 /* Ditto but account for the first? flag this time */
346 static enum bifrost_reg_control
347 bi_pack_register_ctrl(struct bi_registers r
)
349 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl_lo(r
);
351 if (r
.first_instruction
) {
352 if (ctrl
== BIFROST_REG_NONE
)
353 ctrl
= BIFROST_FIRST_NONE
;
354 else if (ctrl
== BIFROST_WRITE_FMA_P2_READ_P3
)
355 ctrl
= BIFROST_FIRST_WRITE_FMA_P2_READ_P3
;
357 ctrl
|= BIFROST_FIRST_NONE
;
364 bi_pack_registers(struct bi_registers regs
)
366 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl(regs
);
367 struct bifrost_regs s
= { 0 };
370 if (regs
.enabled
[1]) {
371 /* Gotta save that bit!~ Required by the 63-x trick */
372 assert(regs
.port
[1] > regs
.port
[0]);
373 assert(regs
.enabled
[0]);
375 /* Do the 63-x trick, see docs/disasm */
376 if (regs
.port
[0] > 31) {
377 regs
.port
[0] = 63 - regs
.port
[0];
378 regs
.port
[1] = 63 - regs
.port
[1];
381 assert(regs
.port
[0] <= 31);
382 assert(regs
.port
[1] <= 63);
385 s
.reg1
= regs
.port
[1];
386 s
.reg0
= regs
.port
[0];
388 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
392 if (regs
.enabled
[0]) {
393 /* Bit 0 upper bit of port 0 */
394 s
.reg1
|= (regs
.port
[0] >> 5);
396 /* Rest of port 0 in usual spot */
397 s
.reg0
= (regs
.port
[0] & 0b11111);
399 /* Bit 1 set if port 0 also disabled */
404 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
405 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
407 bool has_port2
= regs
.write_fma
|| regs
.write_add
;
408 bool has_port3
= regs
.read_port3
|| (regs
.write_fma
&& regs
.write_add
);
411 regs
.port
[3] = regs
.port
[2];
414 regs
.port
[2] = regs
.port
[3];
416 s
.reg3
= regs
.port
[3];
417 s
.reg2
= regs
.port
[2];
418 s
.uniform_const
= regs
.uniform_constant
;
420 memcpy(&packed
, &s
, sizeof(s
));
425 bi_set_data_register(bi_clause
*clause
, unsigned idx
)
427 assert(idx
& BIR_INDEX_REGISTER
);
428 unsigned reg
= idx
& ~BIR_INDEX_REGISTER
;
430 clause
->data_register
= reg
;
434 bi_read_data_register(bi_clause
*clause
, bi_instruction
*ins
)
436 bi_set_data_register(clause
, ins
->src
[0]);
440 bi_write_data_register(bi_clause
*clause
, bi_instruction
*ins
)
442 bi_set_data_register(clause
, ins
->dest
);
445 static enum bifrost_packed_src
446 bi_get_src_reg_port(struct bi_registers
*regs
, unsigned src
)
448 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
450 if (regs
->port
[0] == reg
&& regs
->enabled
[0])
451 return BIFROST_SRC_PORT0
;
452 else if (regs
->port
[1] == reg
&& regs
->enabled
[1])
453 return BIFROST_SRC_PORT1
;
454 else if (regs
->port
[3] == reg
&& regs
->read_port3
)
455 return BIFROST_SRC_PORT3
;
457 unreachable("Tried to access register with no port");
460 static enum bifrost_packed_src
461 bi_get_src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned s
, bool is_fma
)
463 unsigned src
= ins
->src
[s
];
465 if (src
& BIR_INDEX_REGISTER
)
466 return bi_get_src_reg_port(regs
, src
);
467 else if (src
& BIR_INDEX_ZERO
&& is_fma
)
468 return BIFROST_SRC_STAGE
;
469 else if (src
& BIR_INDEX_PASS
)
470 return src
& ~BIR_INDEX_PASS
;
472 unreachable("Unknown src");
475 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
476 * 16-bit and written components must correspond to valid swizzles (component x
480 bi_swiz16(bi_instruction
*ins
, unsigned src
)
482 assert(nir_alu_type_get_type_size(ins
->src_types
[src
]) == 16);
483 unsigned swizzle
= 0;
485 for (unsigned c
= 0; c
< 2; ++c
) {
486 if (!bi_writes_component(ins
, src
)) continue;
488 unsigned k
= ins
->swizzle
[src
][c
];
497 bi_pack_fma_fma(bi_instruction
*ins
, struct bi_registers
*regs
)
499 /* (-a)(-b) = ab, so we only need one negate bit */
500 bool negate_mul
= ins
->src_neg
[0] ^ ins
->src_neg
[1];
502 if (ins
->op
.mscale
) {
503 assert(!(ins
->src_abs
[0] && ins
->src_abs
[1]));
504 assert(!ins
->src_abs
[2] || !ins
->src_neg
[3] || !ins
->src_abs
[3]);
506 /* We can have exactly one abs, and can flip the multiplication
507 * to make it fit if we have to */
508 bool flip_ab
= ins
->src_abs
[1];
510 struct bifrost_fma_mscale pack
= {
511 .src0
= bi_get_src(ins
, regs
, flip_ab
? 1 : 0, true),
512 .src1
= bi_get_src(ins
, regs
, flip_ab
? 0 : 1, true),
513 .src2
= bi_get_src(ins
, regs
, 2, true),
514 .src3
= bi_get_src(ins
, regs
, 3, true),
517 .src0_abs
= ins
->src_abs
[0] || ins
->src_abs
[1],
518 .src1_neg
= negate_mul
,
519 .src2_neg
= ins
->src_neg
[2],
520 .op
= BIFROST_FMA_OP_MSCALE
,
524 } else if (ins
->dest_type
== nir_type_float32
) {
525 struct bifrost_fma_fma pack
= {
526 .src0
= bi_get_src(ins
, regs
, 0, true),
527 .src1
= bi_get_src(ins
, regs
, 1, true),
528 .src2
= bi_get_src(ins
, regs
, 2, true),
529 .src0_abs
= ins
->src_abs
[0],
530 .src1_abs
= ins
->src_abs
[1],
531 .src2_abs
= ins
->src_abs
[2],
532 .src0_neg
= negate_mul
,
533 .src2_neg
= ins
->src_neg
[2],
534 .outmod
= ins
->outmod
,
535 .roundmode
= ins
->roundmode
,
536 .op
= BIFROST_FMA_OP_FMA
540 } else if (ins
->dest_type
== nir_type_float16
) {
541 struct bifrost_fma_fma16 pack
= {
542 .src0
= bi_get_src(ins
, regs
, 0, true),
543 .src1
= bi_get_src(ins
, regs
, 1, true),
544 .src2
= bi_get_src(ins
, regs
, 2, true),
545 .swizzle_0
= bi_swiz16(ins
, 0),
546 .swizzle_1
= bi_swiz16(ins
, 1),
547 .swizzle_2
= bi_swiz16(ins
, 2),
548 .src0_neg
= negate_mul
,
549 .src2_neg
= ins
->src_neg
[2],
550 .outmod
= ins
->outmod
,
551 .roundmode
= ins
->roundmode
,
552 .op
= BIFROST_FMA_OP_FMA16
557 unreachable("Invalid fma dest type");
562 bi_pack_fma_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
565 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD32
:
566 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN32
:
567 BIFROST_FMA_OP_FMAX32
;
569 struct bifrost_fma_add pack
= {
570 .src0
= bi_get_src(ins
, regs
, 0, true),
571 .src1
= bi_get_src(ins
, regs
, 1, true),
572 .src0_abs
= ins
->src_abs
[0],
573 .src1_abs
= ins
->src_abs
[1],
574 .src0_neg
= ins
->src_neg
[0],
575 .src1_neg
= ins
->src_neg
[1],
577 .outmod
= ins
->outmod
,
578 .roundmode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
586 bi_pack_fmadd_min_f16(bi_instruction
*ins
, struct bi_registers
*regs
, bool FMA
)
589 (!FMA
) ? ((ins
->op
.minmax
== BI_MINMAX_MIN
) ?
590 BIFROST_ADD_OP_FMIN16
: BIFROST_ADD_OP_FMAX16
) :
591 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD16
:
592 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN16
:
593 BIFROST_FMA_OP_FMAX16
;
595 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
596 * l be an auxiliary bit we encode. Then the hardware determines:
601 * Since add/min/max are commutative, this saves a bit by using the
602 * order of the operands as a bit (k). To pack this, first note:
604 * (l && k) implies (l || k).
606 * That is, if the second argument is abs'd, then the first argument
607 * also has abs. So there are three cases:
609 * Case 0: Neither src has absolute value. Then we have l = k = 0.
611 * Case 1: Exactly one src has absolute value. Assign that source to
612 * src0 and the other source to src1. Compute k = src1 < src0 based on
613 * that assignment. Then l = ~k.
615 * Case 2: Both sources have absolute value. Then we have l = k = 1.
616 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
617 * That is, this encoding is only valid if src1 and src0 are distinct.
618 * This is a scheduling restriction (XXX); if an op of this type
619 * requires both identical sources to have abs value, then we must
620 * schedule to ADD (which does not use this ordering trick).
623 unsigned abs_0
= ins
->src_abs
[0], abs_1
= ins
->src_abs
[1];
624 unsigned src_0
= bi_get_src(ins
, regs
, 0, true);
625 unsigned src_1
= bi_get_src(ins
, regs
, 1, true);
629 assert(!(abs_0
&& abs_1
));
631 if (!abs_0
&& !abs_1
) {
632 /* Force k = 0 <===> NOT(src1 < src0) */
633 flip
= (src_1
< src_0
);
634 } else if (abs_0
&& !abs_1
) {
636 } else if (abs_1
&& !abs_0
) {
640 flip
= (src_0
>= src_1
);
645 struct bifrost_fma_add_minmax16 pack
= {
646 .src0
= flip
? src_1
: src_0
,
647 .src1
= flip
? src_0
: src_1
,
648 .src0_neg
= ins
->src_neg
[flip
? 1 : 0],
649 .src1_neg
= ins
->src_neg
[flip
? 0 : 1],
651 .outmod
= ins
->outmod
,
652 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
658 /* Can't have modes for fp16 */
659 assert(ins
->outmod
== 0);
661 struct bifrost_add_fmin16 pack
= {
662 .src0
= flip
? src_1
: src_0
,
663 .src1
= flip
? src_0
: src_1
,
664 .src0_neg
= ins
->src_neg
[flip
? 1 : 0],
665 .src1_neg
= ins
->src_neg
[flip
? 0 : 1],
667 .src0_swizzle
= bi_swiz16(ins
, 0),
668 .src1_swizzle
= bi_swiz16(ins
, 1),
678 bi_pack_fma_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
680 if (ins
->dest_type
== nir_type_float32
)
681 return bi_pack_fma_addmin_f32(ins
, regs
);
682 else if(ins
->dest_type
== nir_type_float16
)
683 return bi_pack_fmadd_min_f16(ins
, regs
, true);
685 unreachable("Unknown FMA/ADD type");
689 bi_pack_fma_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
691 struct bifrost_fma_inst pack
= {
692 .src0
= bi_get_src(ins
, regs
, 0, true),
700 bi_pack_fma_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
702 struct bifrost_fma_2src pack
= {
703 .src0
= bi_get_src(ins
, regs
, 0, true),
704 .src1
= bi_get_src(ins
, regs
, 1, true),
712 bi_pack_add_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
714 struct bifrost_add_inst pack
= {
715 .src0
= bi_get_src(ins
, regs
, 0, true),
722 static enum bifrost_csel_cond
723 bi_cond_to_csel(enum bi_cond cond
, bool *flip
, bool *invert
, nir_alu_type T
)
725 nir_alu_type B
= nir_alu_type_get_base_type(T
);
726 unsigned idx
= (B
== nir_type_float
) ? 0 :
727 ((B
== nir_type_int
) ? 1 : 2);
733 const enum bifrost_csel_cond ops
[] = {
744 const enum bifrost_csel_cond ops
[] = {
755 const enum bifrost_csel_cond ops
[] = {
758 BIFROST_IEQ_F
/* sign is irrelevant */
764 unreachable("Invalid op for csel");
769 bi_pack_fma_csel(bi_instruction
*ins
, struct bi_registers
*regs
)
771 /* TODO: Use csel3 as well */
772 bool flip
= false, invert
= false;
774 enum bifrost_csel_cond cond
=
775 bi_cond_to_csel(ins
->csel_cond
, &flip
, &invert
, ins
->src_types
[0]);
777 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
779 unsigned cmp_0
= (flip
? 1 : 0);
780 unsigned cmp_1
= (flip
? 0 : 1);
781 unsigned res_0
= (invert
? 3 : 2);
782 unsigned res_1
= (invert
? 2 : 3);
784 struct bifrost_csel4 pack
= {
785 .src0
= bi_get_src(ins
, regs
, cmp_0
, true),
786 .src1
= bi_get_src(ins
, regs
, cmp_1
, true),
787 .src2
= bi_get_src(ins
, regs
, res_0
, true),
788 .src3
= bi_get_src(ins
, regs
, res_1
, true),
790 .op
= (size
== 16) ? BIFROST_FMA_OP_CSEL4_V16
:
798 bi_pack_fma_frexp(bi_instruction
*ins
, struct bi_registers
*regs
)
800 unsigned op
= BIFROST_FMA_OP_FREXPE_LOG
;
801 return bi_pack_fma_1src(ins
, regs
, op
);
805 bi_pack_fma_reduce(bi_instruction
*ins
, struct bi_registers
*regs
)
807 if (ins
->op
.reduce
== BI_REDUCE_ADD_FREXPM
) {
808 return bi_pack_fma_2src(ins
, regs
, BIFROST_FMA_OP_ADD_FREXPM
);
810 unreachable("Invalid reduce op");
814 /* We have a single convert opcode in the IR but a number of opcodes that could
815 * come out. In particular we have native opcodes for:
817 * [ui]16 --> [fui]32 -- int16_to_32
818 * f16 --> f32 -- float16_to_32
819 * f32 --> f16 -- float32_to_16
820 * f32 --> [ui]32 -- float32_to_int
821 * [ui]32 --> f32 -- int_to_float32
822 * [fui]16 --> [fui]16 -- f2i_i2f16
826 bi_pack_convert(bi_instruction
*ins
, struct bi_registers
*regs
, bool FMA
)
828 nir_alu_type from_base
= nir_alu_type_get_base_type(ins
->src_types
[0]);
829 unsigned from_size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
830 bool from_unsigned
= from_base
== nir_type_uint
;
832 nir_alu_type to_base
= nir_alu_type_get_base_type(ins
->dest_type
);
833 unsigned to_size
= nir_alu_type_get_type_size(ins
->dest_type
);
834 bool to_unsigned
= to_base
== nir_type_uint
;
835 bool to_float
= to_base
== nir_type_float
;
838 assert((from_base
!= to_base
) || (from_size
!= to_size
));
839 assert((MAX2(from_size
, to_size
) / MIN2(from_size
, to_size
)) <= 2);
841 /* f32 to f16 is special */
842 if (from_size
== 32 && to_size
== 16 && from_base
== nir_type_float
&& to_base
== from_base
) {
843 /* TODO: second vectorized source? */
844 struct bifrost_fma_2src pfma
= {
845 .src0
= bi_get_src(ins
, regs
, 0, true),
846 .src1
= BIFROST_SRC_STAGE
, /* 0 */
847 .op
= BIFROST_FMA_FLOAT32_TO_16
850 struct bifrost_add_2src padd
= {
851 .src0
= bi_get_src(ins
, regs
, 0, true),
852 .src1
= BIFROST_SRC_STAGE
, /* 0 */
853 .op
= BIFROST_ADD_FLOAT32_TO_16
863 /* Otherwise, figure out the mode */
866 if (from_size
== 16 && to_size
== 32) {
867 unsigned component
= ins
->swizzle
[0][0];
868 assert(component
<= 1);
870 if (from_base
== nir_type_float
)
871 op
= BIFROST_CONVERT_5(component
);
873 op
= BIFROST_CONVERT_4(from_unsigned
, component
, to_float
);
876 unsigned swizzle
= (from_size
== 16) ? bi_swiz16(ins
, 0) : 0;
877 bool is_unsigned
= from_unsigned
;
879 if (from_base
== nir_type_float
) {
880 assert(to_base
!= nir_type_float
);
881 is_unsigned
= to_unsigned
;
883 if (from_size
== 32 && to_size
== 32)
884 mode
= BIFROST_CONV_F32_TO_I32
;
885 else if (from_size
== 16 && to_size
== 16)
886 mode
= BIFROST_CONV_F16_TO_I16
;
888 unreachable("Invalid float conversion");
890 assert(to_base
== nir_type_float
);
891 assert(from_size
== to_size
);
894 mode
= BIFROST_CONV_I32_TO_F32
;
895 else if (to_size
== 16)
896 mode
= BIFROST_CONV_I16_TO_F16
;
898 unreachable("Invalid int conversion");
901 /* Fixup swizzle for 32-bit only modes */
903 if (mode
== BIFROST_CONV_I32_TO_F32
)
905 else if (mode
== BIFROST_CONV_F32_TO_I32
)
908 op
= BIFROST_CONVERT(is_unsigned
, ins
->roundmode
, swizzle
, mode
);
910 /* Unclear what the top bit is for... maybe 16-bit related */
911 bool mode2
= mode
== BIFROST_CONV_F16_TO_I16
;
912 bool mode6
= mode
== BIFROST_CONV_I16_TO_F16
;
914 if (!(mode2
|| mode6
))
919 return bi_pack_fma_1src(ins
, regs
, BIFROST_FMA_CONVERT
| op
);
921 return bi_pack_add_1src(ins
, regs
, BIFROST_ADD_CONVERT
| op
);
925 bi_pack_fma_select(bi_instruction
*ins
, struct bi_registers
*regs
)
927 unsigned size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
930 unsigned swiz
= (ins
->swizzle
[0][0] | (ins
->swizzle
[1][0] << 1));
931 unsigned op
= BIFROST_FMA_SEL_16(swiz
);
932 return bi_pack_fma_2src(ins
, regs
, op
);
933 } else if (size
== 8) {
936 for (unsigned c
= 0; c
< 4; ++c
) {
937 if (ins
->swizzle
[c
][0]) {
938 /* Ensure lowering restriction is met */
939 assert(ins
->swizzle
[c
][0] == 2);
944 struct bifrost_fma_sel8 pack
= {
945 .src0
= bi_get_src(ins
, regs
, 0, true),
946 .src1
= bi_get_src(ins
, regs
, 1, true),
947 .src2
= bi_get_src(ins
, regs
, 2, true),
948 .src3
= bi_get_src(ins
, regs
, 3, true),
950 .op
= BIFROST_FMA_OP_SEL8
955 unreachable("Unimplemented");
960 bi_pack_fma(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
963 return BIFROST_FMA_NOP
;
965 switch (bundle
.fma
->type
) {
967 return bi_pack_fma_addmin(bundle
.fma
, regs
);
970 return BIFROST_FMA_NOP
;
972 return bi_pack_convert(bundle
.fma
, regs
, true);
974 return bi_pack_fma_csel(bundle
.fma
, regs
);
976 return bi_pack_fma_fma(bundle
.fma
, regs
);
978 return bi_pack_fma_frexp(bundle
.fma
, regs
);
980 return BIFROST_FMA_NOP
;
982 return bi_pack_fma_addmin(bundle
.fma
, regs
);
984 return bi_pack_fma_1src(bundle
.fma
, regs
, BIFROST_FMA_OP_MOV
);
986 return BIFROST_FMA_NOP
;
988 return bi_pack_fma_select(bundle
.fma
, regs
);
990 return BIFROST_FMA_NOP
;
992 return bi_pack_fma_reduce(bundle
.fma
, regs
);
994 unreachable("Cannot encode class as FMA");
999 bi_pack_add_ld_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1001 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
1002 assert(size
== 32 || size
== 16);
1004 unsigned op
= (size
== 32) ?
1005 BIFROST_ADD_OP_LD_VAR_32
:
1006 BIFROST_ADD_OP_LD_VAR_16
;
1008 unsigned packed_addr
= 0;
1010 if (ins
->src
[0] & BIR_INDEX_CONSTANT
) {
1011 /* Direct uses address field directly */
1012 packed_addr
= bi_get_immediate(ins
, 0);
1013 assert(packed_addr
< 0b1000);
1015 /* Indirect gets an extra source */
1016 packed_addr
= bi_get_src(ins
, regs
, 0, false) | 0b11000;
1019 /* The destination is thrown in the data register */
1020 assert(ins
->dest
& BIR_INDEX_REGISTER
);
1021 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
1023 unsigned channels
= ins
->vector_channels
;
1024 assert(channels
>= 1 && channels
<= 4);
1026 struct bifrost_ld_var pack
= {
1027 .src0
= bi_get_src(ins
, regs
, 1, false),
1028 .addr
= packed_addr
,
1029 .channels
= MALI_POSITIVE(channels
),
1030 .interp_mode
= ins
->load_vary
.interp_mode
,
1031 .reuse
= ins
->load_vary
.reuse
,
1032 .flat
= ins
->load_vary
.flat
,
1036 RETURN_PACKED(pack
);
1040 bi_pack_add_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
1042 struct bifrost_add_2src pack
= {
1043 .src0
= bi_get_src(ins
, regs
, 0, true),
1044 .src1
= bi_get_src(ins
, regs
, 1, true),
1048 RETURN_PACKED(pack
);
1052 bi_pack_add_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
1055 (ins
->type
== BI_ADD
) ? BIFROST_ADD_OP_FADD32
:
1056 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_ADD_OP_FMIN32
:
1057 BIFROST_ADD_OP_FMAX32
;
1059 struct bifrost_add_faddmin pack
= {
1060 .src0
= bi_get_src(ins
, regs
, 0, true),
1061 .src1
= bi_get_src(ins
, regs
, 1, true),
1062 .src0_abs
= ins
->src_abs
[0],
1063 .src1_abs
= ins
->src_abs
[1],
1064 .src0_neg
= ins
->src_neg
[0],
1065 .src1_neg
= ins
->src_neg
[1],
1066 .outmod
= ins
->outmod
,
1067 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
1071 RETURN_PACKED(pack
);
1075 bi_pack_add_add_f16(bi_instruction
*ins
, struct bi_registers
*regs
)
1077 /* ADD.v2f16 can't have outmod */
1078 assert(ins
->outmod
== BIFROST_NONE
);
1080 struct bifrost_add_faddmin pack
= {
1081 .src0
= bi_get_src(ins
, regs
, 0, true),
1082 .src1
= bi_get_src(ins
, regs
, 1, true),
1083 .src0_abs
= ins
->src_abs
[0],
1084 .src1_abs
= ins
->src_abs
[1],
1085 .src0_neg
= ins
->src_neg
[0],
1086 .src1_neg
= ins
->src_neg
[1],
1087 .select
= bi_swiz16(ins
, 0), /* swizzle_0 */
1088 .outmod
= bi_swiz16(ins
, 1), /* swizzle_1 */
1089 .mode
= ins
->roundmode
,
1090 .op
= BIFROST_ADD_OP_FADD16
1093 RETURN_PACKED(pack
);
1097 bi_pack_add_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
1099 if (ins
->dest_type
== nir_type_float32
)
1100 return bi_pack_add_addmin_f32(ins
, regs
);
1101 else if (ins
->dest_type
== nir_type_float16
) {
1102 if (ins
->type
== BI_ADD
)
1103 return bi_pack_add_add_f16(ins
, regs
);
1105 return bi_pack_fmadd_min_f16(ins
, regs
, false);
1107 unreachable("Unknown FMA/ADD type");
1111 bi_pack_add_ld_ubo(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1113 assert(ins
->vector_channels
>= 1 && ins
->vector_channels
<= 4);
1115 const unsigned ops
[4] = {
1116 BIFROST_ADD_OP_LD_UBO_1
,
1117 BIFROST_ADD_OP_LD_UBO_2
,
1118 BIFROST_ADD_OP_LD_UBO_3
,
1119 BIFROST_ADD_OP_LD_UBO_4
1122 bi_write_data_register(clause
, ins
);
1123 return bi_pack_add_2src(ins
, regs
, ops
[ins
->vector_channels
- 1]);
1126 static enum bifrost_ldst_type
1127 bi_pack_ldst_type(nir_alu_type T
)
1130 case nir_type_float16
: return BIFROST_LDST_F16
;
1131 case nir_type_float32
: return BIFROST_LDST_F32
;
1132 case nir_type_int32
: return BIFROST_LDST_I32
;
1133 case nir_type_uint32
: return BIFROST_LDST_U32
;
1134 default: unreachable("Invalid type loaded");
1139 bi_pack_add_ld_var_addr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1141 struct bifrost_ld_var_addr pack
= {
1142 .src0
= bi_get_src(ins
, regs
, 1, false),
1143 .src1
= bi_get_src(ins
, regs
, 2, false),
1144 .location
= bi_get_immediate(ins
, 0),
1145 .type
= bi_pack_ldst_type(ins
->src_types
[3]),
1146 .op
= BIFROST_ADD_OP_LD_VAR_ADDR
1149 bi_write_data_register(clause
, ins
);
1150 RETURN_PACKED(pack
);
1154 bi_pack_add_ld_attr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1156 assert(ins
->vector_channels
>= 0 && ins
->vector_channels
<= 4);
1158 struct bifrost_ld_attr pack
= {
1159 .src0
= bi_get_src(ins
, regs
, 1, false),
1160 .src1
= bi_get_src(ins
, regs
, 2, false),
1161 .location
= bi_get_immediate(ins
, 0),
1162 .channels
= MALI_POSITIVE(ins
->vector_channels
),
1163 .type
= bi_pack_ldst_type(ins
->dest_type
),
1164 .op
= BIFROST_ADD_OP_LD_ATTR
1167 bi_write_data_register(clause
, ins
);
1168 RETURN_PACKED(pack
);
1172 bi_pack_add_st_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1174 assert(ins
->vector_channels
>= 1 && ins
->vector_channels
<= 4);
1176 struct bifrost_st_vary pack
= {
1177 .src0
= bi_get_src(ins
, regs
, 1, false),
1178 .src1
= bi_get_src(ins
, regs
, 2, false),
1179 .src2
= bi_get_src(ins
, regs
, 3, false),
1180 .channels
= MALI_POSITIVE(ins
->vector_channels
),
1181 .op
= BIFROST_ADD_OP_ST_VAR
1184 bi_read_data_register(clause
, ins
);
1185 RETURN_PACKED(pack
);
1189 bi_pack_add_atest(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1191 bool fp16
= (ins
->src_types
[1] == nir_type_float16
);
1193 struct bifrost_add_atest pack
= {
1194 .src0
= bi_get_src(ins
, regs
, 0, false),
1195 .src1
= bi_get_src(ins
, regs
, 1, false),
1197 .component
= fp16
? ins
->swizzle
[1][0] : 1, /* Set for fp32 */
1198 .op
= BIFROST_ADD_OP_ATEST
,
1201 /* Despite *also* writing with the usual mechanism... quirky and
1202 * perhaps unnecessary, but let's match the blob */
1203 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
1205 RETURN_PACKED(pack
);
1209 bi_pack_add_blend(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1211 struct bifrost_add_inst pack
= {
1212 .src0
= bi_get_src(ins
, regs
, 1, false),
1213 .op
= BIFROST_ADD_OP_BLEND
1216 /* TODO: Pack location in uniform_const */
1217 assert(ins
->blend_location
== 0);
1219 bi_read_data_register(clause
, ins
);
1220 RETURN_PACKED(pack
);
1224 bi_pack_add_special(bi_instruction
*ins
, struct bi_registers
*regs
)
1227 bool fp16
= ins
->dest_type
== nir_type_float16
;
1228 bool Y
= ins
->swizzle
[0][0];
1230 if (ins
->op
.special
== BI_SPECIAL_FRCP
) {
1232 (Y
? BIFROST_ADD_OP_FRCP_FAST_F16_Y
:
1233 BIFROST_ADD_OP_FRCP_FAST_F16_X
) :
1234 BIFROST_ADD_OP_FRCP_FAST_F32
;
1235 } else if (ins
->op
.special
== BI_SPECIAL_FRSQ
) {
1237 (Y
? BIFROST_ADD_OP_FRSQ_FAST_F16_Y
:
1238 BIFROST_ADD_OP_FRSQ_FAST_F16_X
) :
1239 BIFROST_ADD_OP_FRSQ_FAST_F32
;
1241 } else if (ins
->op
.special
== BI_SPECIAL_EXP2_LOW
) {
1243 op
= BIFROST_ADD_OP_FEXP2_FAST
;
1245 unreachable("Unknown special op");
1248 return bi_pack_add_1src(ins
, regs
, op
);
1252 bi_pack_add_table(bi_instruction
*ins
, struct bi_registers
*regs
)
1255 assert(ins
->dest_type
== nir_type_float32
);
1257 op
= BIFROST_ADD_OP_LOG2_HELP
;
1258 return bi_pack_add_1src(ins
, regs
, op
);
1261 bi_pack_add_tex_compact(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1263 bool f16
= ins
->dest_type
== nir_type_float16
;
1265 struct bifrost_tex_compact pack
= {
1266 .src0
= bi_get_src(ins
, regs
, 0, false),
1267 .src1
= bi_get_src(ins
, regs
, 1, false),
1268 .op
= f16
? BIFROST_ADD_OP_TEX_COMPACT_F16
:
1269 BIFROST_ADD_OP_TEX_COMPACT_F32
,
1275 bi_write_data_register(clause
, ins
);
1276 RETURN_PACKED(pack
);
1280 bi_pack_add_select(bi_instruction
*ins
, struct bi_registers
*regs
)
1282 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
1285 unsigned swiz
= (ins
->swizzle
[0][0] | (ins
->swizzle
[1][0] << 1));
1286 unsigned op
= BIFROST_ADD_SEL_16(swiz
);
1287 return bi_pack_add_2src(ins
, regs
, op
);
1291 bi_pack_add(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
1294 return BIFROST_ADD_NOP
;
1296 switch (bundle
.add
->type
) {
1298 return bi_pack_add_addmin(bundle
.add
, regs
);
1300 return bi_pack_add_atest(clause
, bundle
.add
, regs
);
1303 return BIFROST_ADD_NOP
;
1305 return bi_pack_add_blend(clause
, bundle
.add
, regs
);
1307 return BIFROST_ADD_NOP
;
1309 return bi_pack_convert(bundle
.add
, regs
, false);
1314 return BIFROST_ADD_NOP
;
1316 return bi_pack_add_ld_attr(clause
, bundle
.add
, regs
);
1317 case BI_LOAD_UNIFORM
:
1318 return bi_pack_add_ld_ubo(clause
, bundle
.add
, regs
);
1320 return bi_pack_add_ld_vary(clause
, bundle
.add
, regs
);
1321 case BI_LOAD_VAR_ADDRESS
:
1322 return bi_pack_add_ld_var_addr(clause
, bundle
.add
, regs
);
1324 return bi_pack_add_addmin(bundle
.add
, regs
);
1328 return BIFROST_ADD_NOP
;
1330 return bi_pack_add_st_vary(clause
, bundle
.add
, regs
);
1332 return bi_pack_add_special(bundle
.add
, regs
);
1334 return bi_pack_add_table(bundle
.add
, regs
);
1336 return bi_pack_add_select(bundle
.add
, regs
);
1338 if (bundle
.add
->op
.texture
== BI_TEX_COMPACT
)
1339 return bi_pack_add_tex_compact(clause
, bundle
.add
, regs
);
1341 unreachable("Unknown tex type");
1343 return BIFROST_ADD_NOP
;
1345 unreachable("Cannot encode class as ADD");
1349 struct bi_packed_bundle
{
1354 static struct bi_packed_bundle
1355 bi_pack_bundle(bi_clause
*clause
, bi_bundle bundle
, bi_bundle prev
, bool first_bundle
)
1357 struct bi_registers regs
= bi_assign_ports(bundle
, prev
);
1358 bi_assign_uniform_constant(clause
, ®s
, bundle
);
1359 regs
.first_instruction
= first_bundle
;
1361 uint64_t reg
= bi_pack_registers(regs
);
1362 uint64_t fma
= bi_pack_fma(clause
, bundle
, ®s
);
1363 uint64_t add
= bi_pack_add(clause
, bundle
, ®s
);
1365 struct bi_packed_bundle packed
= {
1366 .lo
= reg
| (fma
<< 35) | ((add
& 0b111111) << 58),
1373 /* Packs the next two constants as a dedicated constant quadword at the end of
1374 * the clause, returning the number packed. */
1377 bi_pack_constants(bi_context
*ctx
, bi_clause
*clause
,
1379 struct util_dynarray
*emission
)
1381 /* After these two, are we done? Determines tag */
1382 bool done
= clause
->constant_count
<= (index
+ 2);
1383 bool only
= clause
->constant_count
<= (index
+ 1);
1386 assert(index
== 0 && clause
->bundle_count
== 1);
1389 uint64_t hi
= clause
->constants
[index
+ 0] >> 60ull;
1391 struct bifrost_fmt_constant quad
= {
1392 .pos
= 0, /* TODO */
1393 .tag
= done
? BIFROST_FMTC_FINAL
: BIFROST_FMTC_CONSTANTS
,
1394 .imm_1
= clause
->constants
[index
+ 0] >> 4,
1395 .imm_2
= ((hi
< 8) ? (hi
<< 60ull) : 0) >> 4,
1398 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1399 * of the second constant with the first must be less than 8, otherwise
1400 * we have to swap them. On G52, I'm able to reproduce a similar issue
1401 * but with a different workaround (modeled above with a single
1402 * constant, unclear how to workaround for multiple constants.) Further
1403 * investigation needed. Possibly an errata. XXX */
1405 util_dynarray_append(emission
, struct bifrost_fmt_constant
, quad
);
1411 bi_pack_clause(bi_context
*ctx
, bi_clause
*clause
, bi_clause
*next
,
1412 struct util_dynarray
*emission
)
1414 struct bi_packed_bundle ins_1
= bi_pack_bundle(clause
, clause
->bundles
[0], clause
->bundles
[0], true);
1415 assert(clause
->bundle_count
== 1);
1417 /* Used to decide if we elide writes */
1418 bool is_fragment
= ctx
->stage
== MESA_SHADER_FRAGMENT
;
1420 /* State for packing constants throughout */
1421 unsigned constant_index
= 0;
1423 struct bifrost_fmt1 quad_1
= {
1424 .tag
= clause
->constant_count
? BIFROST_FMT1_CONSTANTS
: BIFROST_FMT1_FINAL
,
1425 .header
= bi_pack_header(clause
, next
, is_fragment
),
1427 .ins_2
= ins_1
.hi
& ((1 << 11) - 1),
1428 .ins_0
= (ins_1
.hi
>> 11) & 0b111,
1431 util_dynarray_append(emission
, struct bifrost_fmt1
, quad_1
);
1433 /* Pack the remaining constants */
1435 while (constant_index
< clause
->constant_count
) {
1436 constant_index
+= bi_pack_constants(ctx
, clause
,
1437 constant_index
, emission
);
1442 bi_next_clause(bi_context
*ctx
, pan_block
*block
, bi_clause
*clause
)
1444 /* Try the next clause in this block */
1445 if (clause
->link
.next
!= &((bi_block
*) block
)->clauses
)
1446 return list_first_entry(&(clause
->link
), bi_clause
, link
);
1448 /* Try the next block, or the one after that if it's empty, etc .*/
1449 pan_block
*next_block
= pan_next_block(block
);
1451 bi_foreach_block_from(ctx
, next_block
, block
) {
1452 bi_block
*blk
= (bi_block
*) block
;
1454 if (!list_is_empty(&blk
->clauses
))
1455 return list_first_entry(&(blk
->clauses
), bi_clause
, link
);
1462 bi_pack(bi_context
*ctx
, struct util_dynarray
*emission
)
1464 util_dynarray_init(emission
, NULL
);
1466 bi_foreach_block(ctx
, _block
) {
1467 bi_block
*block
= (bi_block
*) _block
;
1469 bi_foreach_clause_in_block(block
, clause
) {
1470 bi_clause
*next
= bi_next_clause(ctx
, _block
, clause
);
1471 bi_pack_clause(ctx
, clause
, next
, emission
);