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pan/bi: Pack fma.fcmp16
[mesa.git] / src / panfrost / bifrost / bi_pack.c
1 /*
2 * Copyright (C) 2020 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "compiler.h"
25
26 #define RETURN_PACKED(str) { \
27 uint64_t temp = 0; \
28 memcpy(&temp, &str, sizeof(str)); \
29 return temp; \
30 }
31
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
35
36 static uint64_t
37 bi_pack_header(bi_clause *clause, bi_clause *next, bool is_fragment)
38 {
39 struct bifrost_header header = {
40 .back_to_back = clause->back_to_back,
41 .no_end_of_shader = (next != NULL),
42 .elide_writes = is_fragment,
43 .branch_cond = clause->branch_conditional,
44 .datareg_writebarrier = clause->data_register_write_barrier,
45 .datareg = clause->data_register,
46 .scoreboard_deps = next ? next->dependencies : 0,
47 .scoreboard_index = clause->scoreboard_id,
48 .clause_type = clause->clause_type,
49 .next_clause_type = next ? next->clause_type : 0,
50 };
51
52 header.branch_cond |= header.back_to_back;
53
54 uint64_t u = 0;
55 memcpy(&u, &header, sizeof(header));
56 return u;
57 }
58
59 /* Represents the assignment of ports for a given bundle */
60
61 struct bi_registers {
62 /* Register to assign to each port */
63 unsigned port[4];
64
65 /* Read ports can be disabled */
66 bool enabled[2];
67
68 /* Should we write FMA? what about ADD? If only a single port is
69 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
70 bool write_fma, write_add;
71
72 /* Should we read with port 3? */
73 bool read_port3;
74
75 /* Packed uniform/constant */
76 uint8_t uniform_constant;
77
78 /* Whether writes are actually for the last instruction */
79 bool first_instruction;
80 };
81
82 static inline void
83 bi_print_ports(struct bi_registers *regs)
84 {
85 for (unsigned i = 0; i < 2; ++i) {
86 if (regs->enabled[i])
87 printf("port %u: %u\n", i, regs->port[i]);
88 }
89
90 if (regs->write_fma || regs->write_add) {
91 printf("port 2 (%s): %u\n",
92 regs->write_add ? "ADD" : "FMA",
93 regs->port[2]);
94 }
95
96 if ((regs->write_fma && regs->write_add) || regs->read_port3) {
97 printf("port 3 (%s): %u\n",
98 regs->read_port3 ? "read" : "FMA",
99 regs->port[3]);
100 }
101 }
102
103 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
104 * pushed uniform per bundle. Figure out which one we need in the bundle (the
105 * scheduler needs to ensure we only have one type per bundle), validate
106 * everything, and rewrite away the register/uniform indices to use 3-bit
107 * sources directly. */
108
109 static unsigned
110 bi_lookup_constant(bi_clause *clause, uint64_t cons, bool *hi, bool b64)
111 {
112 uint64_t want = (cons >> 4);
113
114 for (unsigned i = 0; i < clause->constant_count; ++i) {
115 /* Only check top 60-bits since that's what's actually embedded
116 * in the clause, the bottom 4-bits are bundle-inline */
117
118 uint64_t candidates[2] = {
119 clause->constants[i] >> 4,
120 clause->constants[i] >> 36
121 };
122
123 /* For <64-bit mode, we treat lo/hi separately */
124
125 if (!b64)
126 candidates[0] &= (0xFFFFFFFF >> 4);
127
128 if (candidates[0] == want)
129 return i;
130
131 if (candidates[1] == want && !b64) {
132 *hi = true;
133 return i;
134 }
135 }
136
137 unreachable("Invalid constant accessed");
138 }
139
140 static unsigned
141 bi_constant_field(unsigned idx)
142 {
143 assert(idx <= 5);
144
145 const unsigned values[] = {
146 4, 5, 6, 7, 2, 3
147 };
148
149 return values[idx] << 4;
150 }
151
152 static bool
153 bi_assign_uniform_constant_single(
154 struct bi_registers *regs,
155 bi_clause *clause,
156 bi_instruction *ins, bool assigned, bool fast_zero)
157 {
158 if (!ins)
159 return assigned;
160
161 if (ins->type == BI_BLEND) {
162 assert(!assigned);
163 regs->uniform_constant = 0x8;
164 return true;
165 }
166
167 bi_foreach_src(ins, s) {
168 if (s == 0 && (ins->type == BI_LOAD_VAR_ADDRESS || ins->type == BI_LOAD_ATTR)) continue;
169
170 if (ins->src[s] & BIR_INDEX_CONSTANT) {
171 bool hi = false;
172 bool b64 = nir_alu_type_get_type_size(ins->src_types[s]) > 32;
173 uint64_t cons = bi_get_immediate(ins, s);
174 unsigned idx = bi_lookup_constant(clause, cons, &hi, b64);
175 unsigned lo = clause->constants[idx] & 0xF;
176 unsigned f = bi_constant_field(idx) | lo;
177
178 if (assigned && regs->uniform_constant != f)
179 unreachable("Mismatched uniform/const field: imm");
180
181 regs->uniform_constant = f;
182 ins->src[s] = BIR_INDEX_PASS | (hi ? BIFROST_SRC_CONST_HI : BIFROST_SRC_CONST_LO);
183 assigned = true;
184 } else if (ins->src[s] & BIR_INDEX_ZERO && (ins->type == BI_LOAD_UNIFORM || ins->type == BI_LOAD_VAR)) {
185 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
186 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_HI;
187 } else if (ins->src[s] & BIR_INDEX_ZERO && !fast_zero) {
188 /* FMAs have a fast zero port, ADD needs to use the
189 * uniform/const port's special 0 mode handled here */
190 unsigned f = 0;
191
192 if (assigned && regs->uniform_constant != f)
193 unreachable("Mismatched uniform/const field: 0");
194
195 regs->uniform_constant = f;
196 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_LO;
197 assigned = true;
198 } else if (s & BIR_INDEX_UNIFORM) {
199 unreachable("Push uniforms not implemented yet");
200 }
201 }
202
203 return assigned;
204 }
205
206 static void
207 bi_assign_uniform_constant(
208 bi_clause *clause,
209 struct bi_registers *regs,
210 bi_bundle bundle)
211 {
212 bool assigned =
213 bi_assign_uniform_constant_single(regs, clause, bundle.fma, false, true);
214
215 bi_assign_uniform_constant_single(regs, clause, bundle.add, assigned, false);
216 }
217
218 /* Assigns a port for reading, before anything is written */
219
220 static void
221 bi_assign_port_read(struct bi_registers *regs, unsigned src)
222 {
223 /* We only assign for registers */
224 if (!(src & BIR_INDEX_REGISTER))
225 return;
226
227 unsigned reg = src & ~BIR_INDEX_REGISTER;
228
229 /* Check if we already assigned the port */
230 for (unsigned i = 0; i <= 1; ++i) {
231 if (regs->port[i] == reg && regs->enabled[i])
232 return;
233 }
234
235 if (regs->port[3] == reg && regs->read_port3)
236 return;
237
238 /* Assign it now */
239
240 for (unsigned i = 0; i <= 1; ++i) {
241 if (!regs->enabled[i]) {
242 regs->port[i] = reg;
243 regs->enabled[i] = true;
244 return;
245 }
246 }
247
248 if (!regs->read_port3) {
249 regs->port[3] = reg;
250 regs->read_port3 = true;
251 return;
252 }
253
254 bi_print_ports(regs);
255 unreachable("Failed to find a free port for src");
256 }
257
258 static struct bi_registers
259 bi_assign_ports(bi_bundle now, bi_bundle prev)
260 {
261 struct bi_registers regs = { 0 };
262
263 /* We assign ports for the main register mechanism. Special ops
264 * use the data registers, which has its own mechanism entirely
265 * and thus gets skipped over here. */
266
267 unsigned read_dreg = now.add &&
268 bi_class_props[now.add->type] & BI_DATA_REG_SRC;
269
270 unsigned write_dreg = prev.add &&
271 bi_class_props[prev.add->type] & BI_DATA_REG_DEST;
272
273 /* First, assign reads */
274
275 if (now.fma)
276 bi_foreach_src(now.fma, src)
277 bi_assign_port_read(&regs, now.fma->src[src]);
278
279 if (now.add) {
280 bi_foreach_src(now.add, src) {
281 if (!(src == 0 && read_dreg))
282 bi_assign_port_read(&regs, now.add->src[src]);
283 }
284 }
285
286 /* Next, assign writes */
287
288 if (prev.add && prev.add->dest & BIR_INDEX_REGISTER && !write_dreg) {
289 regs.port[2] = prev.add->dest & ~BIR_INDEX_REGISTER;
290 regs.write_add = true;
291 }
292
293 if (prev.fma && prev.fma->dest & BIR_INDEX_REGISTER) {
294 unsigned r = prev.fma->dest & ~BIR_INDEX_REGISTER;
295
296 if (regs.write_add) {
297 /* Scheduler constraint: cannot read 3 and write 2 */
298 assert(!regs.read_port3);
299 regs.port[3] = r;
300 } else {
301 regs.port[2] = r;
302 }
303
304 regs.write_fma = true;
305 }
306
307 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
308
309 if (regs.enabled[0] && regs.enabled[1] && regs.port[1] < regs.port[0]) {
310 unsigned temp = regs.port[0];
311 regs.port[0] = regs.port[1];
312 regs.port[1] = temp;
313 }
314
315 return regs;
316 }
317
318 /* Determines the register control field, ignoring the first? flag */
319
320 static enum bifrost_reg_control
321 bi_pack_register_ctrl_lo(struct bi_registers r)
322 {
323 if (r.write_fma) {
324 if (r.write_add) {
325 assert(!r.read_port3);
326 return BIFROST_WRITE_ADD_P2_FMA_P3;
327 } else {
328 if (r.read_port3)
329 return BIFROST_WRITE_FMA_P2_READ_P3;
330 else
331 return BIFROST_WRITE_FMA_P2;
332 }
333 } else if (r.write_add) {
334 if (r.read_port3)
335 return BIFROST_WRITE_ADD_P2_READ_P3;
336 else
337 return BIFROST_WRITE_ADD_P2;
338 } else if (r.read_port3)
339 return BIFROST_READ_P3;
340 else
341 return BIFROST_REG_NONE;
342 }
343
344 /* Ditto but account for the first? flag this time */
345
346 static enum bifrost_reg_control
347 bi_pack_register_ctrl(struct bi_registers r)
348 {
349 enum bifrost_reg_control ctrl = bi_pack_register_ctrl_lo(r);
350
351 if (r.first_instruction) {
352 if (ctrl == BIFROST_REG_NONE)
353 ctrl = BIFROST_FIRST_NONE;
354 else if (ctrl == BIFROST_WRITE_FMA_P2_READ_P3)
355 ctrl = BIFROST_FIRST_WRITE_FMA_P2_READ_P3;
356 else
357 ctrl |= BIFROST_FIRST_NONE;
358 }
359
360 return ctrl;
361 }
362
363 static uint64_t
364 bi_pack_registers(struct bi_registers regs)
365 {
366 enum bifrost_reg_control ctrl = bi_pack_register_ctrl(regs);
367 struct bifrost_regs s = { 0 };
368 uint64_t packed = 0;
369
370 if (regs.enabled[1]) {
371 /* Gotta save that bit!~ Required by the 63-x trick */
372 assert(regs.port[1] > regs.port[0]);
373 assert(regs.enabled[0]);
374
375 /* Do the 63-x trick, see docs/disasm */
376 if (regs.port[0] > 31) {
377 regs.port[0] = 63 - regs.port[0];
378 regs.port[1] = 63 - regs.port[1];
379 }
380
381 assert(regs.port[0] <= 31);
382 assert(regs.port[1] <= 63);
383
384 s.ctrl = ctrl;
385 s.reg1 = regs.port[1];
386 s.reg0 = regs.port[0];
387 } else {
388 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
389 s.ctrl = 0;
390 s.reg1 = ctrl << 2;
391
392 if (regs.enabled[0]) {
393 /* Bit 0 upper bit of port 0 */
394 s.reg1 |= (regs.port[0] >> 5);
395
396 /* Rest of port 0 in usual spot */
397 s.reg0 = (regs.port[0] & 0b11111);
398 } else {
399 /* Bit 1 set if port 0 also disabled */
400 s.reg1 |= (1 << 1);
401 }
402 }
403
404 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
405 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
406
407 bool has_port2 = regs.write_fma || regs.write_add;
408 bool has_port3 = regs.read_port3 || (regs.write_fma && regs.write_add);
409
410 if (!has_port3)
411 regs.port[3] = regs.port[2];
412
413 if (!has_port2)
414 regs.port[2] = regs.port[3];
415
416 s.reg3 = regs.port[3];
417 s.reg2 = regs.port[2];
418 s.uniform_const = regs.uniform_constant;
419
420 memcpy(&packed, &s, sizeof(s));
421 return packed;
422 }
423
424 static void
425 bi_set_data_register(bi_clause *clause, unsigned idx)
426 {
427 assert(idx & BIR_INDEX_REGISTER);
428 unsigned reg = idx & ~BIR_INDEX_REGISTER;
429 assert(reg <= 63);
430 clause->data_register = reg;
431 }
432
433 static void
434 bi_read_data_register(bi_clause *clause, bi_instruction *ins)
435 {
436 bi_set_data_register(clause, ins->src[0]);
437 }
438
439 static void
440 bi_write_data_register(bi_clause *clause, bi_instruction *ins)
441 {
442 bi_set_data_register(clause, ins->dest);
443 }
444
445 static enum bifrost_packed_src
446 bi_get_src_reg_port(struct bi_registers *regs, unsigned src)
447 {
448 unsigned reg = src & ~BIR_INDEX_REGISTER;
449
450 if (regs->port[0] == reg && regs->enabled[0])
451 return BIFROST_SRC_PORT0;
452 else if (regs->port[1] == reg && regs->enabled[1])
453 return BIFROST_SRC_PORT1;
454 else if (regs->port[3] == reg && regs->read_port3)
455 return BIFROST_SRC_PORT3;
456 else
457 unreachable("Tried to access register with no port");
458 }
459
460 static enum bifrost_packed_src
461 bi_get_src(bi_instruction *ins, struct bi_registers *regs, unsigned s, bool is_fma)
462 {
463 unsigned src = ins->src[s];
464
465 if (src & BIR_INDEX_REGISTER)
466 return bi_get_src_reg_port(regs, src);
467 else if (src & BIR_INDEX_ZERO && is_fma)
468 return BIFROST_SRC_STAGE;
469 else if (src & BIR_INDEX_PASS)
470 return src & ~BIR_INDEX_PASS;
471 else
472 unreachable("Unknown src");
473 }
474
475 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
476 * 16-bit and written components must correspond to valid swizzles (component x
477 * or y). */
478
479 static unsigned
480 bi_swiz16(bi_instruction *ins, unsigned src)
481 {
482 assert(nir_alu_type_get_type_size(ins->src_types[src]) == 16);
483 unsigned swizzle = 0;
484
485 for (unsigned c = 0; c < 2; ++c) {
486 if (!bi_writes_component(ins, src)) continue;
487
488 unsigned k = ins->swizzle[src][c];
489 assert(k <= 1);
490 swizzle |= (k << c);
491 }
492
493 return swizzle;
494 }
495
496 static unsigned
497 bi_pack_fma_fma(bi_instruction *ins, struct bi_registers *regs)
498 {
499 /* (-a)(-b) = ab, so we only need one negate bit */
500 bool negate_mul = ins->src_neg[0] ^ ins->src_neg[1];
501
502 if (ins->op.mscale) {
503 assert(!(ins->src_abs[0] && ins->src_abs[1]));
504 assert(!ins->src_abs[2] || !ins->src_neg[3] || !ins->src_abs[3]);
505
506 /* We can have exactly one abs, and can flip the multiplication
507 * to make it fit if we have to */
508 bool flip_ab = ins->src_abs[1];
509
510 struct bifrost_fma_mscale pack = {
511 .src0 = bi_get_src(ins, regs, flip_ab ? 1 : 0, true),
512 .src1 = bi_get_src(ins, regs, flip_ab ? 0 : 1, true),
513 .src2 = bi_get_src(ins, regs, 2, true),
514 .src3 = bi_get_src(ins, regs, 3, true),
515 .mscale_mode = 0,
516 .mode = ins->outmod,
517 .src0_abs = ins->src_abs[0] || ins->src_abs[1],
518 .src1_neg = negate_mul,
519 .src2_neg = ins->src_neg[2],
520 .op = BIFROST_FMA_OP_MSCALE,
521 };
522
523 RETURN_PACKED(pack);
524 } else if (ins->dest_type == nir_type_float32) {
525 struct bifrost_fma_fma pack = {
526 .src0 = bi_get_src(ins, regs, 0, true),
527 .src1 = bi_get_src(ins, regs, 1, true),
528 .src2 = bi_get_src(ins, regs, 2, true),
529 .src0_abs = ins->src_abs[0],
530 .src1_abs = ins->src_abs[1],
531 .src2_abs = ins->src_abs[2],
532 .src0_neg = negate_mul,
533 .src2_neg = ins->src_neg[2],
534 .outmod = ins->outmod,
535 .roundmode = ins->roundmode,
536 .op = BIFROST_FMA_OP_FMA
537 };
538
539 RETURN_PACKED(pack);
540 } else if (ins->dest_type == nir_type_float16) {
541 struct bifrost_fma_fma16 pack = {
542 .src0 = bi_get_src(ins, regs, 0, true),
543 .src1 = bi_get_src(ins, regs, 1, true),
544 .src2 = bi_get_src(ins, regs, 2, true),
545 .swizzle_0 = bi_swiz16(ins, 0),
546 .swizzle_1 = bi_swiz16(ins, 1),
547 .swizzle_2 = bi_swiz16(ins, 2),
548 .src0_neg = negate_mul,
549 .src2_neg = ins->src_neg[2],
550 .outmod = ins->outmod,
551 .roundmode = ins->roundmode,
552 .op = BIFROST_FMA_OP_FMA16
553 };
554
555 RETURN_PACKED(pack);
556 } else {
557 unreachable("Invalid fma dest type");
558 }
559 }
560
561 static unsigned
562 bi_pack_fma_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
563 {
564 unsigned op =
565 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD32 :
566 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN32 :
567 BIFROST_FMA_OP_FMAX32;
568
569 struct bifrost_fma_add pack = {
570 .src0 = bi_get_src(ins, regs, 0, true),
571 .src1 = bi_get_src(ins, regs, 1, true),
572 .src0_abs = ins->src_abs[0],
573 .src1_abs = ins->src_abs[1],
574 .src0_neg = ins->src_neg[0],
575 .src1_neg = ins->src_neg[1],
576 .unk = 0x0,
577 .outmod = ins->outmod,
578 .roundmode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
579 .op = op
580 };
581
582 RETURN_PACKED(pack);
583 }
584
585 static bool
586 bi_pack_fp16_abs(bi_instruction *ins, struct bi_registers *regs, bool *flip)
587 {
588 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
589 * l be an auxiliary bit we encode. Then the hardware determines:
590 *
591 * abs0 = l || k
592 * abs1 = l && k
593 *
594 * Since add/min/max are commutative, this saves a bit by using the
595 * order of the operands as a bit (k). To pack this, first note:
596 *
597 * (l && k) implies (l || k).
598 *
599 * That is, if the second argument is abs'd, then the first argument
600 * also has abs. So there are three cases:
601 *
602 * Case 0: Neither src has absolute value. Then we have l = k = 0.
603 *
604 * Case 1: Exactly one src has absolute value. Assign that source to
605 * src0 and the other source to src1. Compute k = src1 < src0 based on
606 * that assignment. Then l = ~k.
607 *
608 * Case 2: Both sources have absolute value. Then we have l = k = 1.
609 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
610 * That is, this encoding is only valid if src1 and src0 are distinct.
611 * This is a scheduling restriction (XXX); if an op of this type
612 * requires both identical sources to have abs value, then we must
613 * schedule to ADD (which does not use this ordering trick).
614 */
615
616 unsigned abs_0 = ins->src_abs[0], abs_1 = ins->src_abs[1];
617 unsigned src_0 = bi_get_src(ins, regs, 0, true);
618 unsigned src_1 = bi_get_src(ins, regs, 1, true);
619
620 assert(!(abs_0 && abs_1));
621
622 if (!abs_0 && !abs_1) {
623 /* Force k = 0 <===> NOT(src1 < src0) */
624 *flip = (src_1 < src_0);
625 return false;
626 } else if (abs_0 && !abs_1) {
627 return src_1 >= src_0;
628 } else if (abs_1 && !abs_0) {
629 *flip = true;
630 return src_0 >= src_1;
631 } else {
632 *flip = (src_0 >= src_1);
633 return true;
634 }
635 }
636
637 static unsigned
638 bi_pack_fmadd_min_f16(bi_instruction *ins, struct bi_registers *regs, bool FMA)
639 {
640 unsigned op =
641 (!FMA) ? ((ins->op.minmax == BI_MINMAX_MIN) ?
642 BIFROST_ADD_OP_FMIN16 : BIFROST_ADD_OP_FMAX16) :
643 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD16 :
644 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN16 :
645 BIFROST_FMA_OP_FMAX16;
646
647 bool flip = false;
648 bool l = bi_pack_fp16_abs(ins, regs, &flip);
649 unsigned src_0 = bi_get_src(ins, regs, 0, true);
650 unsigned src_1 = bi_get_src(ins, regs, 1, true);
651
652 if (FMA) {
653 struct bifrost_fma_add_minmax16 pack = {
654 .src0 = flip ? src_1 : src_0,
655 .src1 = flip ? src_0 : src_1,
656 .src0_neg = ins->src_neg[flip ? 1 : 0],
657 .src1_neg = ins->src_neg[flip ? 0 : 1],
658 .abs1 = l,
659 .outmod = ins->outmod,
660 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
661 .op = op
662 };
663
664 RETURN_PACKED(pack);
665 } else {
666 /* Can't have modes for fp16 */
667 assert(ins->outmod == 0);
668
669 struct bifrost_add_fmin16 pack = {
670 .src0 = flip ? src_1 : src_0,
671 .src1 = flip ? src_0 : src_1,
672 .src0_neg = ins->src_neg[flip ? 1 : 0],
673 .src1_neg = ins->src_neg[flip ? 0 : 1],
674 .abs1 = l,
675 .src0_swizzle = bi_swiz16(ins, 0),
676 .src1_swizzle = bi_swiz16(ins, 1),
677 .mode = ins->minmax,
678 .op = op
679 };
680
681 RETURN_PACKED(pack);
682 }
683 }
684
685 static unsigned
686 bi_pack_fma_addmin(bi_instruction *ins, struct bi_registers *regs)
687 {
688 if (ins->dest_type == nir_type_float32)
689 return bi_pack_fma_addmin_f32(ins, regs);
690 else if(ins->dest_type == nir_type_float16)
691 return bi_pack_fmadd_min_f16(ins, regs, true);
692 else
693 unreachable("Unknown FMA/ADD type");
694 }
695
696 static unsigned
697 bi_pack_fma_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
698 {
699 struct bifrost_fma_inst pack = {
700 .src0 = bi_get_src(ins, regs, 0, true),
701 .op = op
702 };
703
704 RETURN_PACKED(pack);
705 }
706
707 static unsigned
708 bi_pack_fma_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
709 {
710 struct bifrost_fma_2src pack = {
711 .src0 = bi_get_src(ins, regs, 0, true),
712 .src1 = bi_get_src(ins, regs, 1, true),
713 .op = op
714 };
715
716 RETURN_PACKED(pack);
717 }
718
719 static unsigned
720 bi_pack_add_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
721 {
722 struct bifrost_add_inst pack = {
723 .src0 = bi_get_src(ins, regs, 0, true),
724 .op = op
725 };
726
727 RETURN_PACKED(pack);
728 }
729
730 static enum bifrost_csel_cond
731 bi_cond_to_csel(enum bi_cond cond, bool *flip, bool *invert, nir_alu_type T)
732 {
733 nir_alu_type B = nir_alu_type_get_base_type(T);
734 unsigned idx = (B == nir_type_float) ? 0 :
735 ((B == nir_type_int) ? 1 : 2);
736
737 switch (cond){
738 case BI_COND_LT:
739 *flip = true;
740 case BI_COND_GT: {
741 const enum bifrost_csel_cond ops[] = {
742 BIFROST_FGT_F,
743 BIFROST_IGT_I,
744 BIFROST_UGT_I
745 };
746
747 return ops[idx];
748 }
749 case BI_COND_LE:
750 *flip = true;
751 case BI_COND_GE: {
752 const enum bifrost_csel_cond ops[] = {
753 BIFROST_FGE_F,
754 BIFROST_IGE_I,
755 BIFROST_UGE_I
756 };
757
758 return ops[idx];
759 }
760 case BI_COND_NE:
761 *invert = true;
762 case BI_COND_EQ: {
763 const enum bifrost_csel_cond ops[] = {
764 BIFROST_FEQ_F,
765 BIFROST_IEQ_F,
766 BIFROST_IEQ_F /* sign is irrelevant */
767 };
768
769 return ops[idx];
770 }
771 default:
772 unreachable("Invalid op for csel");
773 }
774 }
775
776 static unsigned
777 bi_pack_fma_csel(bi_instruction *ins, struct bi_registers *regs)
778 {
779 /* TODO: Use csel3 as well */
780 bool flip = false, invert = false;
781
782 enum bifrost_csel_cond cond =
783 bi_cond_to_csel(ins->cond, &flip, &invert, ins->src_types[0]);
784
785 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
786
787 unsigned cmp_0 = (flip ? 1 : 0);
788 unsigned cmp_1 = (flip ? 0 : 1);
789 unsigned res_0 = (invert ? 3 : 2);
790 unsigned res_1 = (invert ? 2 : 3);
791
792 struct bifrost_csel4 pack = {
793 .src0 = bi_get_src(ins, regs, cmp_0, true),
794 .src1 = bi_get_src(ins, regs, cmp_1, true),
795 .src2 = bi_get_src(ins, regs, res_0, true),
796 .src3 = bi_get_src(ins, regs, res_1, true),
797 .cond = cond,
798 .op = (size == 16) ? BIFROST_FMA_OP_CSEL4_V16 :
799 BIFROST_FMA_OP_CSEL4
800 };
801
802 RETURN_PACKED(pack);
803 }
804
805 static unsigned
806 bi_pack_fma_frexp(bi_instruction *ins, struct bi_registers *regs)
807 {
808 unsigned op = BIFROST_FMA_OP_FREXPE_LOG;
809 return bi_pack_fma_1src(ins, regs, op);
810 }
811
812 static unsigned
813 bi_pack_fma_reduce(bi_instruction *ins, struct bi_registers *regs)
814 {
815 if (ins->op.reduce == BI_REDUCE_ADD_FREXPM) {
816 return bi_pack_fma_2src(ins, regs, BIFROST_FMA_OP_ADD_FREXPM);
817 } else {
818 unreachable("Invalid reduce op");
819 }
820 }
821
822 /* We have a single convert opcode in the IR but a number of opcodes that could
823 * come out. In particular we have native opcodes for:
824 *
825 * [ui]16 --> [fui]32 -- int16_to_32
826 * f16 --> f32 -- float16_to_32
827 * f32 --> f16 -- float32_to_16
828 * f32 --> [ui]32 -- float32_to_int
829 * [ui]32 --> f32 -- int_to_float32
830 * [fui]16 --> [fui]16 -- f2i_i2f16
831 */
832
833 static unsigned
834 bi_pack_convert(bi_instruction *ins, struct bi_registers *regs, bool FMA)
835 {
836 nir_alu_type from_base = nir_alu_type_get_base_type(ins->src_types[0]);
837 unsigned from_size = nir_alu_type_get_type_size(ins->src_types[0]);
838 bool from_unsigned = from_base == nir_type_uint;
839
840 nir_alu_type to_base = nir_alu_type_get_base_type(ins->dest_type);
841 unsigned to_size = nir_alu_type_get_type_size(ins->dest_type);
842 bool to_unsigned = to_base == nir_type_uint;
843 bool to_float = to_base == nir_type_float;
844
845 /* Sanity check */
846 assert((from_base != to_base) || (from_size != to_size));
847 assert((MAX2(from_size, to_size) / MIN2(from_size, to_size)) <= 2);
848
849 /* f32 to f16 is special */
850 if (from_size == 32 && to_size == 16 && from_base == nir_type_float && to_base == from_base) {
851 /* TODO: second vectorized source? */
852 struct bifrost_fma_2src pfma = {
853 .src0 = bi_get_src(ins, regs, 0, true),
854 .src1 = BIFROST_SRC_STAGE, /* 0 */
855 .op = BIFROST_FMA_FLOAT32_TO_16
856 };
857
858 struct bifrost_add_2src padd = {
859 .src0 = bi_get_src(ins, regs, 0, true),
860 .src1 = BIFROST_SRC_STAGE, /* 0 */
861 .op = BIFROST_ADD_FLOAT32_TO_16
862 };
863
864 if (FMA) {
865 RETURN_PACKED(pfma);
866 } else {
867 RETURN_PACKED(padd);
868 }
869 }
870
871 /* Otherwise, figure out the mode */
872 unsigned op = 0;
873
874 if (from_size == 16 && to_size == 32) {
875 unsigned component = ins->swizzle[0][0];
876 assert(component <= 1);
877
878 if (from_base == nir_type_float)
879 op = BIFROST_CONVERT_5(component);
880 else
881 op = BIFROST_CONVERT_4(from_unsigned, component, to_float);
882 } else {
883 unsigned mode = 0;
884 unsigned swizzle = (from_size == 16) ? bi_swiz16(ins, 0) : 0;
885 bool is_unsigned = from_unsigned;
886
887 if (from_base == nir_type_float) {
888 assert(to_base != nir_type_float);
889 is_unsigned = to_unsigned;
890
891 if (from_size == 32 && to_size == 32)
892 mode = BIFROST_CONV_F32_TO_I32;
893 else if (from_size == 16 && to_size == 16)
894 mode = BIFROST_CONV_F16_TO_I16;
895 else
896 unreachable("Invalid float conversion");
897 } else {
898 assert(to_base == nir_type_float);
899 assert(from_size == to_size);
900
901 if (to_size == 32)
902 mode = BIFROST_CONV_I32_TO_F32;
903 else if (to_size == 16)
904 mode = BIFROST_CONV_I16_TO_F16;
905 else
906 unreachable("Invalid int conversion");
907 }
908
909 /* Fixup swizzle for 32-bit only modes */
910
911 if (mode == BIFROST_CONV_I32_TO_F32)
912 swizzle = 0b11;
913 else if (mode == BIFROST_CONV_F32_TO_I32)
914 swizzle = 0b10;
915
916 op = BIFROST_CONVERT(is_unsigned, ins->roundmode, swizzle, mode);
917
918 /* Unclear what the top bit is for... maybe 16-bit related */
919 bool mode2 = mode == BIFROST_CONV_F16_TO_I16;
920 bool mode6 = mode == BIFROST_CONV_I16_TO_F16;
921
922 if (!(mode2 || mode6))
923 op |= 0x100;
924 }
925
926 if (FMA)
927 return bi_pack_fma_1src(ins, regs, BIFROST_FMA_CONVERT | op);
928 else
929 return bi_pack_add_1src(ins, regs, BIFROST_ADD_CONVERT | op);
930 }
931
932 static unsigned
933 bi_pack_fma_select(bi_instruction *ins, struct bi_registers *regs)
934 {
935 unsigned size = nir_alu_type_get_type_size(ins->src_types[0]);
936
937 if (size == 16) {
938 unsigned swiz = (ins->swizzle[0][0] | (ins->swizzle[1][0] << 1));
939 unsigned op = BIFROST_FMA_SEL_16(swiz);
940 return bi_pack_fma_2src(ins, regs, op);
941 } else if (size == 8) {
942 unsigned swiz = 0;
943
944 for (unsigned c = 0; c < 4; ++c) {
945 if (ins->swizzle[c][0]) {
946 /* Ensure lowering restriction is met */
947 assert(ins->swizzle[c][0] == 2);
948 swiz |= (1 << c);
949 }
950 }
951
952 struct bifrost_fma_sel8 pack = {
953 .src0 = bi_get_src(ins, regs, 0, true),
954 .src1 = bi_get_src(ins, regs, 1, true),
955 .src2 = bi_get_src(ins, regs, 2, true),
956 .src3 = bi_get_src(ins, regs, 3, true),
957 .swizzle = swiz,
958 .op = BIFROST_FMA_OP_SEL8
959 };
960
961 RETURN_PACKED(pack);
962 } else {
963 unreachable("Unimplemented");
964 }
965 }
966
967 static enum bifrost_fcmp_cond
968 bi_fcmp_cond(enum bi_cond cond)
969 {
970 switch (cond) {
971 case BI_COND_LT: return BIFROST_OLT;
972 case BI_COND_LE: return BIFROST_OLE;
973 case BI_COND_GE: return BIFROST_OGE;
974 case BI_COND_GT: return BIFROST_OGT;
975 case BI_COND_EQ: return BIFROST_OEQ;
976 case BI_COND_NE: return BIFROST_UNE;
977 default: unreachable("Unknown bi_cond");
978 }
979 }
980
981 /* a <?> b <==> b <flip(?)> a (TODO: NaN behaviour?) */
982
983 static enum bifrost_fcmp_cond
984 bi_flip_fcmp(enum bifrost_fcmp_cond cond)
985 {
986 switch (cond) {
987 case BIFROST_OGT:
988 return BIFROST_OLT;
989 case BIFROST_OGE:
990 return BIFROST_OLE;
991 case BIFROST_OLT:
992 return BIFROST_OGT;
993 case BIFROST_OLE:
994 return BIFROST_OGE;
995 case BIFROST_OEQ:
996 case BIFROST_UNE:
997 return cond;
998 default:
999 unreachable("Unknown fcmp cond");
1000 }
1001 }
1002
1003 static unsigned
1004 bi_pack_fma_cmp(bi_instruction *ins, struct bi_registers *regs)
1005 {
1006 nir_alu_type Tl = ins->src_types[0];
1007 nir_alu_type Tr = ins->src_types[1];
1008
1009 if (Tl == nir_type_float32 || Tr == nir_type_float32) {
1010 /* TODO: Mixed 32/16 cmp */
1011 assert(Tl == Tr);
1012
1013 enum bifrost_fcmp_cond cond = bi_fcmp_cond(ins->cond);
1014
1015 /* Only src1 has neg, so we arrange:
1016 * a < b --- native
1017 * a < -b --- native
1018 * -a < -b <===> a > b
1019 * -a < b <===> a > -b
1020 * TODO: Is this NaN-precise?
1021 */
1022
1023 bool flip = ins->src_neg[0];
1024 bool neg = ins->src_neg[0] ^ ins->src_neg[1];
1025
1026 if (flip)
1027 cond = bi_flip_fcmp(cond);
1028
1029 struct bifrost_fma_fcmp pack = {
1030 .src0 = bi_get_src(ins, regs, 0, true),
1031 .src1 = bi_get_src(ins, regs, 1, true),
1032 .src0_abs = ins->src_abs[0],
1033 .src1_abs = ins->src_abs[1],
1034 .src1_neg = neg,
1035 .src_expand = 0,
1036 .unk1 = 0,
1037 .cond = cond,
1038 .op = BIFROST_FMA_OP_FCMP_GL
1039 };
1040
1041 RETURN_PACKED(pack);
1042 } else if (Tl == nir_type_float16 && Tr == nir_type_float16) {
1043 bool flip = false;
1044 bool l = bi_pack_fp16_abs(ins, regs, &flip);
1045 enum bifrost_fcmp_cond cond = bi_fcmp_cond(ins->cond);
1046
1047 if (flip)
1048 cond = bi_flip_fcmp(cond);
1049
1050 struct bifrost_fma_fcmp16 pack = {
1051 .src0 = bi_get_src(ins, regs, flip ? 1 : 0, true),
1052 .src1 = bi_get_src(ins, regs, flip ? 0 : 1, true),
1053 .src0_swizzle = bi_swiz16(ins, flip ? 1 : 0),
1054 .src1_swizzle = bi_swiz16(ins, flip ? 0 : 1),
1055 .abs1 = l,
1056 .unk = 0,
1057 .cond = cond,
1058 .op = BIFROST_FMA_OP_FCMP_GL_16,
1059 };
1060
1061 RETURN_PACKED(pack);
1062 } else {
1063 unreachable("Unknown cmp type");
1064 }
1065 }
1066
1067
1068 static unsigned
1069 bi_pack_fma(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
1070 {
1071 if (!bundle.fma)
1072 return BIFROST_FMA_NOP;
1073
1074 switch (bundle.fma->type) {
1075 case BI_ADD:
1076 return bi_pack_fma_addmin(bundle.fma, regs);
1077 case BI_CMP:
1078 return bi_pack_fma_cmp(bundle.fma, regs);
1079 case BI_BITWISE:
1080 return BIFROST_FMA_NOP;
1081 case BI_CONVERT:
1082 return bi_pack_convert(bundle.fma, regs, true);
1083 case BI_CSEL:
1084 return bi_pack_fma_csel(bundle.fma, regs);
1085 case BI_FMA:
1086 return bi_pack_fma_fma(bundle.fma, regs);
1087 case BI_FREXP:
1088 return bi_pack_fma_frexp(bundle.fma, regs);
1089 case BI_ISUB:
1090 return BIFROST_FMA_NOP;
1091 case BI_MINMAX:
1092 return bi_pack_fma_addmin(bundle.fma, regs);
1093 case BI_MOV:
1094 return bi_pack_fma_1src(bundle.fma, regs, BIFROST_FMA_OP_MOV);
1095 case BI_SHIFT:
1096 return BIFROST_FMA_NOP;
1097 case BI_SELECT:
1098 return bi_pack_fma_select(bundle.fma, regs);
1099 case BI_ROUND:
1100 return BIFROST_FMA_NOP;
1101 case BI_REDUCE_FMA:
1102 return bi_pack_fma_reduce(bundle.fma, regs);
1103 default:
1104 unreachable("Cannot encode class as FMA");
1105 }
1106 }
1107
1108 static unsigned
1109 bi_pack_add_ld_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1110 {
1111 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
1112 assert(size == 32 || size == 16);
1113
1114 unsigned op = (size == 32) ?
1115 BIFROST_ADD_OP_LD_VAR_32 :
1116 BIFROST_ADD_OP_LD_VAR_16;
1117
1118 unsigned packed_addr = 0;
1119
1120 if (ins->src[0] & BIR_INDEX_CONSTANT) {
1121 /* Direct uses address field directly */
1122 packed_addr = bi_get_immediate(ins, 0);
1123 assert(packed_addr < 0b1000);
1124 } else {
1125 /* Indirect gets an extra source */
1126 packed_addr = bi_get_src(ins, regs, 0, false) | 0b11000;
1127 }
1128
1129 /* The destination is thrown in the data register */
1130 assert(ins->dest & BIR_INDEX_REGISTER);
1131 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
1132
1133 unsigned channels = ins->vector_channels;
1134 assert(channels >= 1 && channels <= 4);
1135
1136 struct bifrost_ld_var pack = {
1137 .src0 = bi_get_src(ins, regs, 1, false),
1138 .addr = packed_addr,
1139 .channels = MALI_POSITIVE(channels),
1140 .interp_mode = ins->load_vary.interp_mode,
1141 .reuse = ins->load_vary.reuse,
1142 .flat = ins->load_vary.flat,
1143 .op = op
1144 };
1145
1146 RETURN_PACKED(pack);
1147 }
1148
1149 static unsigned
1150 bi_pack_add_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
1151 {
1152 struct bifrost_add_2src pack = {
1153 .src0 = bi_get_src(ins, regs, 0, true),
1154 .src1 = bi_get_src(ins, regs, 1, true),
1155 .op = op
1156 };
1157
1158 RETURN_PACKED(pack);
1159 }
1160
1161 static unsigned
1162 bi_pack_add_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
1163 {
1164 unsigned op =
1165 (ins->type == BI_ADD) ? BIFROST_ADD_OP_FADD32 :
1166 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_ADD_OP_FMIN32 :
1167 BIFROST_ADD_OP_FMAX32;
1168
1169 struct bifrost_add_faddmin pack = {
1170 .src0 = bi_get_src(ins, regs, 0, true),
1171 .src1 = bi_get_src(ins, regs, 1, true),
1172 .src0_abs = ins->src_abs[0],
1173 .src1_abs = ins->src_abs[1],
1174 .src0_neg = ins->src_neg[0],
1175 .src1_neg = ins->src_neg[1],
1176 .outmod = ins->outmod,
1177 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
1178 .op = op
1179 };
1180
1181 RETURN_PACKED(pack);
1182 }
1183
1184 static unsigned
1185 bi_pack_add_add_f16(bi_instruction *ins, struct bi_registers *regs)
1186 {
1187 /* ADD.v2f16 can't have outmod */
1188 assert(ins->outmod == BIFROST_NONE);
1189
1190 struct bifrost_add_faddmin pack = {
1191 .src0 = bi_get_src(ins, regs, 0, true),
1192 .src1 = bi_get_src(ins, regs, 1, true),
1193 .src0_abs = ins->src_abs[0],
1194 .src1_abs = ins->src_abs[1],
1195 .src0_neg = ins->src_neg[0],
1196 .src1_neg = ins->src_neg[1],
1197 .select = bi_swiz16(ins, 0), /* swizzle_0 */
1198 .outmod = bi_swiz16(ins, 1), /* swizzle_1 */
1199 .mode = ins->roundmode,
1200 .op = BIFROST_ADD_OP_FADD16
1201 };
1202
1203 RETURN_PACKED(pack);
1204 }
1205
1206 static unsigned
1207 bi_pack_add_addmin(bi_instruction *ins, struct bi_registers *regs)
1208 {
1209 if (ins->dest_type == nir_type_float32)
1210 return bi_pack_add_addmin_f32(ins, regs);
1211 else if (ins->dest_type == nir_type_float16) {
1212 if (ins->type == BI_ADD)
1213 return bi_pack_add_add_f16(ins, regs);
1214 else
1215 return bi_pack_fmadd_min_f16(ins, regs, false);
1216 } else
1217 unreachable("Unknown FMA/ADD type");
1218 }
1219
1220 static unsigned
1221 bi_pack_add_ld_ubo(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1222 {
1223 assert(ins->vector_channels >= 1 && ins->vector_channels <= 4);
1224
1225 const unsigned ops[4] = {
1226 BIFROST_ADD_OP_LD_UBO_1,
1227 BIFROST_ADD_OP_LD_UBO_2,
1228 BIFROST_ADD_OP_LD_UBO_3,
1229 BIFROST_ADD_OP_LD_UBO_4
1230 };
1231
1232 bi_write_data_register(clause, ins);
1233 return bi_pack_add_2src(ins, regs, ops[ins->vector_channels - 1]);
1234 }
1235
1236 static enum bifrost_ldst_type
1237 bi_pack_ldst_type(nir_alu_type T)
1238 {
1239 switch (T) {
1240 case nir_type_float16: return BIFROST_LDST_F16;
1241 case nir_type_float32: return BIFROST_LDST_F32;
1242 case nir_type_int32: return BIFROST_LDST_I32;
1243 case nir_type_uint32: return BIFROST_LDST_U32;
1244 default: unreachable("Invalid type loaded");
1245 }
1246 }
1247
1248 static unsigned
1249 bi_pack_add_ld_var_addr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1250 {
1251 struct bifrost_ld_var_addr pack = {
1252 .src0 = bi_get_src(ins, regs, 1, false),
1253 .src1 = bi_get_src(ins, regs, 2, false),
1254 .location = bi_get_immediate(ins, 0),
1255 .type = bi_pack_ldst_type(ins->src_types[3]),
1256 .op = BIFROST_ADD_OP_LD_VAR_ADDR
1257 };
1258
1259 bi_write_data_register(clause, ins);
1260 RETURN_PACKED(pack);
1261 }
1262
1263 static unsigned
1264 bi_pack_add_ld_attr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1265 {
1266 assert(ins->vector_channels >= 0 && ins->vector_channels <= 4);
1267
1268 struct bifrost_ld_attr pack = {
1269 .src0 = bi_get_src(ins, regs, 1, false),
1270 .src1 = bi_get_src(ins, regs, 2, false),
1271 .location = bi_get_immediate(ins, 0),
1272 .channels = MALI_POSITIVE(ins->vector_channels),
1273 .type = bi_pack_ldst_type(ins->dest_type),
1274 .op = BIFROST_ADD_OP_LD_ATTR
1275 };
1276
1277 bi_write_data_register(clause, ins);
1278 RETURN_PACKED(pack);
1279 }
1280
1281 static unsigned
1282 bi_pack_add_st_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1283 {
1284 assert(ins->vector_channels >= 1 && ins->vector_channels <= 4);
1285
1286 struct bifrost_st_vary pack = {
1287 .src0 = bi_get_src(ins, regs, 1, false),
1288 .src1 = bi_get_src(ins, regs, 2, false),
1289 .src2 = bi_get_src(ins, regs, 3, false),
1290 .channels = MALI_POSITIVE(ins->vector_channels),
1291 .op = BIFROST_ADD_OP_ST_VAR
1292 };
1293
1294 bi_read_data_register(clause, ins);
1295 RETURN_PACKED(pack);
1296 }
1297
1298 static unsigned
1299 bi_pack_add_atest(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1300 {
1301 bool fp16 = (ins->src_types[1] == nir_type_float16);
1302
1303 struct bifrost_add_atest pack = {
1304 .src0 = bi_get_src(ins, regs, 0, false),
1305 .src1 = bi_get_src(ins, regs, 1, false),
1306 .half = fp16,
1307 .component = fp16 ? ins->swizzle[1][0] : 1, /* Set for fp32 */
1308 .op = BIFROST_ADD_OP_ATEST,
1309 };
1310
1311 /* Despite *also* writing with the usual mechanism... quirky and
1312 * perhaps unnecessary, but let's match the blob */
1313 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
1314
1315 RETURN_PACKED(pack);
1316 }
1317
1318 static unsigned
1319 bi_pack_add_blend(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1320 {
1321 struct bifrost_add_inst pack = {
1322 .src0 = bi_get_src(ins, regs, 1, false),
1323 .op = BIFROST_ADD_OP_BLEND
1324 };
1325
1326 /* TODO: Pack location in uniform_const */
1327 assert(ins->blend_location == 0);
1328
1329 bi_read_data_register(clause, ins);
1330 RETURN_PACKED(pack);
1331 }
1332
1333 static unsigned
1334 bi_pack_add_special(bi_instruction *ins, struct bi_registers *regs)
1335 {
1336 unsigned op = 0;
1337 bool fp16 = ins->dest_type == nir_type_float16;
1338 bool Y = ins->swizzle[0][0];
1339
1340 if (ins->op.special == BI_SPECIAL_FRCP) {
1341 op = fp16 ?
1342 (Y ? BIFROST_ADD_OP_FRCP_FAST_F16_Y :
1343 BIFROST_ADD_OP_FRCP_FAST_F16_X) :
1344 BIFROST_ADD_OP_FRCP_FAST_F32;
1345 } else if (ins->op.special == BI_SPECIAL_FRSQ) {
1346 op = fp16 ?
1347 (Y ? BIFROST_ADD_OP_FRSQ_FAST_F16_Y :
1348 BIFROST_ADD_OP_FRSQ_FAST_F16_X) :
1349 BIFROST_ADD_OP_FRSQ_FAST_F32;
1350
1351 } else if (ins->op.special == BI_SPECIAL_EXP2_LOW) {
1352 assert(!fp16);
1353 op = BIFROST_ADD_OP_FEXP2_FAST;
1354 } else {
1355 unreachable("Unknown special op");
1356 }
1357
1358 return bi_pack_add_1src(ins, regs, op);
1359 }
1360
1361 static unsigned
1362 bi_pack_add_table(bi_instruction *ins, struct bi_registers *regs)
1363 {
1364 unsigned op = 0;
1365 assert(ins->dest_type == nir_type_float32);
1366
1367 op = BIFROST_ADD_OP_LOG2_HELP;
1368 return bi_pack_add_1src(ins, regs, op);
1369 }
1370 static unsigned
1371 bi_pack_add_tex_compact(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1372 {
1373 bool f16 = ins->dest_type == nir_type_float16;
1374
1375 struct bifrost_tex_compact pack = {
1376 .src0 = bi_get_src(ins, regs, 0, false),
1377 .src1 = bi_get_src(ins, regs, 1, false),
1378 .op = f16 ? BIFROST_ADD_OP_TEX_COMPACT_F16 :
1379 BIFROST_ADD_OP_TEX_COMPACT_F32,
1380 .unknown = 1,
1381 .tex_index = 0,
1382 .sampler_index = 0
1383 };
1384
1385 bi_write_data_register(clause, ins);
1386 RETURN_PACKED(pack);
1387 }
1388
1389 static unsigned
1390 bi_pack_add_select(bi_instruction *ins, struct bi_registers *regs)
1391 {
1392 unsigned size = nir_alu_type_get_type_size(ins->src_types[0]);
1393 assert(size == 16);
1394
1395 unsigned swiz = (ins->swizzle[0][0] | (ins->swizzle[1][0] << 1));
1396 unsigned op = BIFROST_ADD_SEL_16(swiz);
1397 return bi_pack_add_2src(ins, regs, op);
1398 }
1399
1400 static unsigned
1401 bi_pack_add(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
1402 {
1403 if (!bundle.add)
1404 return BIFROST_ADD_NOP;
1405
1406 switch (bundle.add->type) {
1407 case BI_ADD:
1408 return bi_pack_add_addmin(bundle.add, regs);
1409 case BI_ATEST:
1410 return bi_pack_add_atest(clause, bundle.add, regs);
1411 case BI_BRANCH:
1412 case BI_CMP:
1413 return BIFROST_ADD_NOP;
1414 case BI_BLEND:
1415 return bi_pack_add_blend(clause, bundle.add, regs);
1416 case BI_BITWISE:
1417 return BIFROST_ADD_NOP;
1418 case BI_CONVERT:
1419 return bi_pack_convert(bundle.add, regs, false);
1420 case BI_DISCARD:
1421 case BI_FREXP:
1422 case BI_ISUB:
1423 case BI_LOAD:
1424 return BIFROST_ADD_NOP;
1425 case BI_LOAD_ATTR:
1426 return bi_pack_add_ld_attr(clause, bundle.add, regs);
1427 case BI_LOAD_UNIFORM:
1428 return bi_pack_add_ld_ubo(clause, bundle.add, regs);
1429 case BI_LOAD_VAR:
1430 return bi_pack_add_ld_vary(clause, bundle.add, regs);
1431 case BI_LOAD_VAR_ADDRESS:
1432 return bi_pack_add_ld_var_addr(clause, bundle.add, regs);
1433 case BI_MINMAX:
1434 return bi_pack_add_addmin(bundle.add, regs);
1435 case BI_MOV:
1436 case BI_SHIFT:
1437 case BI_STORE:
1438 return BIFROST_ADD_NOP;
1439 case BI_STORE_VAR:
1440 return bi_pack_add_st_vary(clause, bundle.add, regs);
1441 case BI_SPECIAL:
1442 return bi_pack_add_special(bundle.add, regs);
1443 case BI_TABLE:
1444 return bi_pack_add_table(bundle.add, regs);
1445 case BI_SELECT:
1446 return bi_pack_add_select(bundle.add, regs);
1447 case BI_TEX:
1448 if (bundle.add->op.texture == BI_TEX_COMPACT)
1449 return bi_pack_add_tex_compact(clause, bundle.add, regs);
1450 else
1451 unreachable("Unknown tex type");
1452 case BI_ROUND:
1453 return BIFROST_ADD_NOP;
1454 default:
1455 unreachable("Cannot encode class as ADD");
1456 }
1457 }
1458
1459 struct bi_packed_bundle {
1460 uint64_t lo;
1461 uint64_t hi;
1462 };
1463
1464 static struct bi_packed_bundle
1465 bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_bundle)
1466 {
1467 struct bi_registers regs = bi_assign_ports(bundle, prev);
1468 bi_assign_uniform_constant(clause, &regs, bundle);
1469 regs.first_instruction = first_bundle;
1470
1471 uint64_t reg = bi_pack_registers(regs);
1472 uint64_t fma = bi_pack_fma(clause, bundle, &regs);
1473 uint64_t add = bi_pack_add(clause, bundle, &regs);
1474
1475 struct bi_packed_bundle packed = {
1476 .lo = reg | (fma << 35) | ((add & 0b111111) << 58),
1477 .hi = add >> 6
1478 };
1479
1480 return packed;
1481 }
1482
1483 /* Packs the next two constants as a dedicated constant quadword at the end of
1484 * the clause, returning the number packed. */
1485
1486 static unsigned
1487 bi_pack_constants(bi_context *ctx, bi_clause *clause,
1488 unsigned index,
1489 struct util_dynarray *emission)
1490 {
1491 /* After these two, are we done? Determines tag */
1492 bool done = clause->constant_count <= (index + 2);
1493 bool only = clause->constant_count <= (index + 1);
1494
1495 /* TODO: Pos */
1496 assert(index == 0 && clause->bundle_count == 1);
1497 assert(only);
1498
1499 uint64_t hi = clause->constants[index + 0] >> 60ull;
1500
1501 struct bifrost_fmt_constant quad = {
1502 .pos = 0, /* TODO */
1503 .tag = done ? BIFROST_FMTC_FINAL : BIFROST_FMTC_CONSTANTS,
1504 .imm_1 = clause->constants[index + 0] >> 4,
1505 .imm_2 = ((hi < 8) ? (hi << 60ull) : 0) >> 4,
1506 };
1507
1508 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1509 * of the second constant with the first must be less than 8, otherwise
1510 * we have to swap them. On G52, I'm able to reproduce a similar issue
1511 * but with a different workaround (modeled above with a single
1512 * constant, unclear how to workaround for multiple constants.) Further
1513 * investigation needed. Possibly an errata. XXX */
1514
1515 util_dynarray_append(emission, struct bifrost_fmt_constant, quad);
1516
1517 return 2;
1518 }
1519
1520 static void
1521 bi_pack_clause(bi_context *ctx, bi_clause *clause, bi_clause *next,
1522 struct util_dynarray *emission)
1523 {
1524 struct bi_packed_bundle ins_1 = bi_pack_bundle(clause, clause->bundles[0], clause->bundles[0], true);
1525 assert(clause->bundle_count == 1);
1526
1527 /* Used to decide if we elide writes */
1528 bool is_fragment = ctx->stage == MESA_SHADER_FRAGMENT;
1529
1530 /* State for packing constants throughout */
1531 unsigned constant_index = 0;
1532
1533 struct bifrost_fmt1 quad_1 = {
1534 .tag = clause->constant_count ? BIFROST_FMT1_CONSTANTS : BIFROST_FMT1_FINAL,
1535 .header = bi_pack_header(clause, next, is_fragment),
1536 .ins_1 = ins_1.lo,
1537 .ins_2 = ins_1.hi & ((1 << 11) - 1),
1538 .ins_0 = (ins_1.hi >> 11) & 0b111,
1539 };
1540
1541 util_dynarray_append(emission, struct bifrost_fmt1, quad_1);
1542
1543 /* Pack the remaining constants */
1544
1545 while (constant_index < clause->constant_count) {
1546 constant_index += bi_pack_constants(ctx, clause,
1547 constant_index, emission);
1548 }
1549 }
1550
1551 static bi_clause *
1552 bi_next_clause(bi_context *ctx, pan_block *block, bi_clause *clause)
1553 {
1554 /* Try the next clause in this block */
1555 if (clause->link.next != &((bi_block *) block)->clauses)
1556 return list_first_entry(&(clause->link), bi_clause, link);
1557
1558 /* Try the next block, or the one after that if it's empty, etc .*/
1559 pan_block *next_block = pan_next_block(block);
1560
1561 bi_foreach_block_from(ctx, next_block, block) {
1562 bi_block *blk = (bi_block *) block;
1563
1564 if (!list_is_empty(&blk->clauses))
1565 return list_first_entry(&(blk->clauses), bi_clause, link);
1566 }
1567
1568 return NULL;
1569 }
1570
1571 void
1572 bi_pack(bi_context *ctx, struct util_dynarray *emission)
1573 {
1574 util_dynarray_init(emission, NULL);
1575
1576 bi_foreach_block(ctx, _block) {
1577 bi_block *block = (bi_block *) _block;
1578
1579 bi_foreach_clause_in_block(block, clause) {
1580 bi_clause *next = bi_next_clause(ctx, _block, clause);
1581 bi_pack_clause(ctx, clause, next, emission);
1582 }
1583 }
1584 }