pan/bi: Handle abs packing for fp16/FMA add/min
[mesa.git] / src / panfrost / bifrost / bi_pack.c
1 /*
2 * Copyright (C) 2020 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "compiler.h"
25
26 #define RETURN_PACKED(str) { \
27 uint64_t temp = 0; \
28 memcpy(&temp, &str, sizeof(str)); \
29 return temp; \
30 }
31
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
35
36 static uint64_t
37 bi_pack_header(bi_clause *clause, bi_clause *next, bool is_fragment)
38 {
39 struct bifrost_header header = {
40 .back_to_back = clause->back_to_back,
41 .no_end_of_shader = (next != NULL),
42 .elide_writes = is_fragment,
43 .branch_cond = clause->branch_conditional,
44 .datareg_writebarrier = clause->data_register_write_barrier,
45 .datareg = clause->data_register,
46 .scoreboard_deps = next ? next->dependencies : 0,
47 .scoreboard_index = clause->scoreboard_id,
48 .clause_type = clause->clause_type,
49 .next_clause_type = next ? next->clause_type : 0,
50 };
51
52 uint64_t u = 0;
53 memcpy(&u, &header, sizeof(header));
54 return u;
55 }
56
57 /* Represents the assignment of ports for a given bundle */
58
59 struct bi_registers {
60 /* Register to assign to each port */
61 unsigned port[4];
62
63 /* Read ports can be disabled */
64 bool enabled[2];
65
66 /* Should we write FMA? what about ADD? If only a single port is
67 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
68 bool write_fma, write_add;
69
70 /* Should we read with port 3? */
71 bool read_port3;
72
73 /* Packed uniform/constant */
74 uint8_t uniform_constant;
75
76 /* Whether writes are actually for the last instruction */
77 bool first_instruction;
78 };
79
80 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
81 * pushed uniform per bundle. Figure out which one we need in the bundle (the
82 * scheduler needs to ensure we only have one type per bundle), validate
83 * everything, and rewrite away the register/uniform indices to use 3-bit
84 * sources directly. */
85
86 static unsigned
87 bi_lookup_constant(bi_clause *clause, uint64_t cons, bool *hi, bool b64)
88 {
89 uint64_t want = (cons >> 4);
90
91 for (unsigned i = 0; i < clause->constant_count; ++i) {
92 /* Only check top 60-bits since that's what's actually embedded
93 * in the clause, the bottom 4-bits are bundle-inline */
94
95 unsigned candidates[2] = {
96 clause->constants[i] >> 4,
97 clause->constants[i] >> 36
98 };
99
100 if (!b64)
101 candidates[0] &= 0xFFFFFFFF;
102
103 if (candidates[0] == want)
104 return i;
105
106 if (candidates[1] == want && !b64) {
107 *hi = true;
108 return i;
109 }
110 }
111
112 unreachable("Invalid constant accessed");
113 }
114
115 static unsigned
116 bi_constant_field(unsigned idx)
117 {
118 assert(idx <= 5);
119
120 const unsigned values[] = {
121 4, 5, 6, 7, 2, 3
122 };
123
124 return values[idx] << 4;
125 }
126
127 static bool
128 bi_assign_uniform_constant_single(
129 struct bi_registers *regs,
130 bi_clause *clause,
131 bi_instruction *ins, bool assigned, bool fast_zero)
132 {
133 if (!ins)
134 return assigned;
135
136 bi_foreach_src(ins, s) {
137 if (s == 0 && (ins->type == BI_LOAD_VAR_ADDRESS || ins->type == BI_LOAD_ATTR)) continue;
138
139 if (ins->src[s] & BIR_INDEX_CONSTANT) {
140 bool hi = false;
141 bool b64 = nir_alu_type_get_type_size(ins->src_types[s]) > 32;
142 uint64_t cons = bi_get_immediate(ins, ins->src[s]);
143 unsigned idx = bi_lookup_constant(clause, cons, &hi, b64);
144 unsigned f = bi_constant_field(idx) | (cons & 0xF);
145
146 if (assigned && regs->uniform_constant != f)
147 unreachable("Mismatched uniform/const field: imm");
148
149 regs->uniform_constant = f;
150 ins->src[s] = BIR_INDEX_PASS | (hi ? BIFROST_SRC_CONST_HI : BIFROST_SRC_CONST_LO);
151 assigned = true;
152 } else if (ins->src[s] & BIR_INDEX_ZERO && (ins->type == BI_LOAD_UNIFORM || ins->type == BI_LOAD_VAR)) {
153 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
154 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_HI;
155 } else if (ins->src[s] & BIR_INDEX_ZERO && !fast_zero) {
156 /* FMAs have a fast zero port, ADD needs to use the
157 * uniform/const port's special 0 mode handled here */
158 unsigned f = 0;
159
160 if (assigned && regs->uniform_constant != f)
161 unreachable("Mismatched uniform/const field: 0");
162
163 regs->uniform_constant = f;
164 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_LO;
165 assigned = true;
166 } else if (s & BIR_INDEX_UNIFORM) {
167 unreachable("Push uniforms not implemented yet");
168 }
169 }
170
171 return assigned;
172 }
173
174 static void
175 bi_assign_uniform_constant(
176 bi_clause *clause,
177 struct bi_registers *regs,
178 bi_bundle bundle)
179 {
180 bool assigned =
181 bi_assign_uniform_constant_single(regs, clause, bundle.fma, false, true);
182
183 bi_assign_uniform_constant_single(regs, clause, bundle.add, assigned, false);
184 }
185
186 /* Assigns a port for reading, before anything is written */
187
188 static void
189 bi_assign_port_read(struct bi_registers *regs, unsigned src)
190 {
191 /* We only assign for registers */
192 if (!(src & BIR_INDEX_REGISTER))
193 return;
194
195 unsigned reg = src & ~BIR_INDEX_REGISTER;
196
197 /* Check if we already assigned the port */
198 for (unsigned i = 0; i <= 1; ++i) {
199 if (regs->port[i] == reg && regs->enabled[i])
200 return;
201 }
202
203 if (regs->port[3] == reg && regs->read_port3)
204 return;
205
206 /* Assign it now */
207
208 for (unsigned i = 0; i <= 1; ++i) {
209 if (!regs->enabled[i]) {
210 regs->port[i] = reg;
211 regs->enabled[i] = true;
212 return;
213 }
214 }
215
216 if (!regs->read_port3) {
217 regs->port[3] = reg;
218 regs->read_port3 = true;
219 }
220 }
221
222 static struct bi_registers
223 bi_assign_ports(bi_bundle now, bi_bundle prev)
224 {
225 struct bi_registers regs = { 0 };
226
227 /* We assign ports for the main register mechanism. Special ops
228 * use the data registers, which has its own mechanism entirely
229 * and thus gets skipped over here. */
230
231 unsigned read_dreg = now.add &&
232 bi_class_props[now.add->type] & BI_DATA_REG_SRC;
233
234 unsigned write_dreg = prev.add &&
235 bi_class_props[prev.add->type] & BI_DATA_REG_DEST;
236
237 /* First, assign reads */
238
239 if (now.fma)
240 bi_foreach_src(now.fma, src)
241 bi_assign_port_read(&regs, now.fma->src[src]);
242
243 if (now.add) {
244 bi_foreach_src(now.add, src) {
245 if (!(src == 0 && read_dreg))
246 bi_assign_port_read(&regs, now.add->src[src]);
247 }
248 }
249
250 /* Next, assign writes */
251
252 if (prev.fma && prev.fma->dest & BIR_INDEX_REGISTER) {
253 regs.port[2] = prev.fma->dest & ~BIR_INDEX_REGISTER;
254 regs.write_fma = true;
255 }
256
257 if (prev.add && prev.add->dest & BIR_INDEX_REGISTER && !write_dreg) {
258 unsigned r = prev.add->dest & ~BIR_INDEX_REGISTER;
259
260 if (regs.write_fma) {
261 /* Scheduler constraint: cannot read 3 and write 2 */
262 assert(!regs.read_port3);
263 regs.port[3] = r;
264 } else {
265 regs.port[2] = r;
266 }
267
268 regs.write_add = true;
269 }
270
271 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
272
273 if (regs.enabled[0] && regs.enabled[1] && regs.port[1] < regs.port[0]) {
274 unsigned temp = regs.port[0];
275 regs.port[0] = regs.port[1];
276 regs.port[1] = temp;
277 }
278
279 return regs;
280 }
281
282 /* Determines the register control field, ignoring the first? flag */
283
284 static enum bifrost_reg_control
285 bi_pack_register_ctrl_lo(struct bi_registers r)
286 {
287 if (r.write_fma) {
288 if (r.write_add) {
289 assert(!r.read_port3);
290 return BIFROST_WRITE_ADD_P2_FMA_P3;
291 } else {
292 if (r.read_port3)
293 return BIFROST_WRITE_FMA_P2_READ_P3;
294 else
295 return BIFROST_WRITE_FMA_P2;
296 }
297 } else if (r.write_add) {
298 if (r.read_port3)
299 return BIFROST_WRITE_ADD_P2_READ_P3;
300 else
301 return BIFROST_WRITE_ADD_P2;
302 } else if (r.read_port3)
303 return BIFROST_READ_P3;
304 else
305 return BIFROST_REG_NONE;
306 }
307
308 /* Ditto but account for the first? flag this time */
309
310 static enum bifrost_reg_control
311 bi_pack_register_ctrl(struct bi_registers r)
312 {
313 enum bifrost_reg_control ctrl = bi_pack_register_ctrl_lo(r);
314
315 if (r.first_instruction) {
316 if (ctrl == BIFROST_REG_NONE)
317 ctrl = BIFROST_FIRST_NONE;
318 else
319 ctrl |= BIFROST_FIRST_NONE;
320 }
321
322 return ctrl;
323 }
324
325 static uint64_t
326 bi_pack_registers(struct bi_registers regs)
327 {
328 enum bifrost_reg_control ctrl = bi_pack_register_ctrl(regs);
329 struct bifrost_regs s;
330 uint64_t packed = 0;
331
332 if (regs.enabled[1]) {
333 /* Gotta save that bit!~ Required by the 63-x trick */
334 assert(regs.port[1] > regs.port[0]);
335 assert(regs.enabled[0]);
336
337 /* Do the 63-x trick, see docs/disasm */
338 if (regs.port[0] > 31) {
339 regs.port[0] = 63 - regs.port[0];
340 regs.port[1] = 63 - regs.port[1];
341 }
342
343 assert(regs.port[0] <= 31);
344 assert(regs.port[1] <= 63);
345
346 s.ctrl = ctrl;
347 s.reg1 = regs.port[1];
348 s.reg0 = regs.port[0];
349 } else {
350 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
351 s.reg1 = ctrl << 2;
352
353 if (regs.enabled[0]) {
354 /* Bit 0 upper bit of port 0 */
355 s.reg1 |= (regs.port[0] >> 5);
356
357 /* Rest of port 0 in usual spot */
358 s.reg0 = (regs.port[0] & 0b11111);
359 } else {
360 /* Bit 1 set if port 0 also disabled */
361 s.reg1 |= (1 << 1);
362 }
363 }
364
365 s.reg3 = regs.port[3];
366 s.reg2 = regs.port[2];
367 s.uniform_const = regs.uniform_constant;
368
369 memcpy(&packed, &s, sizeof(s));
370 return packed;
371 }
372
373 static void
374 bi_set_data_register(bi_clause *clause, unsigned idx)
375 {
376 assert(idx & BIR_INDEX_REGISTER);
377 unsigned reg = idx & ~BIR_INDEX_REGISTER;
378 assert(reg <= 63);
379 clause->data_register = reg;
380 }
381
382 static void
383 bi_read_data_register(bi_clause *clause, bi_instruction *ins)
384 {
385 bi_set_data_register(clause, ins->src[0]);
386 }
387
388 static void
389 bi_write_data_register(bi_clause *clause, bi_instruction *ins)
390 {
391 bi_set_data_register(clause, ins->dest);
392 }
393
394 static enum bifrost_packed_src
395 bi_get_src_reg_port(struct bi_registers *regs, unsigned src)
396 {
397 unsigned reg = src & ~BIR_INDEX_REGISTER;
398
399 if (regs->port[0] == reg && regs->enabled[0])
400 return BIFROST_SRC_PORT0;
401 else if (regs->port[1] == reg && regs->enabled[1])
402 return BIFROST_SRC_PORT1;
403 else if (regs->port[3] == reg && regs->read_port3)
404 return BIFROST_SRC_PORT3;
405 else
406 unreachable("Tried to access register with no port");
407 }
408
409 static enum bifrost_packed_src
410 bi_get_src(bi_instruction *ins, struct bi_registers *regs, unsigned s, bool is_fma)
411 {
412 unsigned src = ins->src[s];
413
414 if (src & BIR_INDEX_REGISTER)
415 return bi_get_src_reg_port(regs, src);
416 else if (src & BIR_INDEX_ZERO && is_fma)
417 return BIFROST_SRC_STAGE;
418 else if (src & BIR_INDEX_PASS)
419 return src & ~BIR_INDEX_PASS;
420 else
421 unreachable("Unknown src");
422 }
423
424 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
425 * 16-bit and written components must correspond to valid swizzles (component x
426 * or y). */
427
428 static unsigned
429 bi_swiz16(bi_instruction *ins, unsigned src)
430 {
431 assert(nir_alu_type_get_type_size(ins->src_types[src]) == 16);
432 unsigned swizzle = 0;
433
434 for (unsigned c = 0; c < 2; ++c) {
435 if (!bi_writes_component(ins, src)) continue;
436
437 unsigned k = ins->swizzle[src][c];
438 assert(k < 1);
439 swizzle |= (k << c);
440 }
441
442 return swizzle;
443 }
444
445 static unsigned
446 bi_pack_fma_fma(bi_instruction *ins, struct bi_registers *regs)
447 {
448 /* (-a)(-b) = ab, so we only need one negate bit */
449 bool negate_mul = ins->src_neg[0] ^ ins->src_neg[1];
450
451 if (ins->dest_type == nir_type_float32) {
452 struct bifrost_fma_fma pack = {
453 .src0 = bi_get_src(ins, regs, 0, true),
454 .src1 = bi_get_src(ins, regs, 1, true),
455 .src2 = bi_get_src(ins, regs, 2, true),
456 .src0_abs = ins->src_abs[0],
457 .src1_abs = ins->src_abs[1],
458 .src2_abs = ins->src_abs[2],
459 .src0_neg = negate_mul,
460 .src2_neg = ins->src_neg[2],
461 .outmod = ins->outmod,
462 .roundmode = ins->roundmode,
463 .op = BIFROST_FMA_OP_FMA
464 };
465
466 RETURN_PACKED(pack);
467 } else if (ins->dest_type == nir_type_float16) {
468 struct bifrost_fma_fma16 pack = {
469 .src0 = bi_get_src(ins, regs, 0, true),
470 .src1 = bi_get_src(ins, regs, 1, true),
471 .src2 = bi_get_src(ins, regs, 2, true),
472 .swizzle_0 = bi_swiz16(ins, 0),
473 .swizzle_1 = bi_swiz16(ins, 1),
474 .swizzle_2 = bi_swiz16(ins, 2),
475 .src0_neg = negate_mul,
476 .src2_neg = ins->src_neg[2],
477 .outmod = ins->outmod,
478 .roundmode = ins->roundmode,
479 .op = BIFROST_FMA_OP_FMA16
480 };
481
482 RETURN_PACKED(pack);
483 } else {
484 unreachable("Invalid fma dest type");
485 }
486 }
487
488 static unsigned
489 bi_pack_fma_add_f32(bi_instruction *ins, struct bi_registers *regs)
490 {
491 struct bifrost_fma_add pack = {
492 .src0 = bi_get_src(ins, regs, 0, true),
493 .src1 = bi_get_src(ins, regs, 1, true),
494 .src0_abs = ins->src_abs[0],
495 .src1_abs = ins->src_abs[1],
496 .src0_neg = ins->src_neg[0],
497 .src1_neg = ins->src_neg[1],
498 .unk = 0x0,
499 .outmod = ins->outmod,
500 .roundmode = ins->roundmode,
501 .op = BIFROST_FMA_OP_FADD32
502 };
503
504 RETURN_PACKED(pack);
505 }
506
507 static unsigned
508 bi_pack_fma_addmin_f16(bi_instruction *ins, struct bi_registers *regs)
509 {
510 unsigned op =
511 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD16 :
512 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN16 :
513 BIFROST_FMA_OP_FMAX16;
514
515 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
516 * l be an auxiliary bit we encode. Then the hardware determines:
517 *
518 * abs0 = l || k
519 * abs1 = l && k
520 *
521 * Since add/min/max are commutative, this saves a bit by using the
522 * order of the operands as a bit (k). To pack this, first note:
523 *
524 * (l && k) implies (l || k).
525 *
526 * That is, if the second argument is abs'd, then the first argument
527 * also has abs. So there are three cases:
528 *
529 * Case 0: Neither src has absolute value. Then we have l = k = 0.
530 *
531 * Case 1: Exactly one src has absolute value. Assign that source to
532 * src0 and the other source to src1. Compute k = src1 < src0 based on
533 * that assignment. Then l = ~k.
534 *
535 * Case 2: Both sources have absolute value. Then we have l = k = 1.
536 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
537 * That is, this encoding is only valid if src1 and src0 are distinct.
538 * This is a scheduling restriction (XXX); if an op of this type
539 * requires both identical sources to have abs value, then we must
540 * schedule to ADD (which does not use this ordering trick).
541 */
542
543 unsigned abs_0 = ins->src_abs[0], abs_1 = ins->src_abs[1];
544 unsigned src_0 = bi_get_src(ins, regs, 0, true);
545 unsigned src_1 = bi_get_src(ins, regs, 0, true);
546 bool l = false;
547
548 if (!abs_0 && !abs_1) {
549 /* Force k = 0 <===> NOT(src1 < src0) <==> src1 >= src0 */
550 if (src_0 < src_1) {
551 unsigned tmp = src_0;
552 src_0 = src_1;
553 src_1 = tmp;
554 }
555 } else if (abs_0 && !abs_1) {
556 l = src_1 >= src_0;
557 } else if (abs_1 && !abs_0) {
558 unsigned tmp = src_0;
559 src_0 = src_1;
560 src_0 = tmp;
561
562 l = src_1 >= src_0;
563 } else {
564 if (src_0 >= src_1) {
565 unsigned tmp = src_0;
566 src_0 = src_1;
567 src_1 = tmp;
568 }
569
570 l = true;
571 }
572
573 struct bifrost_fma_add_minmax16 pack = {
574 .src0 = src_0,
575 .src1 = src_1,
576 .src0_neg = ins->src_neg[0],
577 .src1_neg = ins->src_neg[1],
578 .abs1 = l,
579 .outmod = ins->outmod,
580 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
581 .op = op
582 };
583
584 RETURN_PACKED(pack);
585 }
586
587 static unsigned
588 bi_pack_fma_add(bi_instruction *ins, struct bi_registers *regs)
589 {
590 if (ins->dest_type == nir_type_float32)
591 return bi_pack_fma_add_f32(ins, regs);
592 else if(ins->dest_type == nir_type_float16)
593 return bi_pack_fma_addmin_f16(ins, regs);
594 else
595 unreachable("Unknown FMA/ADD type");
596 }
597
598 static unsigned
599 bi_pack_fma_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
600 {
601 struct bifrost_fma_inst pack = {
602 .src0 = bi_get_src(ins, regs, 0, true),
603 .op = op
604 };
605
606 RETURN_PACKED(pack);
607 }
608
609 static enum bifrost_csel_cond
610 bi_cond_to_csel(enum bi_cond cond, bool *flip, bool *invert, nir_alu_type T)
611 {
612 nir_alu_type B = nir_alu_type_get_base_type(T);
613 unsigned idx = (B == nir_type_float) ? 0 :
614 ((B == nir_type_int) ? 1 : 2);
615
616 switch (cond){
617 case BI_COND_LT:
618 *flip = true;
619 case BI_COND_GT: {
620 const enum bifrost_csel_cond ops[] = {
621 BIFROST_FGT_F,
622 BIFROST_IGT_I,
623 BIFROST_UGT_I
624 };
625
626 return ops[idx];
627 }
628 case BI_COND_LE:
629 *flip = true;
630 case BI_COND_GE: {
631 const enum bifrost_csel_cond ops[] = {
632 BIFROST_FGE_F,
633 BIFROST_IGE_I,
634 BIFROST_UGE_I
635 };
636
637 return ops[idx];
638 }
639 case BI_COND_NE:
640 *invert = true;
641 case BI_COND_EQ: {
642 const enum bifrost_csel_cond ops[] = {
643 BIFROST_FEQ_F,
644 BIFROST_IEQ_F,
645 BIFROST_IEQ_F /* sign is irrelevant */
646 };
647
648 return ops[idx];
649 }
650 default:
651 unreachable("Invalid op for csel");
652 }
653 }
654
655 static unsigned
656 bi_pack_fma_csel(bi_instruction *ins, struct bi_registers *regs)
657 {
658 /* TODO: Use csel3 as well */
659 bool flip = false, invert = false;
660
661 enum bifrost_csel_cond cond =
662 bi_cond_to_csel(ins->csel_cond, &flip, &invert, ins->src_types[0]);
663
664 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
665
666 unsigned cmp_0 = (flip ? 3 : 0);
667 unsigned cmp_1 = (flip ? 0 : 3);
668 unsigned res_0 = (invert ? 2 : 1);
669 unsigned res_1 = (invert ? 1 : 2);
670
671 struct bifrost_csel4 pack = {
672 .src0 = bi_get_src(ins, regs, cmp_0, true),
673 .src1 = bi_get_src(ins, regs, cmp_1, true),
674 .src2 = bi_get_src(ins, regs, res_0, true),
675 .src3 = bi_get_src(ins, regs, res_1, true),
676 .cond = cond,
677 .op = (size == 16) ? BIFROST_FMA_OP_CSEL4_V16 :
678 BIFROST_FMA_OP_CSEL4
679 };
680
681 RETURN_PACKED(pack);
682 }
683
684 /* We have a single convert opcode in the IR but a number of opcodes that could
685 * come out. In particular we have native opcodes for:
686 *
687 * [ui]16 --> [fui]32 -- int16_to_32
688 * f16 --> f32 -- float16_to_32
689 * f32 --> f16 -- float32_to_16
690 * f32 --> [ui]32 -- float32_to_int
691 * [ui]32 --> f32 -- int_to_float32
692 * [fui]16 --> [fui]16 -- f2i_i2f16
693 */
694
695 static unsigned
696 bi_pack_fma_convert(bi_instruction *ins, struct bi_registers *regs)
697 {
698 nir_alu_type from_base = nir_alu_type_get_base_type(ins->src_types[0]);
699 unsigned from_size = nir_alu_type_get_type_size(ins->src_types[0]);
700 bool from_unsigned = from_base == nir_type_uint;
701
702 nir_alu_type to_base = nir_alu_type_get_base_type(ins->dest_type);
703 unsigned to_size = nir_alu_type_get_type_size(ins->dest_type);
704 bool to_unsigned = to_base == nir_type_uint;
705
706 /* Sanity check */
707 assert((from_base != to_base) || (from_size != to_size));
708 assert((MAX2(from_size, to_size) / MIN2(from_size, to_size)) <= 2);
709
710 if (from_size == 16 && to_size == 16) {
711 /* f2i_i2f16 */
712 unreachable("i16 not yet implemented");
713 } else if (from_size == 32 && to_size == 32) {
714 unsigned op = 0;
715
716 if (from_base == nir_type_float) {
717 op = BIFROST_FMA_FLOAT32_TO_INT(to_unsigned);
718 } else {
719 op = BIFROST_FMA_INT_TO_FLOAT32(from_unsigned);
720 }
721
722 return bi_pack_fma_1src(ins, regs, op);
723 } else if (from_size == 16 && to_size == 32) {
724 bool from_y = ins->swizzle[0][0];
725
726 if (from_base == nir_type_float) {
727 return bi_pack_fma_1src(ins, regs,
728 BIFROST_FMA_FLOAT16_TO_32(from_y));
729 } else {
730 unreachable("i16 not yet implemented");
731 }
732 } else if (from_size == 32 && to_size == 16) {
733 if (from_base == nir_type_float) {
734 /* TODO: second vectorized source? */
735 struct bifrost_fma_2src pack = {
736 .src0 = bi_get_src(ins, regs, 0, true),
737 .src1 = BIFROST_SRC_STAGE, /* 0 */
738 .op = BIFROST_FMA_FLOAT32_TO_16
739 };
740
741 RETURN_PACKED(pack);
742 } else {
743 unreachable("i16 not yet implemented");
744 }
745 }
746
747 unreachable("Unknown convert");
748 }
749
750 static unsigned
751 bi_pack_fma(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
752 {
753 if (!bundle.fma)
754 return BIFROST_FMA_NOP;
755
756 switch (bundle.fma->type) {
757 case BI_ADD:
758 return bi_pack_fma_add(bundle.fma, regs);
759 case BI_CMP:
760 case BI_BITWISE:
761 return BIFROST_FMA_NOP;
762 case BI_CONVERT:
763 return bi_pack_fma_convert(bundle.fma, regs);
764 case BI_CSEL:
765 return bi_pack_fma_csel(bundle.fma, regs);
766 case BI_FMA:
767 return bi_pack_fma_fma(bundle.fma, regs);
768 case BI_FREXP:
769 case BI_ISUB:
770 case BI_MINMAX:
771 return BIFROST_FMA_NOP;
772 case BI_MOV:
773 return bi_pack_fma_1src(bundle.fma, regs, BIFROST_FMA_OP_MOV);
774 case BI_FMOV:
775 case BI_SHIFT:
776 case BI_SWIZZLE:
777 case BI_ROUND:
778 return BIFROST_FMA_NOP;
779 default:
780 unreachable("Cannot encode class as FMA");
781 }
782 }
783
784 static unsigned
785 bi_pack_add_ld_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
786 {
787 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
788 assert(size == 32 || size == 16);
789
790 unsigned op = (size == 32) ?
791 BIFROST_ADD_OP_LD_VAR_32 :
792 BIFROST_ADD_OP_LD_VAR_16;
793
794 unsigned cmask = bi_from_bytemask(ins->writemask, size / 8);
795 unsigned channels = util_bitcount(cmask);
796 assert(cmask == ((1 << channels) - 1));
797
798 unsigned packed_addr = 0;
799
800 if (ins->src[0] & BIR_INDEX_CONSTANT) {
801 /* Direct uses address field directly */
802 packed_addr = bi_get_immediate(ins, ins->src[0]);
803 assert(packed_addr < 0b1000);
804 } else {
805 /* Indirect gets an extra source */
806 packed_addr = bi_get_src(ins, regs, 0, false) | 0b11000;
807 }
808
809 /* The destination is thrown in the data register */
810 assert(ins->dest & BIR_INDEX_REGISTER);
811 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
812
813 assert(channels >= 1 && channels <= 4);
814
815 struct bifrost_ld_var pack = {
816 .src0 = bi_get_src(ins, regs, 1, false),
817 .addr = packed_addr,
818 .channels = MALI_POSITIVE(channels),
819 .interp_mode = ins->load_vary.interp_mode,
820 .reuse = ins->load_vary.reuse,
821 .flat = ins->load_vary.flat,
822 .op = op
823 };
824
825 RETURN_PACKED(pack);
826 }
827
828 static unsigned
829 bi_pack_add_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
830 {
831 struct bifrost_add_2src pack = {
832 .src0 = bi_get_src(ins, regs, 0, true),
833 .src1 = bi_get_src(ins, regs, 1, true),
834 .op = op
835 };
836
837 RETURN_PACKED(pack);
838 }
839
840 static unsigned
841 bi_pack_add_ld_ubo(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
842 {
843 unsigned components = bi_load32_components(ins);
844
845 const unsigned ops[4] = {
846 BIFROST_ADD_OP_LD_UBO_1,
847 BIFROST_ADD_OP_LD_UBO_2,
848 BIFROST_ADD_OP_LD_UBO_3,
849 BIFROST_ADD_OP_LD_UBO_4
850 };
851
852 bi_write_data_register(clause, ins);
853 return bi_pack_add_2src(ins, regs, ops[components - 1]);
854 }
855
856 static enum bifrost_ldst_type
857 bi_pack_ldst_type(nir_alu_type T)
858 {
859 switch (T) {
860 case nir_type_float16: return BIFROST_LDST_F16;
861 case nir_type_float32: return BIFROST_LDST_F32;
862 case nir_type_int32: return BIFROST_LDST_I32;
863 case nir_type_uint32: return BIFROST_LDST_U32;
864 default: unreachable("Invalid type loaded");
865 }
866 }
867
868 static unsigned
869 bi_pack_add_ld_var_addr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
870 {
871 struct bifrost_ld_var_addr pack = {
872 .src0 = bi_get_src(ins, regs, 1, false),
873 .src1 = bi_get_src(ins, regs, 2, false),
874 .location = bi_get_immediate(ins, ins->src[0]),
875 .type = bi_pack_ldst_type(ins->src_types[3]),
876 .op = BIFROST_ADD_OP_LD_VAR_ADDR
877 };
878
879 bi_write_data_register(clause, ins);
880 RETURN_PACKED(pack);
881 }
882
883 static unsigned
884 bi_pack_add_ld_attr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
885 {
886 struct bifrost_ld_attr pack = {
887 .src0 = bi_get_src(ins, regs, 1, false),
888 .src1 = bi_get_src(ins, regs, 2, false),
889 .location = bi_get_immediate(ins, ins->src[0]),
890 .channels = MALI_POSITIVE(bi_load32_components(ins)),
891 .type = bi_pack_ldst_type(ins->dest_type),
892 .op = BIFROST_ADD_OP_LD_ATTR
893 };
894
895 bi_write_data_register(clause, ins);
896 RETURN_PACKED(pack);
897 }
898
899 static unsigned
900 bi_pack_add_st_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
901 {
902 assert(ins->store_channels >= 1 && ins->store_channels <= 4);
903
904 struct bifrost_st_vary pack = {
905 .src0 = bi_get_src(ins, regs, 1, false),
906 .src1 = bi_get_src(ins, regs, 2, false),
907 .src2 = bi_get_src(ins, regs, 3, false),
908 .channels = MALI_POSITIVE(ins->store_channels),
909 .op = BIFROST_ADD_OP_ST_VAR
910 };
911
912 bi_read_data_register(clause, ins);
913 RETURN_PACKED(pack);
914 }
915
916 static unsigned
917 bi_pack_add_atest(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
918 {
919 /* TODO: fp16 */
920 assert(ins->src_types[1] == nir_type_float32);
921
922 struct bifrost_add_atest pack = {
923 .src0 = bi_get_src(ins, regs, 0, false),
924 .src1 = bi_get_src(ins, regs, 1, false),
925 .component = 1, /* Set for fp32 */
926 .op = BIFROST_ADD_OP_ATEST,
927 };
928
929 /* Despite *also* writing with the usual mechanism... quirky and
930 * perhaps unnecessary, but let's match the blob */
931 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
932
933 RETURN_PACKED(pack);
934 }
935
936 static unsigned
937 bi_pack_add_blend(bi_instruction *ins, struct bi_registers *regs)
938 {
939 struct bifrost_add_inst pack = {
940 .src0 = bi_get_src(ins, regs, 0, false),
941 .op = BIFROST_ADD_OP_BLEND
942 };
943
944 /* TODO: Pack location in uniform_const */
945 assert(ins->blend_location == 0);
946
947 RETURN_PACKED(pack);
948 }
949
950 static unsigned
951 bi_pack_add(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
952 {
953 if (!bundle.add)
954 return BIFROST_ADD_NOP;
955
956 switch (bundle.add->type) {
957 case BI_ADD:
958 return BIFROST_ADD_NOP;
959 case BI_ATEST:
960 return bi_pack_add_atest(clause, bundle.add, regs);
961 case BI_BRANCH:
962 case BI_CMP:
963 return BIFROST_ADD_NOP;
964 case BI_BLEND:
965 return bi_pack_add_blend(bundle.add, regs);
966 case BI_BITWISE:
967 case BI_CONVERT:
968 case BI_DISCARD:
969 case BI_FREXP:
970 case BI_ISUB:
971 case BI_LOAD:
972 return BIFROST_ADD_NOP;
973 case BI_LOAD_ATTR:
974 return bi_pack_add_ld_attr(clause, bundle.add, regs);
975 case BI_LOAD_UNIFORM:
976 return bi_pack_add_ld_ubo(clause, bundle.add, regs);
977 case BI_LOAD_VAR:
978 return bi_pack_add_ld_vary(clause, bundle.add, regs);
979 case BI_LOAD_VAR_ADDRESS:
980 return bi_pack_add_ld_var_addr(clause, bundle.add, regs);
981 case BI_MINMAX:
982 case BI_MOV:
983 case BI_FMOV:
984 case BI_SHIFT:
985 case BI_STORE:
986 return BIFROST_ADD_NOP;
987 case BI_STORE_VAR:
988 return bi_pack_add_st_vary(clause, bundle.add, regs);
989 case BI_SPECIAL:
990 case BI_SWIZZLE:
991 case BI_TEX:
992 case BI_ROUND:
993 return BIFROST_ADD_NOP;
994 default:
995 unreachable("Cannot encode class as ADD");
996 }
997 }
998
999 struct bi_packed_bundle {
1000 uint64_t lo;
1001 uint64_t hi;
1002 };
1003
1004 static struct bi_packed_bundle
1005 bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_bundle)
1006 {
1007 struct bi_registers regs = bi_assign_ports(bundle, prev);
1008 bi_assign_uniform_constant(clause, &regs, bundle);
1009 regs.first_instruction = first_bundle;
1010
1011 uint64_t reg = bi_pack_registers(regs);
1012 uint64_t fma = bi_pack_fma(clause, bundle, &regs);
1013 uint64_t add = bi_pack_add(clause, bundle, &regs);
1014
1015 struct bi_packed_bundle packed = {
1016 .lo = reg | (fma << 35) | ((add & 0b111111) << 58),
1017 .hi = add >> 6
1018 };
1019
1020 return packed;
1021 }
1022
1023 /* Packs the next two constants as a dedicated constant quadword at the end of
1024 * the clause, returning the number packed. */
1025
1026 static unsigned
1027 bi_pack_constants(bi_context *ctx, bi_clause *clause,
1028 unsigned index,
1029 struct util_dynarray *emission)
1030 {
1031 /* After these two, are we done? Determines tag */
1032 bool done = clause->constant_count <= (index + 2);
1033 bool only = clause->constant_count <= (index + 1);
1034
1035 /* TODO: Pos */
1036 assert(index == 0 && clause->bundle_count == 1);
1037
1038 struct bifrost_fmt_constant quad = {
1039 .pos = 0, /* TODO */
1040 .tag = done ? BIFROST_FMTC_FINAL : BIFROST_FMTC_CONSTANTS,
1041 .imm_1 = clause->constants[index + 0] >> 4,
1042 .imm_2 = only ? 0 : clause->constants[index + 1] >> 4
1043 };
1044
1045 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1046 * of the second constant with the first must be less than 8, otherwise
1047 * we have to swap them. I am not able to reproduce this on G52,
1048 * further investigation needed. Possibly an errata. XXX */
1049
1050 util_dynarray_append(emission, struct bifrost_fmt_constant, quad);
1051
1052 return 2;
1053 }
1054
1055 static void
1056 bi_pack_clause(bi_context *ctx, bi_clause *clause, bi_clause *next,
1057 struct util_dynarray *emission)
1058 {
1059 struct bi_packed_bundle ins_1 = bi_pack_bundle(clause, clause->bundles[0], clause->bundles[0], true);
1060 assert(clause->bundle_count == 1);
1061
1062 /* Used to decide if we elide writes */
1063 bool is_fragment = ctx->stage == MESA_SHADER_FRAGMENT;
1064
1065 /* State for packing constants throughout */
1066 unsigned constant_index = 0;
1067
1068 struct bifrost_fmt1 quad_1 = {
1069 .tag = clause->constant_count ? BIFROST_FMT1_CONSTANTS : BIFROST_FMT1_FINAL,
1070 .header = bi_pack_header(clause, next, is_fragment),
1071 .ins_1 = ins_1.lo,
1072 .ins_2 = ins_1.hi & ((1 << 11) - 1),
1073 .ins_0 = (ins_1.hi >> 11) & 0b111,
1074 };
1075
1076 util_dynarray_append(emission, struct bifrost_fmt1, quad_1);
1077
1078 /* Pack the remaining constants */
1079
1080 while (constant_index < clause->constant_count) {
1081 constant_index += bi_pack_constants(ctx, clause,
1082 constant_index, emission);
1083 }
1084 }
1085
1086 static bi_clause *
1087 bi_next_clause(bi_context *ctx, pan_block *block, bi_clause *clause)
1088 {
1089 /* Try the next clause in this block */
1090 if (clause->link.next != &((bi_block *) block)->clauses)
1091 return list_first_entry(&(clause->link), bi_clause, link);
1092
1093 /* Try the next block, or the one after that if it's empty, etc .*/
1094 pan_block *next_block = pan_next_block(block);
1095
1096 bi_foreach_block_from(ctx, next_block, block) {
1097 bi_block *blk = (bi_block *) block;
1098
1099 if (!list_is_empty(&blk->clauses))
1100 return list_first_entry(&(blk->clauses), bi_clause, link);
1101 }
1102
1103 return NULL;
1104 }
1105
1106 void
1107 bi_pack(bi_context *ctx, struct util_dynarray *emission)
1108 {
1109 util_dynarray_init(emission, NULL);
1110
1111 bi_foreach_block(ctx, _block) {
1112 bi_block *block = (bi_block *) _block;
1113
1114 bi_foreach_clause_in_block(block, clause) {
1115 bi_clause *next = bi_next_clause(ctx, _block, clause);
1116 bi_pack_clause(ctx, clause, next, emission);
1117 }
1118 }
1119 }