2 * Copyright (C) 2020 Collabora, Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
27 #define RETURN_PACKED(str) { \
29 memcpy(&temp, &str, sizeof(str)); \
33 /* This file contains the final passes of the compiler. Running after
34 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
35 * bits on the wire (as well as fixup branches) */
38 bi_pack_header(bi_clause
*clause
, bi_clause
*next
, bool is_fragment
)
40 struct bifrost_header header
= {
41 .back_to_back
= clause
->back_to_back
,
42 .no_end_of_shader
= (next
!= NULL
),
43 .elide_writes
= is_fragment
,
44 .branch_cond
= clause
->branch_conditional
,
45 .datareg_writebarrier
= clause
->data_register_write_barrier
,
46 .datareg
= clause
->data_register
,
47 .scoreboard_deps
= next
? next
->dependencies
: 0,
48 .scoreboard_index
= clause
->scoreboard_id
,
49 .clause_type
= clause
->clause_type
,
50 .next_clause_type
= next
? next
->clause_type
: 0,
53 header
.branch_cond
|= header
.back_to_back
;
56 memcpy(&u
, &header
, sizeof(header
));
60 /* Represents the assignment of ports for a given bundle */
63 /* Register to assign to each port */
66 /* Read ports can be disabled */
69 /* Should we write FMA? what about ADD? If only a single port is
70 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
71 bool write_fma
, write_add
;
73 /* Should we read with port 3? */
76 /* Packed uniform/constant */
77 uint8_t uniform_constant
;
79 /* Whether writes are actually for the last instruction */
80 bool first_instruction
;
84 bi_print_ports(struct bi_registers
*regs
)
86 for (unsigned i
= 0; i
< 2; ++i
) {
88 printf("port %u: %u\n", i
, regs
->port
[i
]);
91 if (regs
->write_fma
|| regs
->write_add
) {
92 printf("port 2 (%s): %u\n",
93 regs
->write_add
? "ADD" : "FMA",
97 if ((regs
->write_fma
&& regs
->write_add
) || regs
->read_port3
) {
98 printf("port 3 (%s): %u\n",
99 regs
->read_port3
? "read" : "FMA",
104 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
105 * pushed uniform per bundle. Figure out which one we need in the bundle (the
106 * scheduler needs to ensure we only have one type per bundle), validate
107 * everything, and rewrite away the register/uniform indices to use 3-bit
108 * sources directly. */
111 bi_lookup_constant(bi_clause
*clause
, uint64_t cons
, bool *hi
, bool b64
)
113 uint64_t want
= (cons
>> 4);
115 for (unsigned i
= 0; i
< clause
->constant_count
; ++i
) {
116 /* Only check top 60-bits since that's what's actually embedded
117 * in the clause, the bottom 4-bits are bundle-inline */
119 uint64_t candidates
[2] = {
120 clause
->constants
[i
] >> 4,
121 clause
->constants
[i
] >> 36
124 /* For <64-bit mode, we treat lo/hi separately */
127 candidates
[0] &= (0xFFFFFFFF >> 4);
129 if (candidates
[0] == want
)
132 if (candidates
[1] == want
&& !b64
) {
138 unreachable("Invalid constant accessed");
142 bi_constant_field(unsigned idx
)
146 const unsigned values
[] = {
150 return values
[idx
] << 4;
154 bi_assign_uniform_constant_single(
155 struct bi_registers
*regs
,
157 bi_instruction
*ins
, bool assigned
, bool fast_zero
)
162 if (ins
->type
== BI_BLEND
) {
164 regs
->uniform_constant
= 0x8;
168 bi_foreach_src(ins
, s
) {
169 if (s
== 0 && (ins
->type
== BI_LOAD_VAR_ADDRESS
|| ins
->type
== BI_LOAD_ATTR
)) continue;
171 if (ins
->src
[s
] & BIR_INDEX_CONSTANT
) {
172 /* Let direct addresses through */
173 if (ins
->type
== BI_LOAD_VAR
)
177 bool b64
= nir_alu_type_get_type_size(ins
->src_types
[s
]) > 32;
178 uint64_t cons
= bi_get_immediate(ins
, s
);
179 unsigned idx
= bi_lookup_constant(clause
, cons
, &hi
, b64
);
180 unsigned lo
= clause
->constants
[idx
] & 0xF;
181 unsigned f
= bi_constant_field(idx
) | lo
;
183 if (assigned
&& regs
->uniform_constant
!= f
)
184 unreachable("Mismatched uniform/const field: imm");
186 regs
->uniform_constant
= f
;
187 ins
->src
[s
] = BIR_INDEX_PASS
| (hi
? BIFROST_SRC_CONST_HI
: BIFROST_SRC_CONST_LO
);
189 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& (ins
->type
== BI_LOAD_UNIFORM
|| ins
->type
== BI_LOAD_VAR
)) {
190 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
191 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_HI
;
192 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& !fast_zero
) {
193 /* FMAs have a fast zero port, ADD needs to use the
194 * uniform/const port's special 0 mode handled here */
197 if (assigned
&& regs
->uniform_constant
!= f
)
198 unreachable("Mismatched uniform/const field: 0");
200 regs
->uniform_constant
= f
;
201 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_LO
;
203 } else if (s
& BIR_INDEX_UNIFORM
) {
204 unreachable("Push uniforms not implemented yet");
212 bi_assign_uniform_constant(
214 struct bi_registers
*regs
,
218 bi_assign_uniform_constant_single(regs
, clause
, bundle
.fma
, false, true);
220 bi_assign_uniform_constant_single(regs
, clause
, bundle
.add
, assigned
, false);
223 /* Assigns a port for reading, before anything is written */
226 bi_assign_port_read(struct bi_registers
*regs
, unsigned src
)
228 /* We only assign for registers */
229 if (!(src
& BIR_INDEX_REGISTER
))
232 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
234 /* Check if we already assigned the port */
235 for (unsigned i
= 0; i
<= 1; ++i
) {
236 if (regs
->port
[i
] == reg
&& regs
->enabled
[i
])
240 if (regs
->port
[3] == reg
&& regs
->read_port3
)
245 for (unsigned i
= 0; i
<= 1; ++i
) {
246 if (!regs
->enabled
[i
]) {
248 regs
->enabled
[i
] = true;
253 if (!regs
->read_port3
) {
255 regs
->read_port3
= true;
259 bi_print_ports(regs
);
260 unreachable("Failed to find a free port for src");
263 static struct bi_registers
264 bi_assign_ports(bi_bundle now
, bi_bundle prev
)
266 struct bi_registers regs
= { 0 };
268 /* We assign ports for the main register mechanism. Special ops
269 * use the data registers, which has its own mechanism entirely
270 * and thus gets skipped over here. */
272 unsigned read_dreg
= now
.add
&&
273 bi_class_props
[now
.add
->type
] & BI_DATA_REG_SRC
;
275 unsigned write_dreg
= prev
.add
&&
276 bi_class_props
[prev
.add
->type
] & BI_DATA_REG_DEST
;
278 /* First, assign reads */
281 bi_foreach_src(now
.fma
, src
)
282 bi_assign_port_read(®s
, now
.fma
->src
[src
]);
285 bi_foreach_src(now
.add
, src
) {
286 if (!(src
== 0 && read_dreg
))
287 bi_assign_port_read(®s
, now
.add
->src
[src
]);
291 /* Next, assign writes */
293 if (prev
.add
&& prev
.add
->dest
& BIR_INDEX_REGISTER
&& !write_dreg
) {
294 regs
.port
[2] = prev
.add
->dest
& ~BIR_INDEX_REGISTER
;
295 regs
.write_add
= true;
298 if (prev
.fma
&& prev
.fma
->dest
& BIR_INDEX_REGISTER
) {
299 unsigned r
= prev
.fma
->dest
& ~BIR_INDEX_REGISTER
;
301 if (regs
.write_add
) {
302 /* Scheduler constraint: cannot read 3 and write 2 */
303 assert(!regs
.read_port3
);
309 regs
.write_fma
= true;
312 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
314 if (regs
.enabled
[0] && regs
.enabled
[1] && regs
.port
[1] < regs
.port
[0]) {
315 unsigned temp
= regs
.port
[0];
316 regs
.port
[0] = regs
.port
[1];
323 /* Determines the register control field, ignoring the first? flag */
325 static enum bifrost_reg_control
326 bi_pack_register_ctrl_lo(struct bi_registers r
)
330 assert(!r
.read_port3
);
331 return BIFROST_WRITE_ADD_P2_FMA_P3
;
334 return BIFROST_WRITE_FMA_P2_READ_P3
;
336 return BIFROST_WRITE_FMA_P2
;
338 } else if (r
.write_add
) {
340 return BIFROST_WRITE_ADD_P2_READ_P3
;
342 return BIFROST_WRITE_ADD_P2
;
343 } else if (r
.read_port3
)
344 return BIFROST_READ_P3
;
346 return BIFROST_REG_NONE
;
349 /* Ditto but account for the first? flag this time */
351 static enum bifrost_reg_control
352 bi_pack_register_ctrl(struct bi_registers r
)
354 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl_lo(r
);
356 if (r
.first_instruction
) {
357 if (ctrl
== BIFROST_REG_NONE
)
358 ctrl
= BIFROST_FIRST_NONE
;
359 else if (ctrl
== BIFROST_WRITE_FMA_P2_READ_P3
)
360 ctrl
= BIFROST_FIRST_WRITE_FMA_P2_READ_P3
;
362 ctrl
|= BIFROST_FIRST_NONE
;
369 bi_pack_registers(struct bi_registers regs
)
371 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl(regs
);
372 struct bifrost_regs s
= { 0 };
375 if (regs
.enabled
[1]) {
376 /* Gotta save that bit!~ Required by the 63-x trick */
377 assert(regs
.port
[1] > regs
.port
[0]);
378 assert(regs
.enabled
[0]);
380 /* Do the 63-x trick, see docs/disasm */
381 if (regs
.port
[0] > 31) {
382 regs
.port
[0] = 63 - regs
.port
[0];
383 regs
.port
[1] = 63 - regs
.port
[1];
386 assert(regs
.port
[0] <= 31);
387 assert(regs
.port
[1] <= 63);
390 s
.reg1
= regs
.port
[1];
391 s
.reg0
= regs
.port
[0];
393 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
397 if (regs
.enabled
[0]) {
398 /* Bit 0 upper bit of port 0 */
399 s
.reg1
|= (regs
.port
[0] >> 5);
401 /* Rest of port 0 in usual spot */
402 s
.reg0
= (regs
.port
[0] & 0b11111);
404 /* Bit 1 set if port 0 also disabled */
409 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
410 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
412 bool has_port2
= regs
.write_fma
|| regs
.write_add
;
413 bool has_port3
= regs
.read_port3
|| (regs
.write_fma
&& regs
.write_add
);
416 regs
.port
[3] = regs
.port
[2];
419 regs
.port
[2] = regs
.port
[3];
421 s
.reg3
= regs
.port
[3];
422 s
.reg2
= regs
.port
[2];
423 s
.uniform_const
= regs
.uniform_constant
;
425 memcpy(&packed
, &s
, sizeof(s
));
430 bi_set_data_register(bi_clause
*clause
, unsigned idx
)
432 assert(idx
& BIR_INDEX_REGISTER
);
433 unsigned reg
= idx
& ~BIR_INDEX_REGISTER
;
435 clause
->data_register
= reg
;
439 bi_read_data_register(bi_clause
*clause
, bi_instruction
*ins
)
441 bi_set_data_register(clause
, ins
->src
[0]);
445 bi_write_data_register(bi_clause
*clause
, bi_instruction
*ins
)
447 bi_set_data_register(clause
, ins
->dest
);
450 static enum bifrost_packed_src
451 bi_get_src_reg_port(struct bi_registers
*regs
, unsigned src
)
453 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
455 if (regs
->port
[0] == reg
&& regs
->enabled
[0])
456 return BIFROST_SRC_PORT0
;
457 else if (regs
->port
[1] == reg
&& regs
->enabled
[1])
458 return BIFROST_SRC_PORT1
;
459 else if (regs
->port
[3] == reg
&& regs
->read_port3
)
460 return BIFROST_SRC_PORT3
;
462 unreachable("Tried to access register with no port");
465 static enum bifrost_packed_src
466 bi_get_src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned s
, bool is_fma
)
468 unsigned src
= ins
->src
[s
];
470 if (src
& BIR_INDEX_REGISTER
)
471 return bi_get_src_reg_port(regs
, src
);
472 else if (src
& BIR_INDEX_ZERO
&& is_fma
)
473 return BIFROST_SRC_STAGE
;
474 else if (src
& BIR_INDEX_PASS
)
475 return src
& ~BIR_INDEX_PASS
;
477 bi_print_instruction(ins
, stderr
);
478 unreachable("Unknown src in above instruction");
482 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
483 * 16-bit and written components must correspond to valid swizzles (component x
487 bi_swiz16(bi_instruction
*ins
, unsigned src
)
489 assert(nir_alu_type_get_type_size(ins
->src_types
[src
]) == 16);
490 unsigned swizzle
= 0;
492 for (unsigned c
= 0; c
< 2; ++c
) {
493 if (!bi_writes_component(ins
, src
)) continue;
495 unsigned k
= ins
->swizzle
[src
][c
];
504 bi_pack_fma_fma(bi_instruction
*ins
, struct bi_registers
*regs
)
506 /* (-a)(-b) = ab, so we only need one negate bit */
507 bool negate_mul
= ins
->src_neg
[0] ^ ins
->src_neg
[1];
509 if (ins
->op
.mscale
) {
510 assert(!(ins
->src_abs
[0] && ins
->src_abs
[1]));
511 assert(!ins
->src_abs
[2] || !ins
->src_neg
[3] || !ins
->src_abs
[3]);
513 /* We can have exactly one abs, and can flip the multiplication
514 * to make it fit if we have to */
515 bool flip_ab
= ins
->src_abs
[1];
517 struct bifrost_fma_mscale pack
= {
518 .src0
= bi_get_src(ins
, regs
, flip_ab
? 1 : 0, true),
519 .src1
= bi_get_src(ins
, regs
, flip_ab
? 0 : 1, true),
520 .src2
= bi_get_src(ins
, regs
, 2, true),
521 .src3
= bi_get_src(ins
, regs
, 3, true),
524 .src0_abs
= ins
->src_abs
[0] || ins
->src_abs
[1],
525 .src1_neg
= negate_mul
,
526 .src2_neg
= ins
->src_neg
[2],
527 .op
= BIFROST_FMA_OP_MSCALE
,
531 } else if (ins
->dest_type
== nir_type_float32
) {
532 struct bifrost_fma_fma pack
= {
533 .src0
= bi_get_src(ins
, regs
, 0, true),
534 .src1
= bi_get_src(ins
, regs
, 1, true),
535 .src2
= bi_get_src(ins
, regs
, 2, true),
536 .src0_abs
= ins
->src_abs
[0],
537 .src1_abs
= ins
->src_abs
[1],
538 .src2_abs
= ins
->src_abs
[2],
539 .src0_neg
= negate_mul
,
540 .src2_neg
= ins
->src_neg
[2],
541 .outmod
= ins
->outmod
,
542 .roundmode
= ins
->roundmode
,
543 .op
= BIFROST_FMA_OP_FMA
547 } else if (ins
->dest_type
== nir_type_float16
) {
548 struct bifrost_fma_fma16 pack
= {
549 .src0
= bi_get_src(ins
, regs
, 0, true),
550 .src1
= bi_get_src(ins
, regs
, 1, true),
551 .src2
= bi_get_src(ins
, regs
, 2, true),
552 .swizzle_0
= bi_swiz16(ins
, 0),
553 .swizzle_1
= bi_swiz16(ins
, 1),
554 .swizzle_2
= bi_swiz16(ins
, 2),
555 .src0_neg
= negate_mul
,
556 .src2_neg
= ins
->src_neg
[2],
557 .outmod
= ins
->outmod
,
558 .roundmode
= ins
->roundmode
,
559 .op
= BIFROST_FMA_OP_FMA16
564 unreachable("Invalid fma dest type");
569 bi_pack_fma_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
572 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD32
:
573 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN32
:
574 BIFROST_FMA_OP_FMAX32
;
576 struct bifrost_fma_add pack
= {
577 .src0
= bi_get_src(ins
, regs
, 0, true),
578 .src1
= bi_get_src(ins
, regs
, 1, true),
579 .src0_abs
= ins
->src_abs
[0],
580 .src1_abs
= ins
->src_abs
[1],
581 .src0_neg
= ins
->src_neg
[0],
582 .src1_neg
= ins
->src_neg
[1],
584 .outmod
= ins
->outmod
,
585 .roundmode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
593 bi_pack_fp16_abs(bi_instruction
*ins
, struct bi_registers
*regs
, bool *flip
)
595 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
596 * l be an auxiliary bit we encode. Then the hardware determines:
601 * Since add/min/max are commutative, this saves a bit by using the
602 * order of the operands as a bit (k). To pack this, first note:
604 * (l && k) implies (l || k).
606 * That is, if the second argument is abs'd, then the first argument
607 * also has abs. So there are three cases:
609 * Case 0: Neither src has absolute value. Then we have l = k = 0.
611 * Case 1: Exactly one src has absolute value. Assign that source to
612 * src0 and the other source to src1. Compute k = src1 < src0 based on
613 * that assignment. Then l = ~k.
615 * Case 2: Both sources have absolute value. Then we have l = k = 1.
616 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
617 * That is, this encoding is only valid if src1 and src0 are distinct.
618 * This is a scheduling restriction (XXX); if an op of this type
619 * requires both identical sources to have abs value, then we must
620 * schedule to ADD (which does not use this ordering trick).
623 unsigned abs_0
= ins
->src_abs
[0], abs_1
= ins
->src_abs
[1];
624 unsigned src_0
= bi_get_src(ins
, regs
, 0, true);
625 unsigned src_1
= bi_get_src(ins
, regs
, 1, true);
627 assert(!(abs_0
&& abs_1
&& src_0
== src_1
));
629 if (!abs_0
&& !abs_1
) {
630 /* Force k = 0 <===> NOT(src1 < src0) */
631 *flip
= (src_1
< src_0
);
633 } else if (abs_0
&& !abs_1
) {
634 return src_1
>= src_0
;
635 } else if (abs_1
&& !abs_0
) {
637 return src_0
>= src_1
;
639 *flip
= !(src_1
< src_0
);
645 bi_pack_fmadd_min_f16(bi_instruction
*ins
, struct bi_registers
*regs
, bool FMA
)
648 (!FMA
) ? ((ins
->op
.minmax
== BI_MINMAX_MIN
) ?
649 BIFROST_ADD_OP_FMIN16
: BIFROST_ADD_OP_FMAX16
) :
650 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD16
:
651 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN16
:
652 BIFROST_FMA_OP_FMAX16
;
655 bool l
= bi_pack_fp16_abs(ins
, regs
, &flip
);
656 unsigned src_0
= bi_get_src(ins
, regs
, 0, true);
657 unsigned src_1
= bi_get_src(ins
, regs
, 1, true);
660 struct bifrost_fma_add_minmax16 pack
= {
661 .src0
= flip
? src_1
: src_0
,
662 .src1
= flip
? src_0
: src_1
,
663 .src0_neg
= ins
->src_neg
[flip
? 1 : 0],
664 .src1_neg
= ins
->src_neg
[flip
? 0 : 1],
665 .src0_swizzle
= bi_swiz16(ins
, flip
? 1 : 0),
666 .src1_swizzle
= bi_swiz16(ins
, flip
? 0 : 1),
668 .outmod
= ins
->outmod
,
669 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
675 /* Can't have modes for fp16 */
676 assert(ins
->outmod
== 0);
678 struct bifrost_add_fmin16 pack
= {
679 .src0
= flip
? src_1
: src_0
,
680 .src1
= flip
? src_0
: src_1
,
681 .src0_neg
= ins
->src_neg
[flip
? 1 : 0],
682 .src1_neg
= ins
->src_neg
[flip
? 0 : 1],
684 .src0_swizzle
= bi_swiz16(ins
, flip
? 1 : 0),
685 .src1_swizzle
= bi_swiz16(ins
, flip
? 0 : 1),
695 bi_pack_fma_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
697 if (ins
->dest_type
== nir_type_float32
)
698 return bi_pack_fma_addmin_f32(ins
, regs
);
699 else if(ins
->dest_type
== nir_type_float16
)
700 return bi_pack_fmadd_min_f16(ins
, regs
, true);
702 unreachable("Unknown FMA/ADD type");
706 bi_pack_fma_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
708 struct bifrost_fma_inst pack
= {
709 .src0
= bi_get_src(ins
, regs
, 0, true),
717 bi_pack_fma_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
719 struct bifrost_fma_2src pack
= {
720 .src0
= bi_get_src(ins
, regs
, 0, true),
721 .src1
= bi_get_src(ins
, regs
, 1, true),
729 bi_pack_add_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
731 struct bifrost_add_inst pack
= {
732 .src0
= bi_get_src(ins
, regs
, 0, true),
739 static enum bifrost_csel_cond
740 bi_cond_to_csel(enum bi_cond cond
, bool *flip
, bool *invert
, nir_alu_type T
)
742 nir_alu_type B
= nir_alu_type_get_base_type(T
);
743 unsigned idx
= (B
== nir_type_float
) ? 0 :
744 ((B
== nir_type_int
) ? 1 : 2);
750 const enum bifrost_csel_cond ops
[] = {
761 const enum bifrost_csel_cond ops
[] = {
772 const enum bifrost_csel_cond ops
[] = {
775 BIFROST_IEQ_F
/* sign is irrelevant */
781 unreachable("Invalid op for csel");
786 bi_pack_fma_csel(bi_instruction
*ins
, struct bi_registers
*regs
)
788 /* TODO: Use csel3 as well */
789 bool flip
= false, invert
= false;
791 enum bifrost_csel_cond cond
=
792 bi_cond_to_csel(ins
->cond
, &flip
, &invert
, ins
->src_types
[0]);
794 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
796 unsigned cmp_0
= (flip
? 1 : 0);
797 unsigned cmp_1
= (flip
? 0 : 1);
798 unsigned res_0
= (invert
? 3 : 2);
799 unsigned res_1
= (invert
? 2 : 3);
801 struct bifrost_csel4 pack
= {
802 .src0
= bi_get_src(ins
, regs
, cmp_0
, true),
803 .src1
= bi_get_src(ins
, regs
, cmp_1
, true),
804 .src2
= bi_get_src(ins
, regs
, res_0
, true),
805 .src3
= bi_get_src(ins
, regs
, res_1
, true),
807 .op
= (size
== 16) ? BIFROST_FMA_OP_CSEL4_V16
:
815 bi_pack_fma_frexp(bi_instruction
*ins
, struct bi_registers
*regs
)
817 unsigned op
= BIFROST_FMA_OP_FREXPE_LOG
;
818 return bi_pack_fma_1src(ins
, regs
, op
);
822 bi_pack_fma_reduce(bi_instruction
*ins
, struct bi_registers
*regs
)
824 if (ins
->op
.reduce
== BI_REDUCE_ADD_FREXPM
) {
825 return bi_pack_fma_2src(ins
, regs
, BIFROST_FMA_OP_ADD_FREXPM
);
827 unreachable("Invalid reduce op");
831 /* We have a single convert opcode in the IR but a number of opcodes that could
832 * come out. In particular we have native opcodes for:
834 * [ui]16 --> [fui]32 -- int16_to_32
835 * f16 --> f32 -- float16_to_32
836 * f32 --> f16 -- float32_to_16
837 * f32 --> [ui]32 -- float32_to_int
838 * [ui]32 --> f32 -- int_to_float32
839 * [fui]16 --> [fui]16 -- f2i_i2f16
843 bi_pack_convert(bi_instruction
*ins
, struct bi_registers
*regs
, bool FMA
)
845 nir_alu_type from_base
= nir_alu_type_get_base_type(ins
->src_types
[0]);
846 unsigned from_size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
847 bool from_unsigned
= from_base
== nir_type_uint
;
849 nir_alu_type to_base
= nir_alu_type_get_base_type(ins
->dest_type
);
850 unsigned to_size
= nir_alu_type_get_type_size(ins
->dest_type
);
851 bool to_unsigned
= to_base
== nir_type_uint
;
852 bool to_float
= to_base
== nir_type_float
;
855 assert((from_base
!= to_base
) || (from_size
!= to_size
));
856 assert((MAX2(from_size
, to_size
) / MIN2(from_size
, to_size
)) <= 2);
858 /* f32 to f16 is special */
859 if (from_size
== 32 && to_size
== 16 && from_base
== nir_type_float
&& to_base
== from_base
) {
860 /* TODO: second vectorized source? */
861 struct bifrost_fma_2src pfma
= {
862 .src0
= bi_get_src(ins
, regs
, 0, true),
863 .src1
= BIFROST_SRC_STAGE
, /* 0 */
864 .op
= BIFROST_FMA_FLOAT32_TO_16
867 struct bifrost_add_2src padd
= {
868 .src0
= bi_get_src(ins
, regs
, 0, true),
869 .src1
= BIFROST_SRC_STAGE
, /* 0 */
870 .op
= BIFROST_ADD_FLOAT32_TO_16
880 /* Otherwise, figure out the mode */
883 if (from_size
== 16 && to_size
== 32) {
884 unsigned component
= ins
->swizzle
[0][0];
885 assert(component
<= 1);
887 if (from_base
== nir_type_float
)
888 op
= BIFROST_CONVERT_5(component
);
890 op
= BIFROST_CONVERT_4(from_unsigned
, component
, to_float
);
893 unsigned swizzle
= (from_size
== 16) ? bi_swiz16(ins
, 0) : 0;
894 bool is_unsigned
= from_unsigned
;
896 if (from_base
== nir_type_float
) {
897 assert(to_base
!= nir_type_float
);
898 is_unsigned
= to_unsigned
;
900 if (from_size
== 32 && to_size
== 32)
901 mode
= BIFROST_CONV_F32_TO_I32
;
902 else if (from_size
== 16 && to_size
== 16)
903 mode
= BIFROST_CONV_F16_TO_I16
;
905 unreachable("Invalid float conversion");
907 assert(to_base
== nir_type_float
);
908 assert(from_size
== to_size
);
911 mode
= BIFROST_CONV_I32_TO_F32
;
912 else if (to_size
== 16)
913 mode
= BIFROST_CONV_I16_TO_F16
;
915 unreachable("Invalid int conversion");
918 /* Fixup swizzle for 32-bit only modes */
920 if (mode
== BIFROST_CONV_I32_TO_F32
)
922 else if (mode
== BIFROST_CONV_F32_TO_I32
)
925 op
= BIFROST_CONVERT(is_unsigned
, ins
->roundmode
, swizzle
, mode
);
927 /* Unclear what the top bit is for... maybe 16-bit related */
928 bool mode2
= mode
== BIFROST_CONV_F16_TO_I16
;
929 bool mode6
= mode
== BIFROST_CONV_I16_TO_F16
;
931 if (!(mode2
|| mode6
))
936 return bi_pack_fma_1src(ins
, regs
, BIFROST_FMA_CONVERT
| op
);
938 return bi_pack_add_1src(ins
, regs
, BIFROST_ADD_CONVERT
| op
);
942 bi_pack_fma_select(bi_instruction
*ins
, struct bi_registers
*regs
)
944 unsigned size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
947 unsigned swiz
= (ins
->swizzle
[0][0] | (ins
->swizzle
[1][0] << 1));
948 unsigned op
= BIFROST_FMA_SEL_16(swiz
);
949 return bi_pack_fma_2src(ins
, regs
, op
);
950 } else if (size
== 8) {
953 for (unsigned c
= 0; c
< 4; ++c
) {
954 if (ins
->swizzle
[c
][0]) {
955 /* Ensure lowering restriction is met */
956 assert(ins
->swizzle
[c
][0] == 2);
961 struct bifrost_fma_sel8 pack
= {
962 .src0
= bi_get_src(ins
, regs
, 0, true),
963 .src1
= bi_get_src(ins
, regs
, 1, true),
964 .src2
= bi_get_src(ins
, regs
, 2, true),
965 .src3
= bi_get_src(ins
, regs
, 3, true),
967 .op
= BIFROST_FMA_OP_SEL8
972 unreachable("Unimplemented");
976 static enum bifrost_fcmp_cond
977 bi_fcmp_cond(enum bi_cond cond
)
980 case BI_COND_LT
: return BIFROST_OLT
;
981 case BI_COND_LE
: return BIFROST_OLE
;
982 case BI_COND_GE
: return BIFROST_OGE
;
983 case BI_COND_GT
: return BIFROST_OGT
;
984 case BI_COND_EQ
: return BIFROST_OEQ
;
985 case BI_COND_NE
: return BIFROST_UNE
;
986 default: unreachable("Unknown bi_cond");
990 /* a <?> b <==> b <flip(?)> a (TODO: NaN behaviour?) */
992 static enum bifrost_fcmp_cond
993 bi_flip_fcmp(enum bifrost_fcmp_cond cond
)
1008 unreachable("Unknown fcmp cond");
1013 bi_pack_fma_cmp(bi_instruction
*ins
, struct bi_registers
*regs
)
1015 nir_alu_type Tl
= ins
->src_types
[0];
1016 nir_alu_type Tr
= ins
->src_types
[1];
1018 if (Tl
== nir_type_float32
|| Tr
== nir_type_float32
) {
1019 /* TODO: Mixed 32/16 cmp */
1022 enum bifrost_fcmp_cond cond
= bi_fcmp_cond(ins
->cond
);
1024 /* Only src1 has neg, so we arrange:
1027 * -a < -b <===> a > b
1028 * -a < b <===> a > -b
1029 * TODO: Is this NaN-precise?
1032 bool flip
= ins
->src_neg
[0];
1033 bool neg
= ins
->src_neg
[0] ^ ins
->src_neg
[1];
1036 cond
= bi_flip_fcmp(cond
);
1038 struct bifrost_fma_fcmp pack
= {
1039 .src0
= bi_get_src(ins
, regs
, 0, true),
1040 .src1
= bi_get_src(ins
, regs
, 1, true),
1041 .src0_abs
= ins
->src_abs
[0],
1042 .src1_abs
= ins
->src_abs
[1],
1047 .op
= BIFROST_FMA_OP_FCMP_GL
1050 RETURN_PACKED(pack
);
1051 } else if (Tl
== nir_type_float16
&& Tr
== nir_type_float16
) {
1053 bool l
= bi_pack_fp16_abs(ins
, regs
, &flip
);
1054 enum bifrost_fcmp_cond cond
= bi_fcmp_cond(ins
->cond
);
1057 cond
= bi_flip_fcmp(cond
);
1059 struct bifrost_fma_fcmp16 pack
= {
1060 .src0
= bi_get_src(ins
, regs
, flip
? 1 : 0, true),
1061 .src1
= bi_get_src(ins
, regs
, flip
? 0 : 1, true),
1062 .src0_swizzle
= bi_swiz16(ins
, flip
? 1 : 0),
1063 .src1_swizzle
= bi_swiz16(ins
, flip
? 0 : 1),
1067 .op
= BIFROST_FMA_OP_FCMP_GL_16
,
1070 RETURN_PACKED(pack
);
1072 unreachable("Unknown cmp type");
1077 bi_fma_bitwise_op(enum bi_bitwise_op op
, bool rshift
)
1081 /* Via De Morgan's */
1083 BIFROST_FMA_OP_RSHIFT_NAND
:
1084 BIFROST_FMA_OP_LSHIFT_NAND
;
1085 case BI_BITWISE_AND
:
1087 BIFROST_FMA_OP_RSHIFT_AND
:
1088 BIFROST_FMA_OP_LSHIFT_AND
;
1089 case BI_BITWISE_XOR
:
1090 /* Shift direction handled out of band */
1091 return BIFROST_FMA_OP_RSHIFT_XOR
;
1093 unreachable("Unknown op");
1098 bi_pack_fma_bitwise(bi_instruction
*ins
, struct bi_registers
*regs
)
1100 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
1103 bool invert_0
= ins
->bitwise
.src_invert
[0];
1104 bool invert_1
= ins
->bitwise
.src_invert
[1];
1106 if (ins
->op
.bitwise
== BI_BITWISE_OR
) {
1107 /* Becomes NAND, so via De Morgan's:
1108 * f(A) | f(B) = ~(~f(A) & ~f(B))
1109 * = NAND(~f(A), ~f(B))
1112 invert_0
= !invert_0
;
1113 invert_1
= !invert_1
;
1114 } else if (ins
->op
.bitwise
== BI_BITWISE_XOR
) {
1115 /* ~A ^ ~B = ~(A ^ ~B) = ~(~(A ^ B)) = A ^ B
1116 * ~A ^ B = ~(A ^ B) = A ^ ~B
1119 invert_0
^= invert_1
;
1122 /* invert_1 ends up specifying shift direction */
1123 invert_1
= !ins
->bitwise
.rshift
;
1126 struct bifrost_shift_fma pack
= {
1127 .src0
= bi_get_src(ins
, regs
, 0, true),
1128 .src1
= bi_get_src(ins
, regs
, 1, true),
1129 .src2
= bi_get_src(ins
, regs
, 2, true),
1130 .half
= (size
== 32) ? 0 : (size
== 16) ? 0x7 : (size
== 8) ? 0x4 : 0,
1132 .invert_1
= invert_0
,
1133 .invert_2
= invert_1
,
1134 .op
= bi_fma_bitwise_op(ins
->op
.bitwise
, ins
->bitwise
.rshift
)
1137 RETURN_PACKED(pack
);
1141 bi_pack_fma_round(bi_instruction
*ins
, struct bi_registers
*regs
)
1143 bool fp16
= ins
->dest_type
== nir_type_float16
;
1144 assert(fp16
|| ins
->dest_type
== nir_type_float32
);
1147 ? BIFROST_FMA_ROUND_16(ins
->roundmode
, bi_swiz16(ins
, 0))
1148 : BIFROST_FMA_ROUND_32(ins
->roundmode
);
1150 return bi_pack_fma_1src(ins
, regs
, op
);
1154 bi_pack_fma(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
1157 return BIFROST_FMA_NOP
;
1159 switch (bundle
.fma
->type
) {
1161 return bi_pack_fma_addmin(bundle
.fma
, regs
);
1163 return bi_pack_fma_cmp(bundle
.fma
, regs
);
1165 return bi_pack_fma_bitwise(bundle
.fma
, regs
);
1167 return bi_pack_convert(bundle
.fma
, regs
, true);
1169 return bi_pack_fma_csel(bundle
.fma
, regs
);
1171 return bi_pack_fma_fma(bundle
.fma
, regs
);
1173 return bi_pack_fma_frexp(bundle
.fma
, regs
);
1175 unreachable("Packing todo");
1177 return bi_pack_fma_addmin(bundle
.fma
, regs
);
1179 return bi_pack_fma_1src(bundle
.fma
, regs
, BIFROST_FMA_OP_MOV
);
1181 unreachable("Packing todo");
1183 return bi_pack_fma_select(bundle
.fma
, regs
);
1185 return bi_pack_fma_round(bundle
.fma
, regs
);
1187 return bi_pack_fma_reduce(bundle
.fma
, regs
);
1189 unreachable("Cannot encode class as FMA");
1194 bi_pack_add_ld_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1196 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
1197 assert(size
== 32 || size
== 16);
1199 unsigned op
= (size
== 32) ?
1200 BIFROST_ADD_OP_LD_VAR_32
:
1201 BIFROST_ADD_OP_LD_VAR_16
;
1203 unsigned packed_addr
= 0;
1205 if (ins
->src
[0] & BIR_INDEX_CONSTANT
) {
1206 /* Direct uses address field directly */
1207 packed_addr
= bi_get_immediate(ins
, 0);
1209 /* Indirect gets an extra source */
1210 packed_addr
= bi_get_src(ins
, regs
, 0, false) | 0b11000;
1213 /* The destination is thrown in the data register */
1214 assert(ins
->dest
& BIR_INDEX_REGISTER
);
1215 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
1217 unsigned channels
= ins
->vector_channels
;
1218 assert(channels
>= 1 && channels
<= 4);
1220 struct bifrost_ld_var pack
= {
1221 .src0
= bi_get_src(ins
, regs
, 1, false),
1222 .addr
= packed_addr
,
1223 .channels
= MALI_POSITIVE(channels
),
1224 .interp_mode
= ins
->load_vary
.interp_mode
,
1225 .reuse
= ins
->load_vary
.reuse
,
1226 .flat
= ins
->load_vary
.flat
,
1230 RETURN_PACKED(pack
);
1234 bi_pack_add_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
1236 struct bifrost_add_2src pack
= {
1237 .src0
= bi_get_src(ins
, regs
, 0, true),
1238 .src1
= bi_get_src(ins
, regs
, 1, true),
1242 RETURN_PACKED(pack
);
1246 bi_pack_add_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
1249 (ins
->type
== BI_ADD
) ? BIFROST_ADD_OP_FADD32
:
1250 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_ADD_OP_FMIN32
:
1251 BIFROST_ADD_OP_FMAX32
;
1253 struct bifrost_add_faddmin pack
= {
1254 .src0
= bi_get_src(ins
, regs
, 0, true),
1255 .src1
= bi_get_src(ins
, regs
, 1, true),
1256 .src0_abs
= ins
->src_abs
[0],
1257 .src1_abs
= ins
->src_abs
[1],
1258 .src0_neg
= ins
->src_neg
[0],
1259 .src1_neg
= ins
->src_neg
[1],
1260 .outmod
= ins
->outmod
,
1261 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
1265 RETURN_PACKED(pack
);
1269 bi_pack_add_add_f16(bi_instruction
*ins
, struct bi_registers
*regs
)
1271 /* ADD.v2f16 can't have outmod */
1272 assert(ins
->outmod
== BIFROST_NONE
);
1274 struct bifrost_add_faddmin pack
= {
1275 .src0
= bi_get_src(ins
, regs
, 0, true),
1276 .src1
= bi_get_src(ins
, regs
, 1, true),
1277 .src0_abs
= ins
->src_abs
[0],
1278 .src1_abs
= ins
->src_abs
[1],
1279 .src0_neg
= ins
->src_neg
[0],
1280 .src1_neg
= ins
->src_neg
[1],
1281 .select
= bi_swiz16(ins
, 0), /* swizzle_0 */
1282 .outmod
= bi_swiz16(ins
, 1), /* swizzle_1 */
1283 .mode
= ins
->roundmode
,
1284 .op
= BIFROST_ADD_OP_FADD16
1287 RETURN_PACKED(pack
);
1291 bi_pack_add_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
1293 if (ins
->dest_type
== nir_type_float32
)
1294 return bi_pack_add_addmin_f32(ins
, regs
);
1295 else if (ins
->dest_type
== nir_type_float16
) {
1296 if (ins
->type
== BI_ADD
)
1297 return bi_pack_add_add_f16(ins
, regs
);
1299 return bi_pack_fmadd_min_f16(ins
, regs
, false);
1301 unreachable("Unknown FMA/ADD type");
1305 bi_pack_add_ld_ubo(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1307 assert(ins
->vector_channels
>= 1 && ins
->vector_channels
<= 4);
1309 const unsigned ops
[4] = {
1310 BIFROST_ADD_OP_LD_UBO_1
,
1311 BIFROST_ADD_OP_LD_UBO_2
,
1312 BIFROST_ADD_OP_LD_UBO_3
,
1313 BIFROST_ADD_OP_LD_UBO_4
1316 bi_write_data_register(clause
, ins
);
1317 return bi_pack_add_2src(ins
, regs
, ops
[ins
->vector_channels
- 1]);
1320 static enum bifrost_ldst_type
1321 bi_pack_ldst_type(nir_alu_type T
)
1324 case nir_type_float16
: return BIFROST_LDST_F16
;
1325 case nir_type_float32
: return BIFROST_LDST_F32
;
1326 case nir_type_int32
: return BIFROST_LDST_I32
;
1327 case nir_type_uint32
: return BIFROST_LDST_U32
;
1328 default: unreachable("Invalid type loaded");
1333 bi_pack_add_ld_var_addr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1335 struct bifrost_ld_var_addr pack
= {
1336 .src0
= bi_get_src(ins
, regs
, 1, false),
1337 .src1
= bi_get_src(ins
, regs
, 2, false),
1338 .location
= bi_get_immediate(ins
, 0),
1339 .type
= bi_pack_ldst_type(ins
->src_types
[3]),
1340 .op
= BIFROST_ADD_OP_LD_VAR_ADDR
1343 bi_write_data_register(clause
, ins
);
1344 RETURN_PACKED(pack
);
1348 bi_pack_add_ld_attr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1350 assert(ins
->vector_channels
>= 0 && ins
->vector_channels
<= 4);
1352 struct bifrost_ld_attr pack
= {
1353 .src0
= bi_get_src(ins
, regs
, 1, false),
1354 .src1
= bi_get_src(ins
, regs
, 2, false),
1355 .location
= bi_get_immediate(ins
, 0),
1356 .channels
= MALI_POSITIVE(ins
->vector_channels
),
1357 .type
= bi_pack_ldst_type(ins
->dest_type
),
1358 .op
= BIFROST_ADD_OP_LD_ATTR
1361 bi_write_data_register(clause
, ins
);
1362 RETURN_PACKED(pack
);
1366 bi_pack_add_st_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1368 assert(ins
->vector_channels
>= 1 && ins
->vector_channels
<= 4);
1370 struct bifrost_st_vary pack
= {
1371 .src0
= bi_get_src(ins
, regs
, 1, false),
1372 .src1
= bi_get_src(ins
, regs
, 2, false),
1373 .src2
= bi_get_src(ins
, regs
, 3, false),
1374 .channels
= MALI_POSITIVE(ins
->vector_channels
),
1375 .op
= BIFROST_ADD_OP_ST_VAR
1378 bi_read_data_register(clause
, ins
);
1379 RETURN_PACKED(pack
);
1383 bi_pack_add_atest(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1385 bool fp16
= (ins
->src_types
[1] == nir_type_float16
);
1387 struct bifrost_add_atest pack
= {
1388 .src0
= bi_get_src(ins
, regs
, 0, false),
1389 .src1
= bi_get_src(ins
, regs
, 1, false),
1391 .component
= fp16
? ins
->swizzle
[1][0] : 1, /* Set for fp32 */
1392 .op
= BIFROST_ADD_OP_ATEST
,
1395 /* Despite *also* writing with the usual mechanism... quirky and
1396 * perhaps unnecessary, but let's match the blob */
1397 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
1399 RETURN_PACKED(pack
);
1403 bi_pack_add_blend(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1405 struct bifrost_add_inst pack
= {
1406 .src0
= bi_get_src(ins
, regs
, 1, false),
1407 .op
= BIFROST_ADD_OP_BLEND
1410 /* TODO: Pack location in uniform_const */
1411 assert(ins
->blend_location
== 0);
1413 bi_read_data_register(clause
, ins
);
1414 RETURN_PACKED(pack
);
1418 bi_pack_add_special(bi_instruction
*ins
, struct bi_registers
*regs
)
1421 bool fp16
= ins
->dest_type
== nir_type_float16
;
1422 bool Y
= ins
->swizzle
[0][0];
1424 if (ins
->op
.special
== BI_SPECIAL_FRCP
) {
1426 (Y
? BIFROST_ADD_OP_FRCP_FAST_F16_Y
:
1427 BIFROST_ADD_OP_FRCP_FAST_F16_X
) :
1428 BIFROST_ADD_OP_FRCP_FAST_F32
;
1429 } else if (ins
->op
.special
== BI_SPECIAL_FRSQ
) {
1431 (Y
? BIFROST_ADD_OP_FRSQ_FAST_F16_Y
:
1432 BIFROST_ADD_OP_FRSQ_FAST_F16_X
) :
1433 BIFROST_ADD_OP_FRSQ_FAST_F32
;
1435 } else if (ins
->op
.special
== BI_SPECIAL_EXP2_LOW
) {
1437 op
= BIFROST_ADD_OP_FEXP2_FAST
;
1439 unreachable("Unknown special op");
1442 return bi_pack_add_1src(ins
, regs
, op
);
1446 bi_pack_add_table(bi_instruction
*ins
, struct bi_registers
*regs
)
1449 assert(ins
->dest_type
== nir_type_float32
);
1451 op
= BIFROST_ADD_OP_LOG2_HELP
;
1452 return bi_pack_add_1src(ins
, regs
, op
);
1455 bi_pack_add_tex_compact(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1457 bool f16
= ins
->dest_type
== nir_type_float16
;
1459 struct bifrost_tex_compact pack
= {
1460 .src0
= bi_get_src(ins
, regs
, 0, false),
1461 .src1
= bi_get_src(ins
, regs
, 1, false),
1462 .op
= f16
? BIFROST_ADD_OP_TEX_COMPACT_F16
:
1463 BIFROST_ADD_OP_TEX_COMPACT_F32
,
1465 .tex_index
= ins
->texture
.texture_index
,
1466 .sampler_index
= ins
->texture
.sampler_index
1469 bi_write_data_register(clause
, ins
);
1470 RETURN_PACKED(pack
);
1474 bi_pack_add_select(bi_instruction
*ins
, struct bi_registers
*regs
)
1476 unsigned size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
1479 unsigned swiz
= (ins
->swizzle
[0][0] | (ins
->swizzle
[1][0] << 1));
1480 unsigned op
= BIFROST_ADD_SEL_16(swiz
);
1481 return bi_pack_add_2src(ins
, regs
, op
);
1485 bi_pack_add(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
1488 return BIFROST_ADD_NOP
;
1490 switch (bundle
.add
->type
) {
1492 return bi_pack_add_addmin(bundle
.add
, regs
);
1494 return bi_pack_add_atest(clause
, bundle
.add
, regs
);
1497 unreachable("Packing todo");
1499 return bi_pack_add_blend(clause
, bundle
.add
, regs
);
1501 unreachable("Packing todo");
1503 return bi_pack_convert(bundle
.add
, regs
, false);
1508 unreachable("Packing todo");
1510 return bi_pack_add_ld_attr(clause
, bundle
.add
, regs
);
1511 case BI_LOAD_UNIFORM
:
1512 return bi_pack_add_ld_ubo(clause
, bundle
.add
, regs
);
1514 return bi_pack_add_ld_vary(clause
, bundle
.add
, regs
);
1515 case BI_LOAD_VAR_ADDRESS
:
1516 return bi_pack_add_ld_var_addr(clause
, bundle
.add
, regs
);
1518 return bi_pack_add_addmin(bundle
.add
, regs
);
1522 unreachable("Packing todo");
1524 return bi_pack_add_st_vary(clause
, bundle
.add
, regs
);
1526 return bi_pack_add_special(bundle
.add
, regs
);
1528 return bi_pack_add_table(bundle
.add
, regs
);
1530 return bi_pack_add_select(bundle
.add
, regs
);
1532 if (bundle
.add
->op
.texture
== BI_TEX_COMPACT
)
1533 return bi_pack_add_tex_compact(clause
, bundle
.add
, regs
);
1535 unreachable("Unknown tex type");
1537 unreachable("Packing todo");
1539 unreachable("Cannot encode class as ADD");
1543 struct bi_packed_bundle
{
1548 static struct bi_packed_bundle
1549 bi_pack_bundle(bi_clause
*clause
, bi_bundle bundle
, bi_bundle prev
, bool first_bundle
)
1551 struct bi_registers regs
= bi_assign_ports(bundle
, prev
);
1552 bi_assign_uniform_constant(clause
, ®s
, bundle
);
1553 regs
.first_instruction
= first_bundle
;
1555 uint64_t reg
= bi_pack_registers(regs
);
1556 uint64_t fma
= bi_pack_fma(clause
, bundle
, ®s
);
1557 uint64_t add
= bi_pack_add(clause
, bundle
, ®s
);
1559 struct bi_packed_bundle packed
= {
1560 .lo
= reg
| (fma
<< 35) | ((add
& 0b111111) << 58),
1567 /* Packs the next two constants as a dedicated constant quadword at the end of
1568 * the clause, returning the number packed. */
1571 bi_pack_constants(bi_context
*ctx
, bi_clause
*clause
,
1573 struct util_dynarray
*emission
)
1575 /* After these two, are we done? Determines tag */
1576 bool done
= clause
->constant_count
<= (index
+ 2);
1577 bool only
= clause
->constant_count
<= (index
+ 1);
1580 assert(index
== 0 && clause
->bundle_count
== 1);
1583 uint64_t hi
= clause
->constants
[index
+ 0] >> 60ull;
1585 struct bifrost_fmt_constant quad
= {
1586 .pos
= 0, /* TODO */
1587 .tag
= done
? BIFROST_FMTC_FINAL
: BIFROST_FMTC_CONSTANTS
,
1588 .imm_1
= clause
->constants
[index
+ 0] >> 4,
1589 .imm_2
= ((hi
< 8) ? (hi
<< 60ull) : 0) >> 4,
1592 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1593 * of the second constant with the first must be less than 8, otherwise
1594 * we have to swap them. On G52, I'm able to reproduce a similar issue
1595 * but with a different workaround (modeled above with a single
1596 * constant, unclear how to workaround for multiple constants.) Further
1597 * investigation needed. Possibly an errata. XXX */
1599 util_dynarray_append(emission
, struct bifrost_fmt_constant
, quad
);
1605 bi_pack_clause(bi_context
*ctx
, bi_clause
*clause
, bi_clause
*next
,
1606 struct util_dynarray
*emission
)
1608 struct bi_packed_bundle ins_1
= bi_pack_bundle(clause
, clause
->bundles
[0], clause
->bundles
[0], true);
1609 assert(clause
->bundle_count
== 1);
1611 /* Used to decide if we elide writes */
1612 bool is_fragment
= ctx
->stage
== MESA_SHADER_FRAGMENT
;
1614 /* State for packing constants throughout */
1615 unsigned constant_index
= 0;
1617 struct bifrost_fmt1 quad_1
= {
1618 .tag
= clause
->constant_count
? BIFROST_FMT1_CONSTANTS
: BIFROST_FMT1_FINAL
,
1619 .header
= bi_pack_header(clause
, next
, is_fragment
),
1621 .ins_2
= ins_1
.hi
& ((1 << 11) - 1),
1622 .ins_0
= (ins_1
.hi
>> 11) & 0b111,
1625 util_dynarray_append(emission
, struct bifrost_fmt1
, quad_1
);
1627 /* Pack the remaining constants */
1629 while (constant_index
< clause
->constant_count
) {
1630 constant_index
+= bi_pack_constants(ctx
, clause
,
1631 constant_index
, emission
);
1636 bi_next_clause(bi_context
*ctx
, pan_block
*block
, bi_clause
*clause
)
1638 /* Try the next clause in this block */
1639 if (clause
->link
.next
!= &((bi_block
*) block
)->clauses
)
1640 return list_first_entry(&(clause
->link
), bi_clause
, link
);
1642 /* Try the next block, or the one after that if it's empty, etc .*/
1643 pan_block
*next_block
= pan_next_block(block
);
1645 bi_foreach_block_from(ctx
, next_block
, block
) {
1646 bi_block
*blk
= (bi_block
*) block
;
1648 if (!list_is_empty(&blk
->clauses
))
1649 return list_first_entry(&(blk
->clauses
), bi_clause
, link
);
1656 bi_pack(bi_context
*ctx
, struct util_dynarray
*emission
)
1658 util_dynarray_init(emission
, NULL
);
1660 bi_foreach_block(ctx
, _block
) {
1661 bi_block
*block
= (bi_block
*) _block
;
1663 bi_foreach_clause_in_block(block
, clause
) {
1664 bi_clause
*next
= bi_next_clause(ctx
, _block
, clause
);
1665 bi_pack_clause(ctx
, clause
, next
, emission
);