pan/bi: Import algebraic pass from midgard
[mesa.git] / src / panfrost / bifrost / bifrost_compile.c
1 /*
2 * Copyright (C) 2020 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27 #include "main/mtypes.h"
28 #include "compiler/glsl/glsl_to_nir.h"
29 #include "compiler/nir_types.h"
30 #include "main/imports.h"
31 #include "compiler/nir/nir_builder.h"
32
33 #include "disassemble.h"
34 #include "bifrost_compile.h"
35 #include "bifrost_nir.h"
36 #include "compiler.h"
37 #include "bi_quirks.h"
38 #include "bi_print.h"
39
40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
41 static bi_instruction *bi_emit_branch(bi_context *ctx);
42 static void bi_block_add_successor(bi_block *block, bi_block *successor);
43 static void bi_schedule_barrier(bi_context *ctx);
44
45 static void
46 emit_jump(bi_context *ctx, nir_jump_instr *instr)
47 {
48 bi_instruction *branch = bi_emit_branch(ctx);
49
50 switch (instr->type) {
51 case nir_jump_break:
52 branch->branch.target = ctx->break_block;
53 break;
54 case nir_jump_continue:
55 branch->branch.target = ctx->continue_block;
56 break;
57 default:
58 unreachable("Unhandled jump type");
59 }
60
61 bi_block_add_successor(ctx->current_block, branch->branch.target);
62 }
63
64 /* Gets a bytemask for a complete vecN write */
65 static unsigned
66 bi_mask_for_channels_32(unsigned i)
67 {
68 return (1 << (4 * i)) - 1;
69 }
70
71 static bi_instruction
72 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
73 {
74 bi_instruction load = {
75 .type = T,
76 .writemask = bi_mask_for_channels_32(instr->num_components),
77 .src = { BIR_INDEX_CONSTANT },
78 .constant = { .u64 = nir_intrinsic_base(instr) },
79 };
80
81 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
82
83 if (info->has_dest)
84 load.dest = bir_dest_index(&instr->dest);
85
86 if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
87 load.dest_type = nir_intrinsic_type(instr);
88
89 nir_src *offset = nir_get_io_offset_src(instr);
90
91 if (nir_src_is_const(*offset))
92 load.constant.u64 += nir_src_as_uint(*offset);
93 else
94 load.src[0] = bir_src_index(offset);
95
96 return load;
97 }
98
99 static void
100 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
101 {
102 bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
103 ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
104 ins.load_vary.reuse = false; /* TODO */
105 ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
106 ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
107 bi_emit(ctx, ins);
108 }
109
110 static void
111 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
112 {
113 if (!ctx->emitted_atest) {
114 bi_instruction ins = {
115 .type = BI_ATEST
116 };
117
118 bi_emit(ctx, ins);
119 bi_schedule_barrier(ctx);
120 ctx->emitted_atest = true;
121 }
122
123 bi_instruction blend = {
124 .type = BI_BLEND,
125 .blend_location = nir_intrinsic_base(instr),
126 .src = {
127 bir_src_index(&instr->src[0])
128 },
129 .swizzle = {
130 { 0, 1, 2, 3 }
131 }
132 };
133
134 bi_emit(ctx, blend);
135 bi_schedule_barrier(ctx);
136 }
137
138 static void
139 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
140 {
141 bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
142 address.dest = bi_make_temp(ctx);
143 address.dest_type = nir_type_uint64;
144 address.writemask = (1 << 8) - 1;
145
146 bi_instruction st = {
147 .type = BI_STORE_VAR,
148 .src = {
149 address.dest,
150 bir_src_index(&instr->src[0])
151 },
152 .swizzle = {
153 { 0, 1, 2, 3 }
154 }
155 };
156
157 bi_emit(ctx, address);
158 bi_emit(ctx, st);
159 }
160
161 static void
162 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
163 {
164 bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
165 ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
166 bi_emit(ctx, ld);
167 }
168
169 static void
170 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
171 {
172
173 switch (instr->intrinsic) {
174 case nir_intrinsic_load_barycentric_pixel:
175 /* stub */
176 break;
177 case nir_intrinsic_load_interpolated_input:
178 case nir_intrinsic_load_input:
179 if (ctx->stage == MESA_SHADER_FRAGMENT)
180 bi_emit_ld_vary(ctx, instr);
181 else if (ctx->stage == MESA_SHADER_VERTEX)
182 bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
183 else {
184 unreachable("Unsupported shader stage");
185 }
186 break;
187
188 case nir_intrinsic_store_output:
189 if (ctx->stage == MESA_SHADER_FRAGMENT)
190 bi_emit_frag_out(ctx, instr);
191 else if (ctx->stage == MESA_SHADER_VERTEX)
192 bi_emit_st_vary(ctx, instr);
193 else
194 unreachable("Unsupported shader stage");
195 break;
196
197 case nir_intrinsic_load_uniform:
198 bi_emit_ld_uniform(ctx, instr);
199 break;
200
201 default:
202 /* todo */
203 break;
204 }
205 }
206
207 static void
208 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
209 {
210 /* Make sure we've been lowered */
211 assert(instr->def.num_components == 1);
212
213 bi_instruction move = {
214 .type = BI_MOV,
215 .dest = bir_ssa_index(&instr->def),
216 .dest_type = instr->def.bit_size | nir_type_uint,
217 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
218 .src = {
219 BIR_INDEX_CONSTANT
220 },
221 .constant = {
222 .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
223 }
224 };
225
226 bi_emit(ctx, move);
227 }
228
229 static enum bi_class
230 bi_class_for_nir_alu(nir_op op)
231 {
232 switch (op) {
233 case nir_op_iadd:
234 case nir_op_fadd:
235 case nir_op_fsub:
236 return BI_ADD;
237 case nir_op_isub:
238 return BI_ISUB;
239
240 case nir_op_i2i8:
241 case nir_op_i2i16:
242 case nir_op_i2i32:
243 case nir_op_i2i64:
244 case nir_op_u2u8:
245 case nir_op_u2u16:
246 case nir_op_u2u32:
247 case nir_op_u2u64:
248 case nir_op_f2i16:
249 case nir_op_f2i32:
250 case nir_op_f2i64:
251 case nir_op_f2u16:
252 case nir_op_f2u32:
253 case nir_op_f2u64:
254 case nir_op_i2f16:
255 case nir_op_i2f32:
256 case nir_op_i2f64:
257 case nir_op_u2f16:
258 case nir_op_u2f32:
259 case nir_op_u2f64:
260 return BI_CONVERT;
261
262 case nir_op_fmul:
263 return BI_FMA;
264
265 case nir_op_imin:
266 case nir_op_imax:
267 case nir_op_umin:
268 case nir_op_umax:
269 case nir_op_fmin:
270 case nir_op_fmax:
271 return BI_MINMAX;
272
273 case nir_op_fsat:
274 case nir_op_fneg:
275 case nir_op_fabs:
276 case nir_op_mov:
277 return BI_MOV;
278
279 case nir_op_frcp:
280 case nir_op_frsq:
281 case nir_op_fsin:
282 case nir_op_fcos:
283 return BI_SPECIAL;
284
285 default:
286 unreachable("Unknown ALU op");
287 }
288 }
289
290 static void
291 emit_alu(bi_context *ctx, nir_alu_instr *instr)
292 {
293 /* Assume it's something we can handle normally */
294 bi_instruction alu = {
295 .type = bi_class_for_nir_alu(instr->op),
296 .dest = bir_dest_index(&instr->dest.dest),
297 .dest_type = nir_op_infos[instr->op].output_type
298 | nir_dest_bit_size(instr->dest.dest),
299 };
300
301 /* TODO: Implement lowering of special functions for older Bifrost */
302 assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
303
304 if (instr->dest.dest.is_ssa) {
305 /* Construct a writemask */
306 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
307 unsigned comps = instr->dest.dest.ssa.num_components;
308 assert(comps == 1);
309 unsigned bits = bits_per_comp * comps;
310 unsigned bytes = MAX2(bits / 8, 1);
311 alu.writemask = (1 << bytes) - 1;
312 } else {
313 unsigned comp_mask = instr->dest.write_mask;
314
315 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
316 comp_mask);
317 }
318
319 /* We inline constants as we go. This tracks how many constants have
320 * been inlined, since we're limited to 64-bits of constants per
321 * instruction */
322
323 unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
324 unsigned constants_left = (64 / dest_bits);
325 unsigned constant_shift = 0;
326
327 /* Copy sources */
328
329 unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
330 assert(num_inputs <= ARRAY_SIZE(alu.src));
331
332 for (unsigned i = 0; i < num_inputs; ++i) {
333 unsigned bits = nir_src_bit_size(instr->src[i].src);
334 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
335 | bits;
336
337 /* Try to inline a constant */
338 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
339 alu.constant.u64 |=
340 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
341
342 alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
343 --constants_left;
344 constant_shift += dest_bits;
345 continue;
346 }
347
348 alu.src[i] = bir_src_index(&instr->src[i].src);
349
350 /* We assert scalarization above */
351 alu.swizzle[i][0] = instr->src[i].swizzle[0];
352 }
353
354 /* Op-specific fixup */
355 switch (instr->op) {
356 case nir_op_fmul:
357 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
358 break;
359 case nir_op_fsat:
360 alu.outmod = BIFROST_SAT; /* MOV */
361 break;
362 case nir_op_fneg:
363 alu.src_neg[0] = true; /* MOV */
364 break;
365 case nir_op_fabs:
366 alu.src_abs[0] = true; /* MOV */
367 break;
368 case nir_op_fsub:
369 alu.src_neg[1] = true; /* ADD */
370 break;
371 case nir_op_fmax:
372 case nir_op_imax:
373 case nir_op_umax:
374 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
375 break;
376 case nir_op_frcp:
377 alu.op.special = BI_SPECIAL_FRCP;
378 break;
379 case nir_op_frsq:
380 alu.op.special = BI_SPECIAL_FRSQ;
381 break;
382 case nir_op_fsin:
383 alu.op.special = BI_SPECIAL_FSIN;
384 break;
385 case nir_op_fcos:
386 alu.op.special = BI_SPECIAL_FCOS;
387 break;
388 default:
389 break;
390 }
391
392 bi_emit(ctx, alu);
393 }
394
395 static void
396 emit_instr(bi_context *ctx, struct nir_instr *instr)
397 {
398 switch (instr->type) {
399 case nir_instr_type_load_const:
400 emit_load_const(ctx, nir_instr_as_load_const(instr));
401 break;
402
403 case nir_instr_type_intrinsic:
404 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
405 break;
406
407 case nir_instr_type_alu:
408 emit_alu(ctx, nir_instr_as_alu(instr));
409 break;
410
411 #if 0
412 case nir_instr_type_tex:
413 emit_tex(ctx, nir_instr_as_tex(instr));
414 break;
415 #endif
416
417 case nir_instr_type_jump:
418 emit_jump(ctx, nir_instr_as_jump(instr));
419 break;
420
421 case nir_instr_type_ssa_undef:
422 /* Spurious */
423 break;
424
425 default:
426 //unreachable("Unhandled instruction type");
427 break;
428 }
429 }
430
431
432
433 static bi_block *
434 create_empty_block(bi_context *ctx)
435 {
436 bi_block *blk = rzalloc(ctx, bi_block);
437
438 blk->predecessors = _mesa_set_create(blk,
439 _mesa_hash_pointer,
440 _mesa_key_pointer_equal);
441
442 blk->name = ctx->block_name_count++;
443
444 return blk;
445 }
446
447 static void
448 bi_block_add_successor(bi_block *block, bi_block *successor)
449 {
450 assert(block);
451 assert(successor);
452
453 for (unsigned i = 0; i < ARRAY_SIZE(block->successors); ++i) {
454 if (block->successors[i]) {
455 if (block->successors[i] == successor)
456 return;
457 else
458 continue;
459 }
460
461 block->successors[i] = successor;
462 _mesa_set_add(successor->predecessors, block);
463 return;
464 }
465
466 unreachable("Too many successors");
467 }
468
469 static void
470 bi_schedule_barrier(bi_context *ctx)
471 {
472 bi_block *temp = ctx->after_block;
473 ctx->after_block = create_empty_block(ctx);
474 list_addtail(&ctx->after_block->link, &ctx->blocks);
475 list_inithead(&ctx->after_block->instructions);
476 bi_block_add_successor(ctx->current_block, ctx->after_block);
477 ctx->current_block = ctx->after_block;
478 ctx->after_block = temp;
479 }
480
481 static bi_block *
482 emit_block(bi_context *ctx, nir_block *block)
483 {
484 if (ctx->after_block) {
485 ctx->current_block = ctx->after_block;
486 ctx->after_block = NULL;
487 } else {
488 ctx->current_block = create_empty_block(ctx);
489 }
490
491 list_addtail(&ctx->current_block->link, &ctx->blocks);
492 list_inithead(&ctx->current_block->instructions);
493
494 nir_foreach_instr(instr, block) {
495 emit_instr(ctx, instr);
496 ++ctx->instruction_count;
497 }
498
499 return ctx->current_block;
500 }
501
502 /* Emits an unconditional branch to the end of the current block, returning a
503 * pointer so the user can fill in details */
504
505 static bi_instruction *
506 bi_emit_branch(bi_context *ctx)
507 {
508 bi_instruction branch = {
509 .type = BI_BRANCH,
510 .branch = {
511 .cond = BI_COND_ALWAYS
512 }
513 };
514
515 return bi_emit(ctx, branch);
516 }
517
518 /* Sets a condition for a branch by examing the NIR condition. If we're
519 * familiar with the condition, we unwrap it to fold it into the branch
520 * instruction. Otherwise, we consume the condition directly. We
521 * generally use 1-bit booleans which allows us to use small types for
522 * the conditions.
523 */
524
525 static void
526 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
527 {
528 /* TODO: Try to unwrap instead of always bailing */
529 branch->src[0] = bir_src_index(cond);
530 branch->src[1] = BIR_INDEX_ZERO;
531 branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
532 branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
533 }
534
535 static void
536 emit_if(bi_context *ctx, nir_if *nif)
537 {
538 bi_block *before_block = ctx->current_block;
539
540 /* Speculatively emit the branch, but we can't fill it in until later */
541 bi_instruction *then_branch = bi_emit_branch(ctx);
542 bi_set_branch_cond(then_branch, &nif->condition, true);
543
544 /* Emit the two subblocks. */
545 bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
546 bi_block *end_then_block = ctx->current_block;
547
548 /* Emit a jump from the end of the then block to the end of the else */
549 bi_instruction *then_exit = bi_emit_branch(ctx);
550
551 /* Emit second block, and check if it's empty */
552
553 int count_in = ctx->instruction_count;
554 bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
555 bi_block *end_else_block = ctx->current_block;
556 ctx->after_block = create_empty_block(ctx);
557
558 /* Now that we have the subblocks emitted, fix up the branches */
559
560 assert(then_block);
561 assert(else_block);
562
563 if (ctx->instruction_count == count_in) {
564 /* The else block is empty, so don't emit an exit jump */
565 bi_remove_instruction(then_exit);
566 then_branch->branch.target = ctx->after_block;
567 } else {
568 then_branch->branch.target = else_block;
569 then_exit->branch.target = ctx->after_block;
570 bi_block_add_successor(end_then_block, then_exit->branch.target);
571 }
572
573 /* Wire up the successors */
574
575 bi_block_add_successor(before_block, then_branch->branch.target); /* then_branch */
576
577 bi_block_add_successor(before_block, then_block); /* fallthrough */
578 bi_block_add_successor(end_else_block, ctx->after_block); /* fallthrough */
579 }
580
581 static void
582 emit_loop(bi_context *ctx, nir_loop *nloop)
583 {
584 /* Remember where we are */
585 bi_block *start_block = ctx->current_block;
586
587 bi_block *saved_break = ctx->break_block;
588 bi_block *saved_continue = ctx->continue_block;
589
590 ctx->continue_block = create_empty_block(ctx);
591 ctx->break_block = create_empty_block(ctx);
592 ctx->after_block = ctx->continue_block;
593
594 /* Emit the body itself */
595 emit_cf_list(ctx, &nloop->body);
596
597 /* Branch back to loop back */
598 bi_instruction *br_back = bi_emit_branch(ctx);
599 br_back->branch.target = ctx->continue_block;
600 bi_block_add_successor(start_block, ctx->continue_block);
601 bi_block_add_successor(ctx->current_block, ctx->continue_block);
602
603 ctx->after_block = ctx->break_block;
604
605 /* Pop off */
606 ctx->break_block = saved_break;
607 ctx->continue_block = saved_continue;
608 ++ctx->loop_count;
609 }
610
611 static bi_block *
612 emit_cf_list(bi_context *ctx, struct exec_list *list)
613 {
614 bi_block *start_block = NULL;
615
616 foreach_list_typed(nir_cf_node, node, node, list) {
617 switch (node->type) {
618 case nir_cf_node_block: {
619 bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
620
621 if (!start_block)
622 start_block = block;
623
624 break;
625 }
626
627 case nir_cf_node_if:
628 emit_if(ctx, nir_cf_node_as_if(node));
629 break;
630
631 case nir_cf_node_loop:
632 emit_loop(ctx, nir_cf_node_as_loop(node));
633 break;
634
635 default:
636 unreachable("Unknown control flow");
637 }
638 }
639
640 return start_block;
641 }
642
643 static int
644 glsl_type_size(const struct glsl_type *type, bool bindless)
645 {
646 return glsl_count_attribute_slots(type, false);
647 }
648
649 static void
650 bi_optimize_nir(nir_shader *nir)
651 {
652 bool progress;
653 unsigned lower_flrp = 16 | 32 | 64;
654
655 NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
656 NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
657
658 nir_lower_tex_options lower_tex_options = {
659 .lower_txs_lod = true,
660 .lower_txp = ~0,
661 .lower_tex_without_implicit_lod = true,
662 .lower_txd = true,
663 };
664
665 NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
666 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
667 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
668
669 do {
670 progress = false;
671
672 NIR_PASS(progress, nir, nir_lower_var_copies);
673 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
674
675 NIR_PASS(progress, nir, nir_copy_prop);
676 NIR_PASS(progress, nir, nir_opt_remove_phis);
677 NIR_PASS(progress, nir, nir_opt_dce);
678 NIR_PASS(progress, nir, nir_opt_dead_cf);
679 NIR_PASS(progress, nir, nir_opt_cse);
680 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
681 NIR_PASS(progress, nir, nir_opt_algebraic);
682 NIR_PASS(progress, nir, nir_opt_constant_folding);
683
684 if (lower_flrp != 0) {
685 bool lower_flrp_progress = false;
686 NIR_PASS(lower_flrp_progress,
687 nir,
688 nir_lower_flrp,
689 lower_flrp,
690 false /* always_precise */,
691 nir->options->lower_ffma);
692 if (lower_flrp_progress) {
693 NIR_PASS(progress, nir,
694 nir_opt_constant_folding);
695 progress = true;
696 }
697
698 /* Nothing should rematerialize any flrps, so we only
699 * need to do this lowering once.
700 */
701 lower_flrp = 0;
702 }
703
704 NIR_PASS(progress, nir, nir_opt_undef);
705 NIR_PASS(progress, nir, nir_opt_loop_unroll,
706 nir_var_shader_in |
707 nir_var_shader_out |
708 nir_var_function_temp);
709 } while (progress);
710
711 NIR_PASS(progress, nir, nir_opt_algebraic_late);
712 NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
713 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
714 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
715
716 /* Take us out of SSA */
717 NIR_PASS(progress, nir, nir_lower_locals_to_regs);
718 NIR_PASS(progress, nir, nir_convert_from_ssa, true);
719
720 /* We're a primary scalar architecture but there's enough vector that
721 * we use a vector IR so let's not also deal with scalar hacks on top
722 * of the vector hacks */
723
724 NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
725 NIR_PASS(progress, nir, nir_lower_vec_to_movs);
726 NIR_PASS(progress, nir, nir_opt_dce);
727 }
728
729 void
730 bifrost_compile_shader_nir(nir_shader *nir, bifrost_program *program, unsigned product_id)
731 {
732 bi_context *ctx = rzalloc(NULL, bi_context);
733 ctx->nir = nir;
734 ctx->stage = nir->info.stage;
735 ctx->quirks = bifrost_get_quirks(product_id);
736 list_inithead(&ctx->blocks);
737
738 /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
739 * (so we don't accidentally duplicate the epilogue since mesa/st has
740 * messed with our I/O quite a bit already) */
741
742 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
743
744 if (ctx->stage == MESA_SHADER_VERTEX) {
745 NIR_PASS_V(nir, nir_lower_viewport_transform);
746 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
747 }
748
749 NIR_PASS_V(nir, nir_split_var_copies);
750 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
751 NIR_PASS_V(nir, nir_lower_var_copies);
752 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
753 NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
754 NIR_PASS_V(nir, nir_lower_ssbo);
755
756 bi_optimize_nir(nir);
757 nir_print_shader(nir, stdout);
758
759 nir_foreach_function(func, nir) {
760 if (!func->impl)
761 continue;
762
763 ctx->impl = func->impl;
764 emit_cf_list(ctx, &func->impl->body);
765 break; /* TODO: Multi-function shaders */
766 }
767
768 bi_print_shader(ctx, stdout);
769 bi_schedule(ctx);
770
771 ralloc_free(ctx);
772 }