79164ac79a7ac0fc8eea5255f56c6e12f163f072
[mesa.git] / src / panfrost / bifrost / bifrost_compile.c
1 /*
2 * Copyright (C) 2020 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27 #include "main/mtypes.h"
28 #include "compiler/glsl/glsl_to_nir.h"
29 #include "compiler/nir_types.h"
30 #include "main/imports.h"
31 #include "compiler/nir/nir_builder.h"
32
33 #include "disassemble.h"
34 #include "bifrost_compile.h"
35 #include "compiler.h"
36 #include "bi_quirks.h"
37 #include "bi_print.h"
38
39 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
40 static bi_instruction *bi_emit_branch(bi_context *ctx);
41 static void bi_block_add_successor(bi_block *block, bi_block *successor);
42 static void bi_schedule_barrier(bi_context *ctx);
43
44 static void
45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
46 {
47 bi_instruction *branch = bi_emit_branch(ctx);
48
49 switch (instr->type) {
50 case nir_jump_break:
51 branch->branch.target = ctx->break_block;
52 break;
53 case nir_jump_continue:
54 branch->branch.target = ctx->continue_block;
55 break;
56 default:
57 unreachable("Unhandled jump type");
58 }
59
60 bi_block_add_successor(ctx->current_block, branch->branch.target);
61 }
62
63 static void
64 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
65 {
66 bi_instruction ins = {
67 .type = BI_LOAD_VAR,
68 .load_vary = {
69 .load = {
70 .location = nir_intrinsic_base(instr),
71 .channels = instr->num_components,
72 },
73 .interp_mode = BIFROST_INTERP_DEFAULT, /* TODO */
74 .reuse = false, /* TODO */
75 .flat = instr->intrinsic != nir_intrinsic_load_interpolated_input
76 },
77 .dest = bir_dest_index(&instr->dest),
78 .dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
79 };
80
81 nir_src *offset = nir_get_io_offset_src(instr);
82
83 if (nir_src_is_const(*offset))
84 ins.load_vary.load.location += nir_src_as_uint(*offset);
85 else
86 ins.src[0] = bir_src_index(offset);
87
88 bi_emit(ctx, ins);
89 }
90
91 static void
92 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
93 {
94 if (!ctx->emitted_atest) {
95 bi_instruction ins = {
96 .type = BI_ATEST
97 };
98
99 bi_emit(ctx, ins);
100 bi_schedule_barrier(ctx);
101 ctx->emitted_atest = true;
102 }
103
104 bi_instruction blend = {
105 .type = BI_BLEND,
106 .blend_location = nir_intrinsic_base(instr),
107 .src = {
108 bir_src_index(&instr->src[0])
109 },
110 .swizzle = {
111 { 0, 1, 2, 3 }
112 }
113 };
114
115 bi_emit(ctx, blend);
116 bi_schedule_barrier(ctx);
117 }
118
119 static struct bi_load
120 bi_direct_load_for_instr(nir_intrinsic_instr *instr)
121 {
122 nir_src *offset = nir_get_io_offset_src(instr);
123 assert(nir_src_is_const(*offset)); /* no indirects */
124
125 struct bi_load load = {
126 .location = nir_intrinsic_base(instr) + nir_src_as_uint(*offset),
127 .channels = instr->num_components
128 };
129
130 return load;
131 }
132
133 static void
134 bi_emit_ld_attr(bi_context *ctx, nir_intrinsic_instr *instr)
135 {
136 bi_instruction load = {
137 .type = BI_LOAD_ATTR,
138 .load = bi_direct_load_for_instr(instr),
139 .dest = bir_dest_index(&instr->dest),
140 .dest_type = nir_intrinsic_type(instr)
141 };
142
143 bi_emit(ctx, load);
144 }
145
146 static void
147 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
148 {
149 nir_src *offset = nir_get_io_offset_src(instr);
150 assert(nir_src_is_const(*offset)); /* no indirects */
151
152 bi_instruction address = {
153 .type = BI_LOAD_VAR_ADDRESS,
154 .load = bi_direct_load_for_instr(instr),
155 .dest_type = nir_intrinsic_type(instr),
156 .dest = bi_make_temp(ctx)
157 };
158
159 bi_instruction st = {
160 .type = BI_STORE_VAR,
161 .src = {
162 address.dest,
163 bir_src_index(&instr->src[0])
164 },
165 .swizzle = {
166 { 0, 1, 2, 3 }
167 }
168 };
169
170 bi_emit(ctx, address);
171 bi_emit(ctx, st);
172 }
173
174 static void
175 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
176 {
177 /* TODO: Indirect access */
178
179 bi_instruction ld = {
180 .type = BI_LOAD_UNIFORM,
181 .load = bi_direct_load_for_instr(instr),
182 .dest = bir_dest_index(&instr->dest),
183 .dest_type = nir_intrinsic_type(instr),
184 .src = {
185 BIR_INDEX_ZERO /* TODO: UBOs */
186 }
187 };
188
189 bi_emit(ctx, ld);
190 }
191
192 static void
193 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
194 {
195
196 switch (instr->intrinsic) {
197 case nir_intrinsic_load_barycentric_pixel:
198 /* stub */
199 break;
200 case nir_intrinsic_load_interpolated_input:
201 case nir_intrinsic_load_input:
202 if (ctx->stage == MESA_SHADER_FRAGMENT)
203 bi_emit_ld_vary(ctx, instr);
204 else if (ctx->stage == MESA_SHADER_VERTEX)
205 bi_emit_ld_attr(ctx, instr);
206 else {
207 unreachable("Unsupported shader stage");
208 }
209 break;
210
211 case nir_intrinsic_store_output:
212 if (ctx->stage == MESA_SHADER_FRAGMENT)
213 bi_emit_frag_out(ctx, instr);
214 else if (ctx->stage == MESA_SHADER_VERTEX)
215 bi_emit_st_vary(ctx, instr);
216 else
217 unreachable("Unsupported shader stage");
218 break;
219
220 case nir_intrinsic_load_uniform:
221 bi_emit_ld_uniform(ctx, instr);
222 break;
223
224 default:
225 /* todo */
226 break;
227 }
228 }
229
230 static void
231 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
232 {
233 /* Make sure we've been lowered */
234 assert(instr->def.num_components == 1);
235
236 bi_instruction move = {
237 .type = BI_MOV,
238 .dest = bir_ssa_index(&instr->def),
239 .dest_type = instr->def.bit_size | nir_type_uint,
240 .src = {
241 BIR_INDEX_CONSTANT
242 },
243 .constant = {
244 .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
245 }
246 };
247
248 bi_emit(ctx, move);
249 }
250
251 static void
252 emit_instr(bi_context *ctx, struct nir_instr *instr)
253 {
254 switch (instr->type) {
255 case nir_instr_type_load_const:
256 emit_load_const(ctx, nir_instr_as_load_const(instr));
257 break;
258
259 case nir_instr_type_intrinsic:
260 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
261 break;
262
263 #if 0
264 case nir_instr_type_alu:
265 emit_alu(ctx, nir_instr_as_alu(instr));
266 break;
267
268 case nir_instr_type_tex:
269 emit_tex(ctx, nir_instr_as_tex(instr));
270 break;
271 #endif
272
273 case nir_instr_type_jump:
274 emit_jump(ctx, nir_instr_as_jump(instr));
275 break;
276
277 case nir_instr_type_ssa_undef:
278 /* Spurious */
279 break;
280
281 default:
282 //unreachable("Unhandled instruction type");
283 break;
284 }
285 }
286
287
288
289 static bi_block *
290 create_empty_block(bi_context *ctx)
291 {
292 bi_block *blk = rzalloc(ctx, bi_block);
293
294 blk->predecessors = _mesa_set_create(blk,
295 _mesa_hash_pointer,
296 _mesa_key_pointer_equal);
297
298 blk->name = ctx->block_name_count++;
299
300 return blk;
301 }
302
303 static void
304 bi_block_add_successor(bi_block *block, bi_block *successor)
305 {
306 assert(block);
307 assert(successor);
308
309 for (unsigned i = 0; i < ARRAY_SIZE(block->successors); ++i) {
310 if (block->successors[i]) {
311 if (block->successors[i] == successor)
312 return;
313 else
314 continue;
315 }
316
317 block->successors[i] = successor;
318 _mesa_set_add(successor->predecessors, block);
319 return;
320 }
321
322 unreachable("Too many successors");
323 }
324
325 static void
326 bi_schedule_barrier(bi_context *ctx)
327 {
328 bi_block *temp = ctx->after_block;
329 ctx->after_block = create_empty_block(ctx);
330 list_addtail(&ctx->after_block->link, &ctx->blocks);
331 list_inithead(&ctx->after_block->instructions);
332 bi_block_add_successor(ctx->current_block, ctx->after_block);
333 ctx->current_block = ctx->after_block;
334 ctx->after_block = temp;
335 }
336
337 static bi_block *
338 emit_block(bi_context *ctx, nir_block *block)
339 {
340 if (ctx->after_block) {
341 ctx->current_block = ctx->after_block;
342 ctx->after_block = NULL;
343 } else {
344 ctx->current_block = create_empty_block(ctx);
345 }
346
347 list_addtail(&ctx->current_block->link, &ctx->blocks);
348 list_inithead(&ctx->current_block->instructions);
349
350 nir_foreach_instr(instr, block) {
351 emit_instr(ctx, instr);
352 ++ctx->instruction_count;
353 }
354
355 return ctx->current_block;
356 }
357
358 /* Emits an unconditional branch to the end of the current block, returning a
359 * pointer so the user can fill in details */
360
361 static bi_instruction *
362 bi_emit_branch(bi_context *ctx)
363 {
364 bi_instruction branch = {
365 .type = BI_BRANCH,
366 .branch = {
367 .cond = BI_COND_ALWAYS
368 }
369 };
370
371 return bi_emit(ctx, branch);
372 }
373
374 /* Sets a condition for a branch by examing the NIR condition. If we're
375 * familiar with the condition, we unwrap it to fold it into the branch
376 * instruction. Otherwise, we consume the condition directly. We
377 * generally use 1-bit booleans which allows us to use small types for
378 * the conditions.
379 */
380
381 static void
382 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
383 {
384 /* TODO: Try to unwrap instead of always bailing */
385 branch->src[0] = bir_src_index(cond);
386 branch->src[1] = BIR_INDEX_ZERO;
387 branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
388 branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
389 }
390
391 static void
392 emit_if(bi_context *ctx, nir_if *nif)
393 {
394 bi_block *before_block = ctx->current_block;
395
396 /* Speculatively emit the branch, but we can't fill it in until later */
397 bi_instruction *then_branch = bi_emit_branch(ctx);
398 bi_set_branch_cond(then_branch, &nif->condition, true);
399
400 /* Emit the two subblocks. */
401 bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
402 bi_block *end_then_block = ctx->current_block;
403
404 /* Emit a jump from the end of the then block to the end of the else */
405 bi_instruction *then_exit = bi_emit_branch(ctx);
406
407 /* Emit second block, and check if it's empty */
408
409 int count_in = ctx->instruction_count;
410 bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
411 bi_block *end_else_block = ctx->current_block;
412 ctx->after_block = create_empty_block(ctx);
413
414 /* Now that we have the subblocks emitted, fix up the branches */
415
416 assert(then_block);
417 assert(else_block);
418
419 if (ctx->instruction_count == count_in) {
420 /* The else block is empty, so don't emit an exit jump */
421 bi_remove_instruction(then_exit);
422 then_branch->branch.target = ctx->after_block;
423 } else {
424 then_branch->branch.target = else_block;
425 then_exit->branch.target = ctx->after_block;
426 bi_block_add_successor(end_then_block, then_exit->branch.target);
427 }
428
429 /* Wire up the successors */
430
431 bi_block_add_successor(before_block, then_branch->branch.target); /* then_branch */
432
433 bi_block_add_successor(before_block, then_block); /* fallthrough */
434 bi_block_add_successor(end_else_block, ctx->after_block); /* fallthrough */
435 }
436
437 static void
438 emit_loop(bi_context *ctx, nir_loop *nloop)
439 {
440 /* Remember where we are */
441 bi_block *start_block = ctx->current_block;
442
443 bi_block *saved_break = ctx->break_block;
444 bi_block *saved_continue = ctx->continue_block;
445
446 ctx->continue_block = create_empty_block(ctx);
447 ctx->break_block = create_empty_block(ctx);
448 ctx->after_block = ctx->continue_block;
449
450 /* Emit the body itself */
451 emit_cf_list(ctx, &nloop->body);
452
453 /* Branch back to loop back */
454 bi_instruction *br_back = bi_emit_branch(ctx);
455 br_back->branch.target = ctx->continue_block;
456 bi_block_add_successor(start_block, ctx->continue_block);
457 bi_block_add_successor(ctx->current_block, ctx->continue_block);
458
459 ctx->after_block = ctx->break_block;
460
461 /* Pop off */
462 ctx->break_block = saved_break;
463 ctx->continue_block = saved_continue;
464 ++ctx->loop_count;
465 }
466
467 static bi_block *
468 emit_cf_list(bi_context *ctx, struct exec_list *list)
469 {
470 bi_block *start_block = NULL;
471
472 foreach_list_typed(nir_cf_node, node, node, list) {
473 switch (node->type) {
474 case nir_cf_node_block: {
475 bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
476
477 if (!start_block)
478 start_block = block;
479
480 break;
481 }
482
483 case nir_cf_node_if:
484 emit_if(ctx, nir_cf_node_as_if(node));
485 break;
486
487 case nir_cf_node_loop:
488 emit_loop(ctx, nir_cf_node_as_loop(node));
489 break;
490
491 default:
492 unreachable("Unknown control flow");
493 }
494 }
495
496 return start_block;
497 }
498
499 static int
500 glsl_type_size(const struct glsl_type *type, bool bindless)
501 {
502 return glsl_count_attribute_slots(type, false);
503 }
504
505 static void
506 bi_optimize_nir(nir_shader *nir)
507 {
508 bool progress;
509 unsigned lower_flrp = 16 | 32 | 64;
510
511 NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
512 NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
513
514 nir_lower_tex_options lower_tex_options = {
515 .lower_txs_lod = true,
516 .lower_txp = ~0,
517 .lower_tex_without_implicit_lod = true,
518 .lower_txd = true,
519 };
520
521 NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
522 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
523 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
524
525 do {
526 progress = false;
527
528 NIR_PASS(progress, nir, nir_lower_var_copies);
529 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
530
531 NIR_PASS(progress, nir, nir_copy_prop);
532 NIR_PASS(progress, nir, nir_opt_remove_phis);
533 NIR_PASS(progress, nir, nir_opt_dce);
534 NIR_PASS(progress, nir, nir_opt_dead_cf);
535 NIR_PASS(progress, nir, nir_opt_cse);
536 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
537 NIR_PASS(progress, nir, nir_opt_algebraic);
538 NIR_PASS(progress, nir, nir_opt_constant_folding);
539
540 if (lower_flrp != 0) {
541 bool lower_flrp_progress = false;
542 NIR_PASS(lower_flrp_progress,
543 nir,
544 nir_lower_flrp,
545 lower_flrp,
546 false /* always_precise */,
547 nir->options->lower_ffma);
548 if (lower_flrp_progress) {
549 NIR_PASS(progress, nir,
550 nir_opt_constant_folding);
551 progress = true;
552 }
553
554 /* Nothing should rematerialize any flrps, so we only
555 * need to do this lowering once.
556 */
557 lower_flrp = 0;
558 }
559
560 NIR_PASS(progress, nir, nir_opt_undef);
561 NIR_PASS(progress, nir, nir_opt_loop_unroll,
562 nir_var_shader_in |
563 nir_var_shader_out |
564 nir_var_function_temp);
565 } while (progress);
566
567 NIR_PASS(progress, nir, nir_opt_algebraic_late);
568 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
569 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
570
571 /* Take us out of SSA */
572 NIR_PASS(progress, nir, nir_lower_locals_to_regs);
573 NIR_PASS(progress, nir, nir_convert_from_ssa, true);
574 }
575
576 void
577 bifrost_compile_shader_nir(nir_shader *nir, bifrost_program *program, unsigned product_id)
578 {
579 bi_context *ctx = rzalloc(NULL, bi_context);
580 ctx->nir = nir;
581 ctx->stage = nir->info.stage;
582 ctx->quirks = bifrost_get_quirks(product_id);
583 list_inithead(&ctx->blocks);
584
585 /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
586 * (so we don't accidentally duplicate the epilogue since mesa/st has
587 * messed with our I/O quite a bit already) */
588
589 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
590
591 if (ctx->stage == MESA_SHADER_VERTEX) {
592 NIR_PASS_V(nir, nir_lower_viewport_transform);
593 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
594 }
595
596 NIR_PASS_V(nir, nir_split_var_copies);
597 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
598 NIR_PASS_V(nir, nir_lower_var_copies);
599 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
600 NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
601 NIR_PASS_V(nir, nir_lower_ssbo);
602
603 bi_optimize_nir(nir);
604 nir_print_shader(nir, stdout);
605
606 nir_foreach_function(func, nir) {
607 if (!func->impl)
608 continue;
609
610 ctx->impl = func->impl;
611 emit_cf_list(ctx, &func->impl->body);
612 break; /* TODO: Multi-function shaders */
613 }
614
615 bi_print_shader(ctx, stdout);
616 bi_schedule(ctx);
617 bi_print_shader(ctx, stdout);
618
619 ralloc_free(ctx);
620 }