pan/bi: Add a bunch of ALU ops
[mesa.git] / src / panfrost / bifrost / bifrost_compile.c
1 /*
2 * Copyright (C) 2020 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27 #include "main/mtypes.h"
28 #include "compiler/glsl/glsl_to_nir.h"
29 #include "compiler/nir_types.h"
30 #include "main/imports.h"
31 #include "compiler/nir/nir_builder.h"
32
33 #include "disassemble.h"
34 #include "bifrost_compile.h"
35 #include "compiler.h"
36 #include "bi_quirks.h"
37 #include "bi_print.h"
38
39 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
40 static bi_instruction *bi_emit_branch(bi_context *ctx);
41 static void bi_block_add_successor(bi_block *block, bi_block *successor);
42 static void bi_schedule_barrier(bi_context *ctx);
43
44 static void
45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
46 {
47 bi_instruction *branch = bi_emit_branch(ctx);
48
49 switch (instr->type) {
50 case nir_jump_break:
51 branch->branch.target = ctx->break_block;
52 break;
53 case nir_jump_continue:
54 branch->branch.target = ctx->continue_block;
55 break;
56 default:
57 unreachable("Unhandled jump type");
58 }
59
60 bi_block_add_successor(ctx->current_block, branch->branch.target);
61 }
62
63 /* Gets a bytemask for a complete vecN write */
64 static unsigned
65 bi_mask_for_channels_32(unsigned i)
66 {
67 return (1 << (4 * i)) - 1;
68 }
69
70 static bi_instruction
71 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
72 {
73 bi_instruction load = {
74 .type = T,
75 .writemask = bi_mask_for_channels_32(instr->num_components),
76 .src = { BIR_INDEX_CONSTANT },
77 .constant = { .u64 = nir_intrinsic_base(instr) },
78 };
79
80 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
81
82 if (info->has_dest)
83 load.dest = bir_dest_index(&instr->dest);
84
85 if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
86 load.dest_type = nir_intrinsic_type(instr);
87
88 nir_src *offset = nir_get_io_offset_src(instr);
89
90 if (nir_src_is_const(*offset))
91 load.constant.u64 += nir_src_as_uint(*offset);
92 else
93 load.src[0] = bir_src_index(offset);
94
95 return load;
96 }
97
98 static void
99 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
100 {
101 bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
102 ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
103 ins.load_vary.reuse = false; /* TODO */
104 ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
105 ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
106 bi_emit(ctx, ins);
107 }
108
109 static void
110 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
111 {
112 if (!ctx->emitted_atest) {
113 bi_instruction ins = {
114 .type = BI_ATEST
115 };
116
117 bi_emit(ctx, ins);
118 bi_schedule_barrier(ctx);
119 ctx->emitted_atest = true;
120 }
121
122 bi_instruction blend = {
123 .type = BI_BLEND,
124 .blend_location = nir_intrinsic_base(instr),
125 .src = {
126 bir_src_index(&instr->src[0])
127 },
128 .swizzle = {
129 { 0, 1, 2, 3 }
130 }
131 };
132
133 bi_emit(ctx, blend);
134 bi_schedule_barrier(ctx);
135 }
136
137 static void
138 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
139 {
140 bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
141 address.dest = bi_make_temp(ctx);
142 address.dest_type = nir_type_uint64;
143 address.writemask = (1 << 8) - 1;
144
145 bi_instruction st = {
146 .type = BI_STORE_VAR,
147 .src = {
148 address.dest,
149 bir_src_index(&instr->src[0])
150 },
151 .swizzle = {
152 { 0, 1, 2, 3 }
153 }
154 };
155
156 bi_emit(ctx, address);
157 bi_emit(ctx, st);
158 }
159
160 static void
161 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
162 {
163 bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
164 ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
165 bi_emit(ctx, ld);
166 }
167
168 static void
169 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
170 {
171
172 switch (instr->intrinsic) {
173 case nir_intrinsic_load_barycentric_pixel:
174 /* stub */
175 break;
176 case nir_intrinsic_load_interpolated_input:
177 case nir_intrinsic_load_input:
178 if (ctx->stage == MESA_SHADER_FRAGMENT)
179 bi_emit_ld_vary(ctx, instr);
180 else if (ctx->stage == MESA_SHADER_VERTEX)
181 bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
182 else {
183 unreachable("Unsupported shader stage");
184 }
185 break;
186
187 case nir_intrinsic_store_output:
188 if (ctx->stage == MESA_SHADER_FRAGMENT)
189 bi_emit_frag_out(ctx, instr);
190 else if (ctx->stage == MESA_SHADER_VERTEX)
191 bi_emit_st_vary(ctx, instr);
192 else
193 unreachable("Unsupported shader stage");
194 break;
195
196 case nir_intrinsic_load_uniform:
197 bi_emit_ld_uniform(ctx, instr);
198 break;
199
200 default:
201 /* todo */
202 break;
203 }
204 }
205
206 static void
207 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
208 {
209 /* Make sure we've been lowered */
210 assert(instr->def.num_components == 1);
211
212 bi_instruction move = {
213 .type = BI_MOV,
214 .dest = bir_ssa_index(&instr->def),
215 .dest_type = instr->def.bit_size | nir_type_uint,
216 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
217 .src = {
218 BIR_INDEX_CONSTANT
219 },
220 .constant = {
221 .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
222 }
223 };
224
225 bi_emit(ctx, move);
226 }
227
228 static enum bi_class
229 bi_class_for_nir_alu(nir_op op)
230 {
231 switch (op) {
232 case nir_op_iadd:
233 case nir_op_fadd:
234 return BI_ADD;
235
236 case nir_op_i2i8:
237 case nir_op_i2i16:
238 case nir_op_i2i32:
239 case nir_op_i2i64:
240 case nir_op_u2u8:
241 case nir_op_u2u16:
242 case nir_op_u2u32:
243 case nir_op_u2u64:
244 case nir_op_f2i16:
245 case nir_op_f2i32:
246 case nir_op_f2i64:
247 case nir_op_f2u16:
248 case nir_op_f2u32:
249 case nir_op_f2u64:
250 case nir_op_i2f16:
251 case nir_op_i2f32:
252 case nir_op_i2f64:
253 case nir_op_u2f16:
254 case nir_op_u2f32:
255 case nir_op_u2f64:
256 return BI_CONVERT;
257
258 case nir_op_fmul:
259 return BI_FMA;
260
261 case nir_op_imin:
262 case nir_op_imax:
263 case nir_op_umin:
264 case nir_op_umax:
265 case nir_op_fmin:
266 case nir_op_fmax:
267 return BI_MINMAX;
268
269 case nir_op_fsat:
270 case nir_op_mov:
271 return BI_MOV;
272
273 default:
274 unreachable("Unknown ALU op");
275 }
276 }
277
278 static void
279 emit_alu(bi_context *ctx, nir_alu_instr *instr)
280 {
281 /* Assume it's something we can handle normally */
282 bi_instruction alu = {
283 .type = bi_class_for_nir_alu(instr->op),
284 .dest = bir_dest_index(&instr->dest.dest),
285 .dest_type = nir_op_infos[instr->op].output_type
286 | nir_dest_bit_size(instr->dest.dest),
287 };
288
289 if (instr->dest.dest.is_ssa) {
290 /* Construct a writemask */
291 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
292 unsigned comps = instr->dest.dest.ssa.num_components;
293 assert(comps == 1);
294 unsigned bits = bits_per_comp * comps;
295 unsigned bytes = MAX2(bits / 8, 1);
296 alu.writemask = (1 << bytes) - 1;
297 } else {
298 unsigned comp_mask = instr->dest.write_mask;
299
300 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
301 comp_mask);
302 }
303
304 /* We inline constants as we go. This tracks how many constants have
305 * been inlined, since we're limited to 64-bits of constants per
306 * instruction */
307
308 unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
309 unsigned constants_left = (64 / dest_bits);
310 unsigned constant_shift = 0;
311
312 /* Copy sources */
313
314 unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
315 assert(num_inputs <= ARRAY_SIZE(alu.src));
316
317 for (unsigned i = 0; i < num_inputs; ++i) {
318 unsigned bits = nir_src_bit_size(instr->src[i].src);
319 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
320 | bits;
321
322 /* Try to inline a constant */
323 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
324 alu.constant.u64 |=
325 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
326
327 alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
328 --constants_left;
329 constant_shift += dest_bits;
330 continue;
331 }
332
333 alu.src[i] = bir_src_index(&instr->src[i].src);
334
335 /* We assert scalarization above */
336 alu.swizzle[i][0] = instr->src[i].swizzle[0];
337 }
338
339 /* Op-specific fixup */
340 switch (instr->op) {
341 case nir_op_fmul:
342 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
343 break;
344 case nir_op_fsat:
345 alu.outmod = BIFROST_SAT; /* MOV */
346 break;
347 case nir_op_fmax:
348 case nir_op_imax:
349 case nir_op_umax:
350 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
351 break;
352 default:
353 break;
354 }
355
356 bi_emit(ctx, alu);
357 }
358
359 static void
360 emit_instr(bi_context *ctx, struct nir_instr *instr)
361 {
362 switch (instr->type) {
363 case nir_instr_type_load_const:
364 emit_load_const(ctx, nir_instr_as_load_const(instr));
365 break;
366
367 case nir_instr_type_intrinsic:
368 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
369 break;
370
371 case nir_instr_type_alu:
372 emit_alu(ctx, nir_instr_as_alu(instr));
373 break;
374
375 #if 0
376 case nir_instr_type_tex:
377 emit_tex(ctx, nir_instr_as_tex(instr));
378 break;
379 #endif
380
381 case nir_instr_type_jump:
382 emit_jump(ctx, nir_instr_as_jump(instr));
383 break;
384
385 case nir_instr_type_ssa_undef:
386 /* Spurious */
387 break;
388
389 default:
390 //unreachable("Unhandled instruction type");
391 break;
392 }
393 }
394
395
396
397 static bi_block *
398 create_empty_block(bi_context *ctx)
399 {
400 bi_block *blk = rzalloc(ctx, bi_block);
401
402 blk->predecessors = _mesa_set_create(blk,
403 _mesa_hash_pointer,
404 _mesa_key_pointer_equal);
405
406 blk->name = ctx->block_name_count++;
407
408 return blk;
409 }
410
411 static void
412 bi_block_add_successor(bi_block *block, bi_block *successor)
413 {
414 assert(block);
415 assert(successor);
416
417 for (unsigned i = 0; i < ARRAY_SIZE(block->successors); ++i) {
418 if (block->successors[i]) {
419 if (block->successors[i] == successor)
420 return;
421 else
422 continue;
423 }
424
425 block->successors[i] = successor;
426 _mesa_set_add(successor->predecessors, block);
427 return;
428 }
429
430 unreachable("Too many successors");
431 }
432
433 static void
434 bi_schedule_barrier(bi_context *ctx)
435 {
436 bi_block *temp = ctx->after_block;
437 ctx->after_block = create_empty_block(ctx);
438 list_addtail(&ctx->after_block->link, &ctx->blocks);
439 list_inithead(&ctx->after_block->instructions);
440 bi_block_add_successor(ctx->current_block, ctx->after_block);
441 ctx->current_block = ctx->after_block;
442 ctx->after_block = temp;
443 }
444
445 static bi_block *
446 emit_block(bi_context *ctx, nir_block *block)
447 {
448 if (ctx->after_block) {
449 ctx->current_block = ctx->after_block;
450 ctx->after_block = NULL;
451 } else {
452 ctx->current_block = create_empty_block(ctx);
453 }
454
455 list_addtail(&ctx->current_block->link, &ctx->blocks);
456 list_inithead(&ctx->current_block->instructions);
457
458 nir_foreach_instr(instr, block) {
459 emit_instr(ctx, instr);
460 ++ctx->instruction_count;
461 }
462
463 return ctx->current_block;
464 }
465
466 /* Emits an unconditional branch to the end of the current block, returning a
467 * pointer so the user can fill in details */
468
469 static bi_instruction *
470 bi_emit_branch(bi_context *ctx)
471 {
472 bi_instruction branch = {
473 .type = BI_BRANCH,
474 .branch = {
475 .cond = BI_COND_ALWAYS
476 }
477 };
478
479 return bi_emit(ctx, branch);
480 }
481
482 /* Sets a condition for a branch by examing the NIR condition. If we're
483 * familiar with the condition, we unwrap it to fold it into the branch
484 * instruction. Otherwise, we consume the condition directly. We
485 * generally use 1-bit booleans which allows us to use small types for
486 * the conditions.
487 */
488
489 static void
490 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
491 {
492 /* TODO: Try to unwrap instead of always bailing */
493 branch->src[0] = bir_src_index(cond);
494 branch->src[1] = BIR_INDEX_ZERO;
495 branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
496 branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
497 }
498
499 static void
500 emit_if(bi_context *ctx, nir_if *nif)
501 {
502 bi_block *before_block = ctx->current_block;
503
504 /* Speculatively emit the branch, but we can't fill it in until later */
505 bi_instruction *then_branch = bi_emit_branch(ctx);
506 bi_set_branch_cond(then_branch, &nif->condition, true);
507
508 /* Emit the two subblocks. */
509 bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
510 bi_block *end_then_block = ctx->current_block;
511
512 /* Emit a jump from the end of the then block to the end of the else */
513 bi_instruction *then_exit = bi_emit_branch(ctx);
514
515 /* Emit second block, and check if it's empty */
516
517 int count_in = ctx->instruction_count;
518 bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
519 bi_block *end_else_block = ctx->current_block;
520 ctx->after_block = create_empty_block(ctx);
521
522 /* Now that we have the subblocks emitted, fix up the branches */
523
524 assert(then_block);
525 assert(else_block);
526
527 if (ctx->instruction_count == count_in) {
528 /* The else block is empty, so don't emit an exit jump */
529 bi_remove_instruction(then_exit);
530 then_branch->branch.target = ctx->after_block;
531 } else {
532 then_branch->branch.target = else_block;
533 then_exit->branch.target = ctx->after_block;
534 bi_block_add_successor(end_then_block, then_exit->branch.target);
535 }
536
537 /* Wire up the successors */
538
539 bi_block_add_successor(before_block, then_branch->branch.target); /* then_branch */
540
541 bi_block_add_successor(before_block, then_block); /* fallthrough */
542 bi_block_add_successor(end_else_block, ctx->after_block); /* fallthrough */
543 }
544
545 static void
546 emit_loop(bi_context *ctx, nir_loop *nloop)
547 {
548 /* Remember where we are */
549 bi_block *start_block = ctx->current_block;
550
551 bi_block *saved_break = ctx->break_block;
552 bi_block *saved_continue = ctx->continue_block;
553
554 ctx->continue_block = create_empty_block(ctx);
555 ctx->break_block = create_empty_block(ctx);
556 ctx->after_block = ctx->continue_block;
557
558 /* Emit the body itself */
559 emit_cf_list(ctx, &nloop->body);
560
561 /* Branch back to loop back */
562 bi_instruction *br_back = bi_emit_branch(ctx);
563 br_back->branch.target = ctx->continue_block;
564 bi_block_add_successor(start_block, ctx->continue_block);
565 bi_block_add_successor(ctx->current_block, ctx->continue_block);
566
567 ctx->after_block = ctx->break_block;
568
569 /* Pop off */
570 ctx->break_block = saved_break;
571 ctx->continue_block = saved_continue;
572 ++ctx->loop_count;
573 }
574
575 static bi_block *
576 emit_cf_list(bi_context *ctx, struct exec_list *list)
577 {
578 bi_block *start_block = NULL;
579
580 foreach_list_typed(nir_cf_node, node, node, list) {
581 switch (node->type) {
582 case nir_cf_node_block: {
583 bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
584
585 if (!start_block)
586 start_block = block;
587
588 break;
589 }
590
591 case nir_cf_node_if:
592 emit_if(ctx, nir_cf_node_as_if(node));
593 break;
594
595 case nir_cf_node_loop:
596 emit_loop(ctx, nir_cf_node_as_loop(node));
597 break;
598
599 default:
600 unreachable("Unknown control flow");
601 }
602 }
603
604 return start_block;
605 }
606
607 static int
608 glsl_type_size(const struct glsl_type *type, bool bindless)
609 {
610 return glsl_count_attribute_slots(type, false);
611 }
612
613 static void
614 bi_optimize_nir(nir_shader *nir)
615 {
616 bool progress;
617 unsigned lower_flrp = 16 | 32 | 64;
618
619 NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
620 NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
621
622 nir_lower_tex_options lower_tex_options = {
623 .lower_txs_lod = true,
624 .lower_txp = ~0,
625 .lower_tex_without_implicit_lod = true,
626 .lower_txd = true,
627 };
628
629 NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
630 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
631 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
632
633 do {
634 progress = false;
635
636 NIR_PASS(progress, nir, nir_lower_var_copies);
637 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
638
639 NIR_PASS(progress, nir, nir_copy_prop);
640 NIR_PASS(progress, nir, nir_opt_remove_phis);
641 NIR_PASS(progress, nir, nir_opt_dce);
642 NIR_PASS(progress, nir, nir_opt_dead_cf);
643 NIR_PASS(progress, nir, nir_opt_cse);
644 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
645 NIR_PASS(progress, nir, nir_opt_algebraic);
646 NIR_PASS(progress, nir, nir_opt_constant_folding);
647
648 if (lower_flrp != 0) {
649 bool lower_flrp_progress = false;
650 NIR_PASS(lower_flrp_progress,
651 nir,
652 nir_lower_flrp,
653 lower_flrp,
654 false /* always_precise */,
655 nir->options->lower_ffma);
656 if (lower_flrp_progress) {
657 NIR_PASS(progress, nir,
658 nir_opt_constant_folding);
659 progress = true;
660 }
661
662 /* Nothing should rematerialize any flrps, so we only
663 * need to do this lowering once.
664 */
665 lower_flrp = 0;
666 }
667
668 NIR_PASS(progress, nir, nir_opt_undef);
669 NIR_PASS(progress, nir, nir_opt_loop_unroll,
670 nir_var_shader_in |
671 nir_var_shader_out |
672 nir_var_function_temp);
673 } while (progress);
674
675 NIR_PASS(progress, nir, nir_opt_algebraic_late);
676 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
677 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
678
679 /* Take us out of SSA */
680 NIR_PASS(progress, nir, nir_lower_locals_to_regs);
681 NIR_PASS(progress, nir, nir_convert_from_ssa, true);
682
683 /* We're a primary scalar architecture but there's enough vector that
684 * we use a vector IR so let's not also deal with scalar hacks on top
685 * of the vector hacks */
686
687 NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
688 NIR_PASS(progress, nir, nir_lower_vec_to_movs);
689 NIR_PASS(progress, nir, nir_opt_dce);
690 }
691
692 void
693 bifrost_compile_shader_nir(nir_shader *nir, bifrost_program *program, unsigned product_id)
694 {
695 bi_context *ctx = rzalloc(NULL, bi_context);
696 ctx->nir = nir;
697 ctx->stage = nir->info.stage;
698 ctx->quirks = bifrost_get_quirks(product_id);
699 list_inithead(&ctx->blocks);
700
701 /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
702 * (so we don't accidentally duplicate the epilogue since mesa/st has
703 * messed with our I/O quite a bit already) */
704
705 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
706
707 if (ctx->stage == MESA_SHADER_VERTEX) {
708 NIR_PASS_V(nir, nir_lower_viewport_transform);
709 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
710 }
711
712 NIR_PASS_V(nir, nir_split_var_copies);
713 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
714 NIR_PASS_V(nir, nir_lower_var_copies);
715 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
716 NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
717 NIR_PASS_V(nir, nir_lower_ssbo);
718
719 bi_optimize_nir(nir);
720 nir_print_shader(nir, stdout);
721
722 nir_foreach_function(func, nir) {
723 if (!func->impl)
724 continue;
725
726 ctx->impl = func->impl;
727 emit_cf_list(ctx, &func->impl->body);
728 break; /* TODO: Multi-function shaders */
729 }
730
731 bi_print_shader(ctx, stdout);
732 bi_schedule(ctx);
733
734 ralloc_free(ctx);
735 }