src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "main/imports.h"
  31 #include "compiler/nir/nir_builder.h"
  32
  33 #include "disassemble.h"
  34 #include "bifrost_compile.h"
  35 #include "bifrost_nir.h"
  36 #include "compiler.h"
  37 #include "bi_quirks.h"
  38 #include "bi_print.h"
  39
  40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  41 static bi_instruction *bi_emit_branch(bi_context *ctx);
  42 static void bi_block_add_successor(bi_block *block, bi_block *successor);
  43 static void bi_schedule_barrier(bi_context *ctx);
  44
  45 static void
  46 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  47 {
  48         bi_instruction *branch = bi_emit_branch(ctx);
  49
  50         switch (instr->type) {
  51         case nir_jump_break:
  52                 branch->branch.target = ctx->break_block;
  53                 break;
  54         case nir_jump_continue:
  55                 branch->branch.target = ctx->continue_block;
  56                 break;
  57         default:
  58                 unreachable("Unhandled jump type");
  59         }
  60
  61         bi_block_add_successor(ctx->current_block, branch->branch.target);
  62 }
  63
  64 /* Gets a bytemask for a complete vecN write */
  65 static unsigned
  66 bi_mask_for_channels_32(unsigned i)
  67 {
  68         return (1 << (4 * i)) - 1;
  69 }
  70
  71 static bi_instruction
  72 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  73 {
  74         bi_instruction load = {
  75                 .type = T,
  76                 .writemask = bi_mask_for_channels_32(instr->num_components),
  77                 .src = { BIR_INDEX_CONSTANT },
  78                 .constant = { .u64 = nir_intrinsic_base(instr) },
  79         };
  80
  81         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  82
  83         if (info->has_dest)
  84                 load.dest = bir_dest_index(&instr->dest);
  85
  86         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  87                 load.dest_type = nir_intrinsic_type(instr);
  88
  89         nir_src *offset = nir_get_io_offset_src(instr);
  90
  91         if (nir_src_is_const(*offset))
  92                 load.constant.u64 += nir_src_as_uint(*offset);
  93         else
  94                 load.src[0] = bir_src_index(offset);
  95
  96         return load;
  97 }
  98
  99 static void
 100 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 101 {
 102         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
 103         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
 104         ins.load_vary.reuse = false; /* TODO */
 105         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
 106         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
 107         bi_emit(ctx, ins);
 108 }
 109
 110 static void
 111 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 112 {
 113         if (!ctx->emitted_atest) {
 114                 bi_instruction ins = {
 115                         .type = BI_ATEST
 116                 };
 117
 118                 bi_emit(ctx, ins);
 119                 bi_schedule_barrier(ctx);
 120                 ctx->emitted_atest = true;
 121         }
 122
 123         bi_instruction blend = {
 124                 .type = BI_BLEND,
 125                 .blend_location = nir_intrinsic_base(instr),
 126                 .src = {
 127                         bir_src_index(&instr->src[0])
 128                 },
 129                 .swizzle = {
 130                         { 0, 1, 2, 3 }
 131                 }
 132         };
 133
 134         bi_emit(ctx, blend);
 135         bi_schedule_barrier(ctx);
 136 }
 137
 138 static void
 139 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 140 {
 141         bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
 142         address.dest = bi_make_temp(ctx);
 143         address.dest_type = nir_type_uint64;
 144         address.writemask = (1 << 8) - 1;
 145
 146         bi_instruction st = {
 147                 .type = BI_STORE_VAR,
 148                 .src = {
 149                         address.dest,
 150                         bir_src_index(&instr->src[0])
 151                 },
 152                 .swizzle = {
 153                         { 0, 1, 2, 3 }
 154                 }
 155         };
 156
 157         bi_emit(ctx, address);
 158         bi_emit(ctx, st);
 159 }
 160
 161 static void
 162 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 163 {
 164         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 165         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 166
 167         /* TODO: Indirect access, since we need to multiply by the element
 168          * size. I believe we can get this lowering automatically via
 169          * nir_lower_io (as mul instructions) with the proper options, but this
 170          * is TODO */
 171         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 172         ld.constant.u64 += ctx->sysvals.sysval_count;
 173         ld.constant.u64 *= 16;
 174
 175         bi_emit(ctx, ld);
 176 }
 177
 178 static void
 179 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 180                 unsigned nr_components, unsigned offset)
 181 {
 182         nir_dest nir_dest;
 183
 184         /* Figure out which uniform this is */
 185         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 186         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 187
 188         /* Sysvals are prefix uniforms */
 189         unsigned uniform = ((uintptr_t) val) - 1;
 190
 191         /* Emit the read itself -- this is never indirect */
 192
 193         bi_instruction load = {
 194                 .type = BI_LOAD_UNIFORM,
 195                 .writemask = (1 << (nr_components * 4)) - 1,
 196                 .src = { BIR_INDEX_CONSTANT},
 197                 .constant = { (uniform * 16) + offset },
 198                 .dest = bir_dest_index(&nir_dest),
 199                 .dest_type = nir_type_uint32, /* TODO */
 200         };
 201
 202         bi_emit(ctx, load);
 203 }
 204
 205 static void
 206 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 207 {
 208
 209         switch (instr->intrinsic) {
 210         case nir_intrinsic_load_barycentric_pixel:
 211                 /* stub */
 212                 break;
 213         case nir_intrinsic_load_interpolated_input:
 214         case nir_intrinsic_load_input:
 215                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 216                         bi_emit_ld_vary(ctx, instr);
 217                 else if (ctx->stage == MESA_SHADER_VERTEX)
 218                         bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
 219                 else {
 220                         unreachable("Unsupported shader stage");
 221                 }
 222                 break;
 223
 224         case nir_intrinsic_store_output:
 225                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 226                         bi_emit_frag_out(ctx, instr);
 227                 else if (ctx->stage == MESA_SHADER_VERTEX)
 228                         bi_emit_st_vary(ctx, instr);
 229                 else
 230                         unreachable("Unsupported shader stage");
 231                 break;
 232
 233         case nir_intrinsic_load_uniform:
 234                 bi_emit_ld_uniform(ctx, instr);
 235                 break;
 236
 237         case nir_intrinsic_load_ssbo_address:
 238                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 239                 break;
 240
 241         case nir_intrinsic_get_buffer_size:
 242                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 243                 break;
 244
 245         case nir_intrinsic_load_viewport_scale:
 246         case nir_intrinsic_load_viewport_offset:
 247         case nir_intrinsic_load_num_work_groups:
 248         case nir_intrinsic_load_sampler_lod_parameters_pan:
 249                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 250                 break;
 251
 252         default:
 253                 /* todo */
 254                 break;
 255         }
 256 }
 257
 258 static void
 259 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 260 {
 261         /* Make sure we've been lowered */
 262         assert(instr->def.num_components == 1);
 263
 264         bi_instruction move = {
 265                 .type = BI_MOV,
 266                 .dest = bir_ssa_index(&instr->def),
 267                 .dest_type = instr->def.bit_size | nir_type_uint,
 268                 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
 269                 .src = {
 270                         BIR_INDEX_CONSTANT
 271                 },
 272                 .constant = {
 273                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 274                 }
 275         };
 276
 277         bi_emit(ctx, move);
 278 }
 279
 280 static enum bi_class
 281 bi_class_for_nir_alu(nir_op op)
 282 {
 283         switch (op) {
 284         case nir_op_iadd:
 285         case nir_op_fadd:
 286         case nir_op_fsub:
 287                 return BI_ADD;
 288         case nir_op_isub:
 289                 return BI_ISUB;
 290
 291         case nir_op_flt:
 292         case nir_op_fge:
 293         case nir_op_feq:
 294         case nir_op_fne:
 295         case nir_op_ilt:
 296         case nir_op_ige:
 297         case nir_op_ieq:
 298         case nir_op_ine:
 299                 return BI_CMP;
 300
 301         case nir_op_bcsel:
 302                 return BI_CSEL;
 303
 304         case nir_op_i2i8:
 305         case nir_op_i2i16:
 306         case nir_op_i2i32:
 307         case nir_op_i2i64:
 308         case nir_op_u2u8:
 309         case nir_op_u2u16:
 310         case nir_op_u2u32:
 311         case nir_op_u2u64:
 312         case nir_op_f2i16:
 313         case nir_op_f2i32:
 314         case nir_op_f2i64:
 315         case nir_op_f2u16:
 316         case nir_op_f2u32:
 317         case nir_op_f2u64:
 318         case nir_op_i2f16:
 319         case nir_op_i2f32:
 320         case nir_op_i2f64:
 321         case nir_op_u2f16:
 322         case nir_op_u2f32:
 323         case nir_op_u2f64:
 324                 return BI_CONVERT;
 325
 326         case nir_op_fmul:
 327                 return BI_FMA;
 328
 329         case nir_op_imin:
 330         case nir_op_imax:
 331         case nir_op_umin:
 332         case nir_op_umax:
 333         case nir_op_fmin:
 334         case nir_op_fmax:
 335                 return BI_MINMAX;
 336
 337         case nir_op_fsat:
 338         case nir_op_fneg:
 339         case nir_op_fabs:
 340         case nir_op_mov:
 341                 return BI_MOV;
 342
 343         case nir_op_frcp:
 344         case nir_op_frsq:
 345         case nir_op_fsin:
 346         case nir_op_fcos:
 347                 return BI_SPECIAL;
 348
 349         default:
 350                 unreachable("Unknown ALU op");
 351         }
 352 }
 353
 354 static enum bi_cond
 355 bi_cond_for_nir(nir_op op)
 356 {
 357         switch (op) {
 358         case nir_op_flt:
 359         case nir_op_ilt:
 360                 return BI_COND_LT;
 361         case nir_op_fge:
 362         case nir_op_ige:
 363                 return BI_COND_GE;
 364         case nir_op_feq:
 365         case nir_op_ieq:
 366                 return BI_COND_EQ;
 367         case nir_op_fne:
 368         case nir_op_ine:
 369                 return BI_COND_NE;
 370         default:
 371                 unreachable("Invalid compare");
 372         }
 373 }
 374
 375 static void
 376 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 377 {
 378         /* Assume it's something we can handle normally */
 379         bi_instruction alu = {
 380                 .type = bi_class_for_nir_alu(instr->op),
 381                 .dest = bir_dest_index(&instr->dest.dest),
 382                 .dest_type = nir_op_infos[instr->op].output_type
 383                         | nir_dest_bit_size(instr->dest.dest),
 384         };
 385
 386         /* TODO: Implement lowering of special functions for older Bifrost */
 387         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 388
 389         if (instr->dest.dest.is_ssa) {
 390                 /* Construct a writemask */
 391                 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
 392                 unsigned comps = instr->dest.dest.ssa.num_components;
 393                 assert(comps == 1);
 394                 unsigned bits = bits_per_comp * comps;
 395                 unsigned bytes = MAX2(bits / 8, 1);
 396                 alu.writemask = (1 << bytes) - 1;
 397         } else {
 398                 unsigned comp_mask = instr->dest.write_mask;
 399
 400                 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
 401                                 comp_mask);
 402         }
 403
 404         /* We inline constants as we go. This tracks how many constants have
 405          * been inlined, since we're limited to 64-bits of constants per
 406          * instruction */
 407
 408         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 409         unsigned constants_left = (64 / dest_bits);
 410         unsigned constant_shift = 0;
 411
 412         /* Copy sources */
 413
 414         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 415         assert(num_inputs <= ARRAY_SIZE(alu.src));
 416
 417         for (unsigned i = 0; i < num_inputs; ++i) {
 418                 unsigned bits = nir_src_bit_size(instr->src[i].src);
 419                 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
 420                         | bits;
 421
 422                 /* Try to inline a constant */
 423                 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
 424                         alu.constant.u64 |=
 425                                 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
 426
 427                         alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
 428                         --constants_left;
 429                         constant_shift += dest_bits;
 430                         continue;
 431                 }
 432
 433                 alu.src[i] = bir_src_index(&instr->src[i].src);
 434
 435                 /* We assert scalarization above */
 436                 alu.swizzle[i][0] = instr->src[i].swizzle[0];
 437         }
 438
 439         /* Op-specific fixup */
 440         switch (instr->op) {
 441         case nir_op_fmul:
 442                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 443                 break;
 444         case nir_op_fsat:
 445                 alu.outmod = BIFROST_SAT; /* MOV */
 446                 break;
 447         case nir_op_fneg:
 448                 alu.src_neg[0] = true; /* MOV */
 449                 break;
 450         case nir_op_fabs:
 451                 alu.src_abs[0] = true; /* MOV */
 452                 break;
 453         case nir_op_fsub:
 454                 alu.src_neg[1] = true; /* ADD */
 455                 break;
 456         case nir_op_fmax:
 457         case nir_op_imax:
 458         case nir_op_umax:
 459                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 460                 break;
 461         case nir_op_frcp:
 462                 alu.op.special = BI_SPECIAL_FRCP;
 463                 break;
 464         case nir_op_frsq:
 465                 alu.op.special = BI_SPECIAL_FRSQ;
 466                 break;
 467         case nir_op_fsin:
 468                 alu.op.special = BI_SPECIAL_FSIN;
 469                 break;
 470         case nir_op_fcos:
 471                 alu.op.special = BI_SPECIAL_FCOS;
 472                 break;
 473         case nir_op_flt:
 474         case nir_op_ilt:
 475         case nir_op_fge:
 476         case nir_op_ige:
 477         case nir_op_feq:
 478         case nir_op_ieq:
 479         case nir_op_fne:
 480         case nir_op_ine:
 481                 alu.op.compare = bi_cond_for_nir(instr->op);
 482                 break;
 483         default:
 484                 break;
 485         }
 486
 487         bi_emit(ctx, alu);
 488 }
 489
 490 static void
 491 emit_instr(bi_context *ctx, struct nir_instr *instr)
 492 {
 493         switch (instr->type) {
 494         case nir_instr_type_load_const:
 495                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 496                 break;
 497
 498         case nir_instr_type_intrinsic:
 499                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 500                 break;
 501
 502         case nir_instr_type_alu:
 503                 emit_alu(ctx, nir_instr_as_alu(instr));
 504                 break;
 505
 506 #if 0
 507         case nir_instr_type_tex:
 508                 emit_tex(ctx, nir_instr_as_tex(instr));
 509                 break;
 510 #endif
 511
 512         case nir_instr_type_jump:
 513                 emit_jump(ctx, nir_instr_as_jump(instr));
 514                 break;
 515
 516         case nir_instr_type_ssa_undef:
 517                 /* Spurious */
 518                 break;
 519
 520         default:
 521                 //unreachable("Unhandled instruction type");
 522                 break;
 523         }
 524 }
 525
 526
 527
 528 static bi_block *
 529 create_empty_block(bi_context *ctx)
 530 {
 531         bi_block *blk = rzalloc(ctx, bi_block);
 532
 533         blk->predecessors = _mesa_set_create(blk,
 534                         _mesa_hash_pointer,
 535                         _mesa_key_pointer_equal);
 536
 537         blk->name = ctx->block_name_count++;
 538
 539         return blk;
 540 }
 541
 542 static void
 543 bi_block_add_successor(bi_block *block, bi_block *successor)
 544 {
 545         assert(block);
 546         assert(successor);
 547
 548         for (unsigned i = 0; i < ARRAY_SIZE(block->successors); ++i) {
 549                 if (block->successors[i]) {
 550                        if (block->successors[i] == successor)
 551                                return;
 552                        else
 553                                continue;
 554                 }
 555
 556                 block->successors[i] = successor;
 557                 _mesa_set_add(successor->predecessors, block);
 558                 return;
 559         }
 560
 561         unreachable("Too many successors");
 562 }
 563
 564 static void
 565 bi_schedule_barrier(bi_context *ctx)
 566 {
 567         bi_block *temp = ctx->after_block;
 568         ctx->after_block = create_empty_block(ctx);
 569         list_addtail(&ctx->after_block->link, &ctx->blocks);
 570         list_inithead(&ctx->after_block->instructions);
 571         bi_block_add_successor(ctx->current_block, ctx->after_block);
 572         ctx->current_block = ctx->after_block;
 573         ctx->after_block = temp;
 574 }
 575
 576 static bi_block *
 577 emit_block(bi_context *ctx, nir_block *block)
 578 {
 579         if (ctx->after_block) {
 580                 ctx->current_block = ctx->after_block;
 581                 ctx->after_block = NULL;
 582         } else {
 583                 ctx->current_block = create_empty_block(ctx);
 584         }
 585
 586         list_addtail(&ctx->current_block->link, &ctx->blocks);
 587         list_inithead(&ctx->current_block->instructions);
 588
 589         nir_foreach_instr(instr, block) {
 590                 emit_instr(ctx, instr);
 591                 ++ctx->instruction_count;
 592         }
 593
 594         return ctx->current_block;
 595 }
 596
 597 /* Emits an unconditional branch to the end of the current block, returning a
 598  * pointer so the user can fill in details */
 599
 600 static bi_instruction *
 601 bi_emit_branch(bi_context *ctx)
 602 {
 603         bi_instruction branch = {
 604                 .type = BI_BRANCH,
 605                 .branch = {
 606                         .cond = BI_COND_ALWAYS
 607                 }
 608         };
 609
 610         return bi_emit(ctx, branch);
 611 }
 612
 613 /* Sets a condition for a branch by examing the NIR condition. If we're
 614  * familiar with the condition, we unwrap it to fold it into the branch
 615  * instruction. Otherwise, we consume the condition directly. We
 616  * generally use 1-bit booleans which allows us to use small types for
 617  * the conditions.
 618  */
 619
 620 static void
 621 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 622 {
 623         /* TODO: Try to unwrap instead of always bailing */
 624         branch->src[0] = bir_src_index(cond);
 625         branch->src[1] = BIR_INDEX_ZERO;
 626         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 627         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 628 }
 629
 630 static void
 631 emit_if(bi_context *ctx, nir_if *nif)
 632 {
 633         bi_block *before_block = ctx->current_block;
 634
 635         /* Speculatively emit the branch, but we can't fill it in until later */
 636         bi_instruction *then_branch = bi_emit_branch(ctx);
 637         bi_set_branch_cond(then_branch, &nif->condition, true);
 638
 639         /* Emit the two subblocks. */
 640         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 641         bi_block *end_then_block = ctx->current_block;
 642
 643         /* Emit a jump from the end of the then block to the end of the else */
 644         bi_instruction *then_exit = bi_emit_branch(ctx);
 645
 646         /* Emit second block, and check if it's empty */
 647
 648         int count_in = ctx->instruction_count;
 649         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 650         bi_block *end_else_block = ctx->current_block;
 651         ctx->after_block = create_empty_block(ctx);
 652
 653         /* Now that we have the subblocks emitted, fix up the branches */
 654
 655         assert(then_block);
 656         assert(else_block);
 657
 658         if (ctx->instruction_count == count_in) {
 659                 /* The else block is empty, so don't emit an exit jump */
 660                 bi_remove_instruction(then_exit);
 661                 then_branch->branch.target = ctx->after_block;
 662         } else {
 663                 then_branch->branch.target = else_block;
 664                 then_exit->branch.target = ctx->after_block;
 665                 bi_block_add_successor(end_then_block, then_exit->branch.target);
 666         }
 667
 668         /* Wire up the successors */
 669
 670         bi_block_add_successor(before_block, then_branch->branch.target); /* then_branch */
 671
 672         bi_block_add_successor(before_block, then_block); /* fallthrough */
 673         bi_block_add_successor(end_else_block, ctx->after_block); /* fallthrough */
 674 }
 675
 676 static void
 677 emit_loop(bi_context *ctx, nir_loop *nloop)
 678 {
 679         /* Remember where we are */
 680         bi_block *start_block = ctx->current_block;
 681
 682         bi_block *saved_break = ctx->break_block;
 683         bi_block *saved_continue = ctx->continue_block;
 684
 685         ctx->continue_block = create_empty_block(ctx);
 686         ctx->break_block = create_empty_block(ctx);
 687         ctx->after_block = ctx->continue_block;
 688
 689         /* Emit the body itself */
 690         emit_cf_list(ctx, &nloop->body);
 691
 692         /* Branch back to loop back */
 693         bi_instruction *br_back = bi_emit_branch(ctx);
 694         br_back->branch.target = ctx->continue_block;
 695         bi_block_add_successor(start_block, ctx->continue_block);
 696         bi_block_add_successor(ctx->current_block, ctx->continue_block);
 697
 698         ctx->after_block = ctx->break_block;
 699
 700         /* Pop off */
 701         ctx->break_block = saved_break;
 702         ctx->continue_block = saved_continue;
 703         ++ctx->loop_count;
 704 }
 705
 706 static bi_block *
 707 emit_cf_list(bi_context *ctx, struct exec_list *list)
 708 {
 709         bi_block *start_block = NULL;
 710
 711         foreach_list_typed(nir_cf_node, node, node, list) {
 712                 switch (node->type) {
 713                 case nir_cf_node_block: {
 714                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 715
 716                         if (!start_block)
 717                                 start_block = block;
 718
 719                         break;
 720                 }
 721
 722                 case nir_cf_node_if:
 723                         emit_if(ctx, nir_cf_node_as_if(node));
 724                         break;
 725
 726                 case nir_cf_node_loop:
 727                         emit_loop(ctx, nir_cf_node_as_loop(node));
 728                         break;
 729
 730                 default:
 731                         unreachable("Unknown control flow");
 732                 }
 733         }
 734
 735         return start_block;
 736 }
 737
 738 static int
 739 glsl_type_size(const struct glsl_type *type, bool bindless)
 740 {
 741         return glsl_count_attribute_slots(type, false);
 742 }
 743
 744 static void
 745 bi_optimize_nir(nir_shader *nir)
 746 {
 747         bool progress;
 748         unsigned lower_flrp = 16 | 32 | 64;
 749
 750         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 751         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 752
 753         nir_lower_tex_options lower_tex_options = {
 754                 .lower_txs_lod = true,
 755                 .lower_txp = ~0,
 756                 .lower_tex_without_implicit_lod = true,
 757                 .lower_txd = true,
 758         };
 759
 760         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 761         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 762         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 763
 764         do {
 765                 progress = false;
 766
 767                 NIR_PASS(progress, nir, nir_lower_var_copies);
 768                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
 769
 770                 NIR_PASS(progress, nir, nir_copy_prop);
 771                 NIR_PASS(progress, nir, nir_opt_remove_phis);
 772                 NIR_PASS(progress, nir, nir_opt_dce);
 773                 NIR_PASS(progress, nir, nir_opt_dead_cf);
 774                 NIR_PASS(progress, nir, nir_opt_cse);
 775                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
 776                 NIR_PASS(progress, nir, nir_opt_algebraic);
 777                 NIR_PASS(progress, nir, nir_opt_constant_folding);
 778
 779                 if (lower_flrp != 0) {
 780                         bool lower_flrp_progress = false;
 781                         NIR_PASS(lower_flrp_progress,
 782                                  nir,
 783                                  nir_lower_flrp,
 784                                  lower_flrp,
 785                                  false /* always_precise */,
 786                                  nir->options->lower_ffma);
 787                         if (lower_flrp_progress) {
 788                                 NIR_PASS(progress, nir,
 789                                          nir_opt_constant_folding);
 790                                 progress = true;
 791                         }
 792
 793                         /* Nothing should rematerialize any flrps, so we only
 794                          * need to do this lowering once.
 795                          */
 796                         lower_flrp = 0;
 797                 }
 798
 799                 NIR_PASS(progress, nir, nir_opt_undef);
 800                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
 801                          nir_var_shader_in |
 802                          nir_var_shader_out |
 803                          nir_var_function_temp);
 804         } while (progress);
 805
 806         NIR_PASS(progress, nir, nir_opt_algebraic_late);
 807         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
 808         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 809         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 810
 811         /* Take us out of SSA */
 812         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
 813         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
 814
 815         /* We're a primary scalar architecture but there's enough vector that
 816          * we use a vector IR so let's not also deal with scalar hacks on top
 817          * of the vector hacks */
 818
 819         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
 820         NIR_PASS(progress, nir, nir_lower_vec_to_movs);
 821         NIR_PASS(progress, nir, nir_opt_dce);
 822 }
 823
 824 void
 825 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
 826 {
 827         bi_context *ctx = rzalloc(NULL, bi_context);
 828         ctx->nir = nir;
 829         ctx->stage = nir->info.stage;
 830         ctx->quirks = bifrost_get_quirks(product_id);
 831         list_inithead(&ctx->blocks);
 832
 833         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
 834          * (so we don't accidentally duplicate the epilogue since mesa/st has
 835          * messed with our I/O quite a bit already) */
 836
 837         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 838
 839         if (ctx->stage == MESA_SHADER_VERTEX) {
 840                 NIR_PASS_V(nir, nir_lower_viewport_transform);
 841                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
 842         }
 843
 844         NIR_PASS_V(nir, nir_split_var_copies);
 845         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
 846         NIR_PASS_V(nir, nir_lower_var_copies);
 847         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 848         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
 849         NIR_PASS_V(nir, nir_lower_ssbo);
 850
 851         bi_optimize_nir(nir);
 852         nir_print_shader(nir, stdout);
 853
 854         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
 855         program->sysval_count = ctx->sysvals.sysval_count;
 856         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
 857
 858         nir_foreach_function(func, nir) {
 859                 if (!func->impl)
 860                         continue;
 861
 862                 ctx->impl = func->impl;
 863                 emit_cf_list(ctx, &func->impl->body);
 864                 break; /* TODO: Multi-function shaders */
 865         }
 866
 867         bi_print_shader(ctx, stdout);
 868         bi_schedule(ctx);
 869
 870         ralloc_free(ctx);
 871 }