src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "util/imports.h"
  31 #include "compiler/nir/nir_builder.h"
  32
  33 #include "disassemble.h"
  34 #include "bifrost_compile.h"
  35 #include "bifrost_nir.h"
  36 #include "compiler.h"
  37 #include "bi_quirks.h"
  38 #include "bi_print.h"
  39
  40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  41 static bi_instruction *bi_emit_branch(bi_context *ctx);
  42 static void bi_schedule_barrier(bi_context *ctx);
  43
  44 static void
  45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  46 {
  47         bi_instruction *branch = bi_emit_branch(ctx);
  48
  49         switch (instr->type) {
  50         case nir_jump_break:
  51                 branch->branch.target = ctx->break_block;
  52                 break;
  53         case nir_jump_continue:
  54                 branch->branch.target = ctx->continue_block;
  55                 break;
  56         default:
  57                 unreachable("Unhandled jump type");
  58         }
  59
  60         pan_block_add_successor(&ctx->current_block->base, &branch->branch.target->base);
  61 }
  62
  63 /* Gets a bytemask for a complete vecN write */
  64 static unsigned
  65 bi_mask_for_channels_32(unsigned i)
  66 {
  67         return (1 << (4 * i)) - 1;
  68 }
  69
  70 static bi_instruction
  71 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  72 {
  73         bi_instruction load = {
  74                 .type = T,
  75                 .writemask = bi_mask_for_channels_32(instr->num_components),
  76                 .src = { BIR_INDEX_CONSTANT },
  77                 .src_types = { nir_type_uint32 },
  78                 .constant = { .u64 = nir_intrinsic_base(instr) },
  79         };
  80
  81         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  82
  83         if (info->has_dest)
  84                 load.dest = bir_dest_index(&instr->dest);
  85
  86         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  87                 load.dest_type = nir_intrinsic_type(instr);
  88
  89         nir_src *offset = nir_get_io_offset_src(instr);
  90
  91         if (nir_src_is_const(*offset))
  92                 load.constant.u64 += nir_src_as_uint(*offset);
  93         else
  94                 load.src[0] = bir_src_index(offset);
  95
  96         return load;
  97 }
  98
  99 static void
 100 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 101 {
 102         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
 103         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
 104         ins.load_vary.reuse = false; /* TODO */
 105         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
 106         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest);
 107
 108         if (nir_src_is_const(*nir_get_io_offset_src(instr))) {
 109                 /* Zero it out for direct */
 110                 ins.src[1] = BIR_INDEX_ZERO;
 111         } else {
 112                 /* R61 contains sample mask stuff, TODO RA XXX */
 113                 ins.src[1] = BIR_INDEX_REGISTER | 61;
 114         }
 115
 116         bi_emit(ctx, ins);
 117 }
 118
 119 static void
 120 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 121 {
 122         if (!ctx->emitted_atest) {
 123                 bi_instruction ins = {
 124                         .type = BI_ATEST,
 125                         .src = {
 126                                 BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 127                                 bir_src_index(&instr->src[0])
 128                         },
 129                         .src_types = {
 130                                 nir_type_uint32,
 131                                 nir_type_float32
 132                         },
 133                         .swizzle = {
 134                                 { 0 },
 135                                 { 3, 0 } /* swizzle out the alpha */
 136                         },
 137                         .dest = BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 138                         .dest_type = nir_type_uint32,
 139                         .writemask = 0xF
 140                 };
 141
 142                 bi_emit(ctx, ins);
 143                 bi_schedule_barrier(ctx);
 144                 ctx->emitted_atest = true;
 145         }
 146
 147         bi_instruction blend = {
 148                 .type = BI_BLEND,
 149                 .blend_location = nir_intrinsic_base(instr),
 150                 .src = {
 151                         bir_src_index(&instr->src[0]),
 152                         BIR_INDEX_REGISTER | 60 /* Can this be arbitrary? */,
 153                 },
 154                 .src_types = {
 155                         nir_type_float32,
 156                         nir_type_uint32
 157                 },
 158                 .swizzle = {
 159                         { 0, 1, 2, 3 },
 160                         { 0 }
 161                 },
 162                 .dest = BIR_INDEX_REGISTER | 48 /* Looks like magic */,
 163                 .dest_type = nir_type_uint32,
 164                 .writemask = 0xF
 165         };
 166
 167         bi_emit(ctx, blend);
 168         bi_schedule_barrier(ctx);
 169 }
 170
 171 static bi_instruction
 172 bi_load_with_r61(enum bi_class T, nir_intrinsic_instr *instr)
 173 {
 174         bi_instruction ld = bi_load(T, instr);
 175         ld.src[1] = BIR_INDEX_REGISTER | 61; /* TODO: RA */
 176         ld.src[2] = BIR_INDEX_REGISTER | 62;
 177         ld.src[3] = 0;
 178         ld.src_types[1] = nir_type_uint32;
 179         ld.src_types[2] = nir_type_uint32;
 180         ld.src_types[3] = nir_intrinsic_type(instr);
 181         return ld;
 182 }
 183
 184 static void
 185 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 186 {
 187         bi_instruction address = bi_load_with_r61(BI_LOAD_VAR_ADDRESS, instr);
 188         address.dest = bi_make_temp(ctx);
 189         address.dest_type = nir_type_uint32;
 190         address.writemask = (1 << 12) - 1;
 191
 192         unsigned nr = nir_intrinsic_src_components(instr, 0);
 193         assert(nir_intrinsic_write_mask(instr) == ((1 << nr) - 1));
 194
 195         bi_instruction st = {
 196                 .type = BI_STORE_VAR,
 197                 .src = {
 198                         bir_src_index(&instr->src[0]),
 199                         address.dest, address.dest, address.dest,
 200                 },
 201                 .src_types = {
 202                         nir_type_uint32,
 203                         nir_type_uint32, nir_type_uint32, nir_type_uint32,
 204                 },
 205                 .swizzle = {
 206                         { 0 },
 207                         { 0 }, { 1 }, { 2}
 208                 },
 209                 .store_channels = nr,
 210         };
 211
 212         for (unsigned i = 0; i < nr; ++i)
 213                 st.swizzle[0][i] = i;
 214
 215         bi_emit(ctx, address);
 216         bi_emit(ctx, st);
 217 }
 218
 219 static void
 220 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 221 {
 222         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 223         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 224
 225         /* TODO: Indirect access, since we need to multiply by the element
 226          * size. I believe we can get this lowering automatically via
 227          * nir_lower_io (as mul instructions) with the proper options, but this
 228          * is TODO */
 229         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 230         ld.constant.u64 += ctx->sysvals.sysval_count;
 231         ld.constant.u64 *= 16;
 232
 233         bi_emit(ctx, ld);
 234 }
 235
 236 static void
 237 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 238                 unsigned nr_components, unsigned offset)
 239 {
 240         nir_dest nir_dest;
 241
 242         /* Figure out which uniform this is */
 243         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 244         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 245
 246         /* Sysvals are prefix uniforms */
 247         unsigned uniform = ((uintptr_t) val) - 1;
 248
 249         /* Emit the read itself -- this is never indirect */
 250
 251         bi_instruction load = {
 252                 .type = BI_LOAD_UNIFORM,
 253                 .writemask = (1 << (nr_components * 4)) - 1,
 254                 .src = { BIR_INDEX_CONSTANT, BIR_INDEX_ZERO },
 255                 .src_types = { nir_type_uint32, nir_type_uint32 },
 256                 .constant = { (uniform * 16) + offset },
 257                 .dest = bir_dest_index(&nir_dest),
 258                 .dest_type = nir_type_uint32, /* TODO */
 259         };
 260
 261         bi_emit(ctx, load);
 262 }
 263
 264 static void
 265 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 266 {
 267
 268         switch (instr->intrinsic) {
 269         case nir_intrinsic_load_barycentric_pixel:
 270                 /* stub */
 271                 break;
 272         case nir_intrinsic_load_interpolated_input:
 273         case nir_intrinsic_load_input:
 274                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 275                         bi_emit_ld_vary(ctx, instr);
 276                 else if (ctx->stage == MESA_SHADER_VERTEX)
 277                         bi_emit(ctx, bi_load_with_r61(BI_LOAD_ATTR, instr));
 278                 else {
 279                         unreachable("Unsupported shader stage");
 280                 }
 281                 break;
 282
 283         case nir_intrinsic_store_output:
 284                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 285                         bi_emit_frag_out(ctx, instr);
 286                 else if (ctx->stage == MESA_SHADER_VERTEX)
 287                         bi_emit_st_vary(ctx, instr);
 288                 else
 289                         unreachable("Unsupported shader stage");
 290                 break;
 291
 292         case nir_intrinsic_load_uniform:
 293                 bi_emit_ld_uniform(ctx, instr);
 294                 break;
 295
 296         case nir_intrinsic_load_ssbo_address:
 297                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 298                 break;
 299
 300         case nir_intrinsic_get_buffer_size:
 301                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 302                 break;
 303
 304         case nir_intrinsic_load_viewport_scale:
 305         case nir_intrinsic_load_viewport_offset:
 306         case nir_intrinsic_load_num_work_groups:
 307         case nir_intrinsic_load_sampler_lod_parameters_pan:
 308                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 309                 break;
 310
 311         default:
 312                 /* todo */
 313                 break;
 314         }
 315 }
 316
 317 static void
 318 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 319 {
 320         /* Make sure we've been lowered */
 321         assert(instr->def.num_components == 1);
 322
 323         bi_instruction move = {
 324                 .type = BI_MOV,
 325                 .dest = bir_ssa_index(&instr->def),
 326                 .dest_type = instr->def.bit_size | nir_type_uint,
 327                 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
 328                 .src = {
 329                         BIR_INDEX_CONSTANT
 330                 },
 331                 .src_types = {
 332                         instr->def.bit_size | nir_type_uint,
 333                 },
 334                 .constant = {
 335                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 336                 }
 337         };
 338
 339         bi_emit(ctx, move);
 340 }
 341
 342 #define BI_CASE_CMP(op) \
 343         case op##8: \
 344         case op##16: \
 345         case op##32: \
 346
 347 static enum bi_class
 348 bi_class_for_nir_alu(nir_op op)
 349 {
 350         switch (op) {
 351         case nir_op_iadd:
 352         case nir_op_fadd:
 353         case nir_op_fsub:
 354                 return BI_ADD;
 355         case nir_op_isub:
 356                 return BI_ISUB;
 357
 358         BI_CASE_CMP(nir_op_flt)
 359         BI_CASE_CMP(nir_op_fge)
 360         BI_CASE_CMP(nir_op_feq)
 361         BI_CASE_CMP(nir_op_fne)
 362         BI_CASE_CMP(nir_op_ilt)
 363         BI_CASE_CMP(nir_op_ige)
 364         BI_CASE_CMP(nir_op_ieq)
 365         BI_CASE_CMP(nir_op_ine)
 366                 return BI_CMP;
 367
 368         case nir_op_b8csel:
 369         case nir_op_b16csel:
 370         case nir_op_b32csel:
 371                 return BI_CSEL;
 372
 373         case nir_op_i2i8:
 374         case nir_op_i2i16:
 375         case nir_op_i2i32:
 376         case nir_op_i2i64:
 377         case nir_op_u2u8:
 378         case nir_op_u2u16:
 379         case nir_op_u2u32:
 380         case nir_op_u2u64:
 381         case nir_op_f2i16:
 382         case nir_op_f2i32:
 383         case nir_op_f2i64:
 384         case nir_op_f2u16:
 385         case nir_op_f2u32:
 386         case nir_op_f2u64:
 387         case nir_op_i2f16:
 388         case nir_op_i2f32:
 389         case nir_op_i2f64:
 390         case nir_op_u2f16:
 391         case nir_op_u2f32:
 392         case nir_op_u2f64:
 393         case nir_op_f2f16:
 394         case nir_op_f2f32:
 395         case nir_op_f2f64:
 396         case nir_op_f2fmp:
 397                 return BI_CONVERT;
 398
 399         case nir_op_vec2:
 400         case nir_op_vec3:
 401         case nir_op_vec4:
 402                 return BI_COMBINE;
 403
 404         case nir_op_vec8:
 405         case nir_op_vec16:
 406                 unreachable("should've been lowered");
 407
 408         case nir_op_ffma:
 409         case nir_op_fmul:
 410                 return BI_FMA;
 411
 412         case nir_op_imin:
 413         case nir_op_imax:
 414         case nir_op_umin:
 415         case nir_op_umax:
 416         case nir_op_fmin:
 417         case nir_op_fmax:
 418                 return BI_MINMAX;
 419
 420         case nir_op_fsat:
 421         case nir_op_fneg:
 422         case nir_op_fabs:
 423                 return BI_FMOV;
 424         case nir_op_mov:
 425                 return BI_MOV;
 426
 427         case nir_op_fround_even:
 428         case nir_op_fceil:
 429         case nir_op_ffloor:
 430         case nir_op_ftrunc:
 431                 return BI_ROUND;
 432
 433         case nir_op_frcp:
 434         case nir_op_frsq:
 435                 return BI_SPECIAL;
 436
 437         default:
 438                 unreachable("Unknown ALU op");
 439         }
 440 }
 441
 442 /* Gets a bi_cond for a given NIR comparison opcode. In soft mode, it will
 443  * return BI_COND_ALWAYS as a sentinel if it fails to do so (when used for
 444  * optimizations). Otherwise it will bail (when used for primary code
 445  * generation). */
 446
 447 static enum bi_cond
 448 bi_cond_for_nir(nir_op op, bool soft)
 449 {
 450         switch (op) {
 451         BI_CASE_CMP(nir_op_flt)
 452         BI_CASE_CMP(nir_op_ilt)
 453                 return BI_COND_LT;
 454
 455         BI_CASE_CMP(nir_op_fge)
 456         BI_CASE_CMP(nir_op_ige)
 457                 return BI_COND_GE;
 458
 459         BI_CASE_CMP(nir_op_feq)
 460         BI_CASE_CMP(nir_op_ieq)
 461                 return BI_COND_EQ;
 462
 463         BI_CASE_CMP(nir_op_fne)
 464         BI_CASE_CMP(nir_op_ine)
 465                 return BI_COND_NE;
 466         default:
 467                 if (soft)
 468                         return BI_COND_ALWAYS;
 469                 else
 470                         unreachable("Invalid compare");
 471         }
 472 }
 473
 474 static void
 475 bi_copy_src(bi_instruction *alu, nir_alu_instr *instr, unsigned i, unsigned to,
 476                 unsigned *constants_left, unsigned *constant_shift)
 477 {
 478         unsigned bits = nir_src_bit_size(instr->src[i].src);
 479         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 480
 481         alu->src_types[to] = nir_op_infos[instr->op].input_types[i]
 482                 | bits;
 483
 484         /* Try to inline a constant */
 485         if (nir_src_is_const(instr->src[i].src) && *constants_left && (dest_bits == bits)) {
 486                 uint64_t mask = (1ull << dest_bits) - 1;
 487                 uint64_t cons = nir_src_as_uint(instr->src[i].src);
 488
 489                 /* Try to reuse a constant */
 490                 for (unsigned i = 0; i < (*constant_shift); i += dest_bits) {
 491                         if (((alu->constant.u64 >> i) & mask) == cons) {
 492                                 alu->src[to] = BIR_INDEX_CONSTANT | i;
 493                                 return;
 494                         }
 495                 }
 496
 497                 alu->constant.u64 |= cons << *constant_shift;
 498                 alu->src[to] = BIR_INDEX_CONSTANT | (*constant_shift);
 499                 --(*constants_left);
 500                 (*constant_shift) += dest_bits;
 501                 return;
 502         }
 503
 504         alu->src[to] = bir_src_index(&instr->src[i].src);
 505
 506         /* We assert scalarization above */
 507         alu->swizzle[to][0] = instr->src[i].swizzle[0];
 508 }
 509
 510 static void
 511 bi_fuse_csel_cond(bi_instruction *csel, nir_alu_src cond,
 512                 unsigned *constants_left, unsigned *constant_shift)
 513 {
 514         /* Bail for vector weirdness */
 515         if (cond.swizzle[0] != 0)
 516                 return;
 517
 518         if (!cond.src.is_ssa)
 519                 return;
 520
 521         nir_ssa_def *def = cond.src.ssa;
 522         nir_instr *parent = def->parent_instr;
 523
 524         if (parent->type != nir_instr_type_alu)
 525                 return;
 526
 527         nir_alu_instr *alu = nir_instr_as_alu(parent);
 528
 529         /* Try to match a condition */
 530         enum bi_cond bcond = bi_cond_for_nir(alu->op, true);
 531
 532         if (bcond == BI_COND_ALWAYS)
 533                 return;
 534
 535         /* We found one, let's fuse it in */
 536         csel->csel_cond = bcond;
 537         bi_copy_src(csel, alu, 0, 0, constants_left, constant_shift);
 538         bi_copy_src(csel, alu, 1, 1, constants_left, constant_shift);
 539 }
 540
 541 static void
 542 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 543 {
 544         /* Try some special functions */
 545         switch (instr->op) {
 546         case nir_op_fexp2:
 547                 bi_emit_fexp2(ctx, instr);
 548                 return;
 549         case nir_op_flog2:
 550                 bi_emit_flog2(ctx, instr);
 551                 return;
 552         default:
 553                 break;
 554         }
 555
 556         /* Otherwise, assume it's something we can handle normally */
 557         bi_instruction alu = {
 558                 .type = bi_class_for_nir_alu(instr->op),
 559                 .dest = bir_dest_index(&instr->dest.dest),
 560                 .dest_type = nir_op_infos[instr->op].output_type
 561                         | nir_dest_bit_size(instr->dest.dest),
 562         };
 563
 564         /* TODO: Implement lowering of special functions for older Bifrost */
 565         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 566
 567         if (instr->dest.dest.is_ssa) {
 568                 /* Construct a writemask */
 569                 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
 570                 unsigned comps = instr->dest.dest.ssa.num_components;
 571
 572                 if (alu.type != BI_COMBINE)
 573                         assert(comps == 1);
 574
 575                 unsigned bits = bits_per_comp * comps;
 576                 unsigned bytes = bits / 8;
 577                 alu.writemask = (1 << bytes) - 1;
 578         } else {
 579                 unsigned comp_mask = instr->dest.write_mask;
 580
 581                 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
 582                                 comp_mask);
 583         }
 584
 585         /* We inline constants as we go. This tracks how many constants have
 586          * been inlined, since we're limited to 64-bits of constants per
 587          * instruction */
 588
 589         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 590         unsigned constants_left = (64 / dest_bits);
 591         unsigned constant_shift = 0;
 592
 593         if (alu.type == BI_COMBINE)
 594                 constants_left = 0;
 595
 596         /* Copy sources */
 597
 598         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 599         assert(num_inputs <= ARRAY_SIZE(alu.src));
 600
 601         for (unsigned i = 0; i < num_inputs; ++i) {
 602                 unsigned f = 0;
 603
 604                 if (i && alu.type == BI_CSEL)
 605                         f++;
 606
 607                 bi_copy_src(&alu, instr, i, i + f, &constants_left, &constant_shift);
 608         }
 609
 610         /* Op-specific fixup */
 611         switch (instr->op) {
 612         case nir_op_fmul:
 613                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 614                 alu.src_types[2] = alu.src_types[1];
 615                 break;
 616         case nir_op_fsat:
 617                 alu.outmod = BIFROST_SAT; /* FMOV */
 618                 break;
 619         case nir_op_fneg:
 620                 alu.src_neg[0] = true; /* FMOV */
 621                 break;
 622         case nir_op_fabs:
 623                 alu.src_abs[0] = true; /* FMOV */
 624                 break;
 625         case nir_op_fsub:
 626                 alu.src_neg[1] = true; /* FADD */
 627                 break;
 628         case nir_op_fmax:
 629         case nir_op_imax:
 630         case nir_op_umax:
 631                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 632                 break;
 633         case nir_op_frcp:
 634                 alu.op.special = BI_SPECIAL_FRCP;
 635                 break;
 636         case nir_op_frsq:
 637                 alu.op.special = BI_SPECIAL_FRSQ;
 638                 break;
 639         BI_CASE_CMP(nir_op_flt)
 640         BI_CASE_CMP(nir_op_ilt)
 641         BI_CASE_CMP(nir_op_fge)
 642         BI_CASE_CMP(nir_op_ige)
 643         BI_CASE_CMP(nir_op_feq)
 644         BI_CASE_CMP(nir_op_ieq)
 645         BI_CASE_CMP(nir_op_fne)
 646         BI_CASE_CMP(nir_op_ine)
 647                 alu.op.compare = bi_cond_for_nir(instr->op, false);
 648                 break;
 649         case nir_op_fround_even:
 650                 alu.op.round = BI_ROUND_MODE;
 651                 alu.roundmode = BIFROST_RTE;
 652                 break;
 653         case nir_op_fceil:
 654                 alu.op.round = BI_ROUND_MODE;
 655                 alu.roundmode = BIFROST_RTP;
 656                 break;
 657         case nir_op_ffloor:
 658                 alu.op.round = BI_ROUND_MODE;
 659                 alu.roundmode = BIFROST_RTN;
 660                 break;
 661         case nir_op_ftrunc:
 662                 alu.op.round = BI_ROUND_MODE;
 663                 alu.roundmode = BIFROST_RTZ;
 664                 break;
 665         default:
 666                 break;
 667         }
 668
 669         if (alu.type == BI_CSEL) {
 670                 /* Default to csel3 */
 671                 alu.csel_cond = BI_COND_NE;
 672                 alu.src[1] = BIR_INDEX_ZERO;
 673                 alu.src_types[1] = alu.src_types[0];
 674
 675                 bi_fuse_csel_cond(&alu, instr->src[0],
 676                                 &constants_left, &constant_shift);
 677         }
 678
 679         bi_emit(ctx, alu);
 680 }
 681
 682 static void
 683 emit_instr(bi_context *ctx, struct nir_instr *instr)
 684 {
 685         switch (instr->type) {
 686         case nir_instr_type_load_const:
 687                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 688                 break;
 689
 690         case nir_instr_type_intrinsic:
 691                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 692                 break;
 693
 694         case nir_instr_type_alu:
 695                 emit_alu(ctx, nir_instr_as_alu(instr));
 696                 break;
 697
 698 #if 0
 699         case nir_instr_type_tex:
 700                 emit_tex(ctx, nir_instr_as_tex(instr));
 701                 break;
 702 #endif
 703
 704         case nir_instr_type_jump:
 705                 emit_jump(ctx, nir_instr_as_jump(instr));
 706                 break;
 707
 708         case nir_instr_type_ssa_undef:
 709                 /* Spurious */
 710                 break;
 711
 712         default:
 713                 //unreachable("Unhandled instruction type");
 714                 break;
 715         }
 716 }
 717
 718
 719
 720 static bi_block *
 721 create_empty_block(bi_context *ctx)
 722 {
 723         bi_block *blk = rzalloc(ctx, bi_block);
 724
 725         blk->base.predecessors = _mesa_set_create(blk,
 726                         _mesa_hash_pointer,
 727                         _mesa_key_pointer_equal);
 728
 729         blk->base.name = ctx->block_name_count++;
 730
 731         return blk;
 732 }
 733
 734 static void
 735 bi_schedule_barrier(bi_context *ctx)
 736 {
 737         bi_block *temp = ctx->after_block;
 738         ctx->after_block = create_empty_block(ctx);
 739         list_addtail(&ctx->after_block->base.link, &ctx->blocks);
 740         list_inithead(&ctx->after_block->base.instructions);
 741         pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base);
 742         ctx->current_block = ctx->after_block;
 743         ctx->after_block = temp;
 744 }
 745
 746 static bi_block *
 747 emit_block(bi_context *ctx, nir_block *block)
 748 {
 749         if (ctx->after_block) {
 750                 ctx->current_block = ctx->after_block;
 751                 ctx->after_block = NULL;
 752         } else {
 753                 ctx->current_block = create_empty_block(ctx);
 754         }
 755
 756         list_addtail(&ctx->current_block->base.link, &ctx->blocks);
 757         list_inithead(&ctx->current_block->base.instructions);
 758
 759         nir_foreach_instr(instr, block) {
 760                 emit_instr(ctx, instr);
 761                 ++ctx->instruction_count;
 762         }
 763
 764         return ctx->current_block;
 765 }
 766
 767 /* Emits an unconditional branch to the end of the current block, returning a
 768  * pointer so the user can fill in details */
 769
 770 static bi_instruction *
 771 bi_emit_branch(bi_context *ctx)
 772 {
 773         bi_instruction branch = {
 774                 .type = BI_BRANCH,
 775                 .branch = {
 776                         .cond = BI_COND_ALWAYS
 777                 }
 778         };
 779
 780         return bi_emit(ctx, branch);
 781 }
 782
 783 /* Sets a condition for a branch by examing the NIR condition. If we're
 784  * familiar with the condition, we unwrap it to fold it into the branch
 785  * instruction. Otherwise, we consume the condition directly. We
 786  * generally use 1-bit booleans which allows us to use small types for
 787  * the conditions.
 788  */
 789
 790 static void
 791 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 792 {
 793         /* TODO: Try to unwrap instead of always bailing */
 794         branch->src[0] = bir_src_index(cond);
 795         branch->src[1] = BIR_INDEX_ZERO;
 796         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 797         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 798 }
 799
 800 static void
 801 emit_if(bi_context *ctx, nir_if *nif)
 802 {
 803         bi_block *before_block = ctx->current_block;
 804
 805         /* Speculatively emit the branch, but we can't fill it in until later */
 806         bi_instruction *then_branch = bi_emit_branch(ctx);
 807         bi_set_branch_cond(then_branch, &nif->condition, true);
 808
 809         /* Emit the two subblocks. */
 810         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 811         bi_block *end_then_block = ctx->current_block;
 812
 813         /* Emit a jump from the end of the then block to the end of the else */
 814         bi_instruction *then_exit = bi_emit_branch(ctx);
 815
 816         /* Emit second block, and check if it's empty */
 817
 818         int count_in = ctx->instruction_count;
 819         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 820         bi_block *end_else_block = ctx->current_block;
 821         ctx->after_block = create_empty_block(ctx);
 822
 823         /* Now that we have the subblocks emitted, fix up the branches */
 824
 825         assert(then_block);
 826         assert(else_block);
 827
 828         if (ctx->instruction_count == count_in) {
 829                 /* The else block is empty, so don't emit an exit jump */
 830                 bi_remove_instruction(then_exit);
 831                 then_branch->branch.target = ctx->after_block;
 832         } else {
 833                 then_branch->branch.target = else_block;
 834                 then_exit->branch.target = ctx->after_block;
 835                 pan_block_add_successor(&end_then_block->base, &then_exit->branch.target->base);
 836         }
 837
 838         /* Wire up the successors */
 839
 840         pan_block_add_successor(&before_block->base, &then_branch->branch.target->base); /* then_branch */
 841
 842         pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */
 843         pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */
 844 }
 845
 846 static void
 847 emit_loop(bi_context *ctx, nir_loop *nloop)
 848 {
 849         /* Remember where we are */
 850         bi_block *start_block = ctx->current_block;
 851
 852         bi_block *saved_break = ctx->break_block;
 853         bi_block *saved_continue = ctx->continue_block;
 854
 855         ctx->continue_block = create_empty_block(ctx);
 856         ctx->break_block = create_empty_block(ctx);
 857         ctx->after_block = ctx->continue_block;
 858
 859         /* Emit the body itself */
 860         emit_cf_list(ctx, &nloop->body);
 861
 862         /* Branch back to loop back */
 863         bi_instruction *br_back = bi_emit_branch(ctx);
 864         br_back->branch.target = ctx->continue_block;
 865         pan_block_add_successor(&start_block->base, &ctx->continue_block->base);
 866         pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base);
 867
 868         ctx->after_block = ctx->break_block;
 869
 870         /* Pop off */
 871         ctx->break_block = saved_break;
 872         ctx->continue_block = saved_continue;
 873         ++ctx->loop_count;
 874 }
 875
 876 static bi_block *
 877 emit_cf_list(bi_context *ctx, struct exec_list *list)
 878 {
 879         bi_block *start_block = NULL;
 880
 881         foreach_list_typed(nir_cf_node, node, node, list) {
 882                 switch (node->type) {
 883                 case nir_cf_node_block: {
 884                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 885
 886                         if (!start_block)
 887                                 start_block = block;
 888
 889                         break;
 890                 }
 891
 892                 case nir_cf_node_if:
 893                         emit_if(ctx, nir_cf_node_as_if(node));
 894                         break;
 895
 896                 case nir_cf_node_loop:
 897                         emit_loop(ctx, nir_cf_node_as_loop(node));
 898                         break;
 899
 900                 default:
 901                         unreachable("Unknown control flow");
 902                 }
 903         }
 904
 905         return start_block;
 906 }
 907
 908 static int
 909 glsl_type_size(const struct glsl_type *type, bool bindless)
 910 {
 911         return glsl_count_attribute_slots(type, false);
 912 }
 913
 914 static void
 915 bi_optimize_nir(nir_shader *nir)
 916 {
 917         bool progress;
 918         unsigned lower_flrp = 16 | 32 | 64;
 919
 920         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 921         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 922
 923         nir_lower_tex_options lower_tex_options = {
 924                 .lower_txs_lod = true,
 925                 .lower_txp = ~0,
 926                 .lower_tex_without_implicit_lod = true,
 927                 .lower_txd = true,
 928         };
 929
 930         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 931         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 932         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 933
 934         do {
 935                 progress = false;
 936
 937                 NIR_PASS(progress, nir, nir_lower_var_copies);
 938                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
 939
 940                 NIR_PASS(progress, nir, nir_copy_prop);
 941                 NIR_PASS(progress, nir, nir_opt_remove_phis);
 942                 NIR_PASS(progress, nir, nir_opt_dce);
 943                 NIR_PASS(progress, nir, nir_opt_dead_cf);
 944                 NIR_PASS(progress, nir, nir_opt_cse);
 945                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
 946                 NIR_PASS(progress, nir, nir_opt_algebraic);
 947                 NIR_PASS(progress, nir, nir_opt_constant_folding);
 948
 949                 if (lower_flrp != 0) {
 950                         bool lower_flrp_progress = false;
 951                         NIR_PASS(lower_flrp_progress,
 952                                  nir,
 953                                  nir_lower_flrp,
 954                                  lower_flrp,
 955                                  false /* always_precise */,
 956                                  nir->options->lower_ffma);
 957                         if (lower_flrp_progress) {
 958                                 NIR_PASS(progress, nir,
 959                                          nir_opt_constant_folding);
 960                                 progress = true;
 961                         }
 962
 963                         /* Nothing should rematerialize any flrps, so we only
 964                          * need to do this lowering once.
 965                          */
 966                         lower_flrp = 0;
 967                 }
 968
 969                 NIR_PASS(progress, nir, nir_opt_undef);
 970                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
 971                          nir_var_shader_in |
 972                          nir_var_shader_out |
 973                          nir_var_function_temp);
 974         } while (progress);
 975
 976         NIR_PASS(progress, nir, nir_opt_algebraic_late);
 977         NIR_PASS(progress, nir, nir_lower_bool_to_int32);
 978         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
 979         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 980         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 981
 982         /* Take us out of SSA */
 983         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
 984         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
 985         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
 986 }
 987
 988 void
 989 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
 990 {
 991         bi_context *ctx = rzalloc(NULL, bi_context);
 992         ctx->nir = nir;
 993         ctx->stage = nir->info.stage;
 994         ctx->quirks = bifrost_get_quirks(product_id);
 995         list_inithead(&ctx->blocks);
 996
 997         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
 998          * (so we don't accidentally duplicate the epilogue since mesa/st has
 999          * messed with our I/O quite a bit already) */
1000
1001         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
1002
1003         if (ctx->stage == MESA_SHADER_VERTEX) {
1004                 NIR_PASS_V(nir, nir_lower_viewport_transform);
1005                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
1006         }
1007
1008         NIR_PASS_V(nir, nir_split_var_copies);
1009         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
1010         NIR_PASS_V(nir, nir_lower_var_copies);
1011         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
1012         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
1013         NIR_PASS_V(nir, nir_lower_ssbo);
1014
1015         bi_optimize_nir(nir);
1016         nir_print_shader(nir, stdout);
1017
1018         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
1019         program->sysval_count = ctx->sysvals.sysval_count;
1020         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
1021
1022         nir_foreach_function(func, nir) {
1023                 if (!func->impl)
1024                         continue;
1025
1026                 ctx->impl = func->impl;
1027                 emit_cf_list(ctx, &func->impl->body);
1028                 break; /* TODO: Multi-function shaders */
1029         }
1030
1031         bi_foreach_block(ctx, _block) {
1032                 bi_block *block = (bi_block *) _block;
1033                 bi_lower_combine(ctx, block);
1034         }
1035
1036         bool progress = false;
1037
1038         do {
1039                 progress = false;
1040
1041                 bi_foreach_block(ctx, _block) {
1042                         bi_block *block = (bi_block *) _block;
1043                         progress |= bi_opt_dead_code_eliminate(ctx, block);
1044                 }
1045         } while(progress);
1046
1047         bi_print_shader(ctx, stdout);
1048         bi_schedule(ctx);
1049         bi_register_allocate(ctx);
1050         bi_print_shader(ctx, stdout);
1051         bi_pack(ctx, &program->compiled);
1052         disassemble_bifrost(stdout, program->compiled.data, program->compiled.size, true);
1053
1054         ralloc_free(ctx);
1055 }