pan/midgard,bifrost: Expand nir_const_load_to_arr
[mesa.git] / src / panfrost / bifrost / bifrost_ops.h
1 /*
2 * Copyright (C) 2019 Ryan Houdek <Sonicadvance1@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #ifndef __bifrost_ops_h__
25 #define __bifrost_ops_h__
26
27 enum bifrost_ir_ops {
28 op_fma_f32 = 0x0,
29 op_fmul_f32,
30 op_fadd_f32,
31 op_frcp_fast_f32,
32 op_max_f32,
33 op_min_f32,
34 op_add_i32,
35 op_sub_i32,
36 op_imad,
37 op_mul_i32,
38 op_or_i32,
39 op_and_i32,
40 op_lshift_i32,
41 op_xor_i32,
42 op_rshift_i32,
43 op_arshift_i32,
44 op_csel_i32,
45 op_imin3_i32,
46 op_umin3_i32,
47 op_imax3_i32,
48 op_umax3_i32,
49
50 op_branch,
51
52 // unary
53 op_trunc,
54 op_ceil,
55 op_floor,
56 op_round,
57 op_roundeven,
58
59 op_mov,
60 op_movi,
61
62 op_ld_ubo_v1,
63 op_ld_ubo_v2,
64 op_ld_ubo_v3,
65 op_ld_ubo_v4,
66
67 op_ld_attr_v1,
68 op_ld_attr_v2,
69 op_ld_attr_v3,
70 op_ld_attr_v4,
71
72 op_ld_var_addr,
73 op_st_vary_v1,
74 op_st_vary_v2,
75 op_st_vary_v3,
76 op_st_vary_v4,
77
78 op_store_v1,
79 op_store_v2,
80 op_store_v3,
81 op_store_v4,
82
83 op_create_vector,
84 op_extract_element,
85 op_last,
86 };
87
88
89 enum branch_cond {
90 BR_COND_LT = 0,
91 BR_COND_LE = 1,
92 BR_COND_GE = 2,
93 BR_COND_GT = 3,
94 // Equal vs. not-equal determined by src0/src1 comparison
95 BR_COND_EQ = 4,
96 // floating-point comparisons
97 // Becomes UNE when you flip the arguments
98 BR_COND_OEQ = 5,
99 // TODO what happens when you flip the arguments?
100 BR_COND_OGT = 6,
101 BR_COND_OLT = 7,
102 };
103
104 enum branch_code {
105 BR_ALWAYS = 63,
106 };
107
108 enum csel_cond {
109 CSEL_NEQ_0 = 0,
110 CSEL_FEQ,
111 CSEL_FGTR,
112 CSEL_FGE,
113 CSEL_IEQ,
114 CSEL_IGT,
115 CSEL_IGE,
116 CSEL_UGT,
117 CSEL_UGE,
118 };
119
120 #endif