2 * Copyright (C) 2020 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
29 #include "util/half_float.h"
30 #include "bifrost/disassemble.h"
32 /* Instruction packing tests */
35 bit_test_single(struct panfrost_device
*dev
,
38 bool fma
, enum bit_debug debug
)
40 /* First, simulate the instruction */
41 struct bit_state s
= { 0 };
42 memcpy(s
.r
, input
, 16);
43 bit_step(&s
, ins
, fma
);
45 /* Next, wrap it up and pack it */
47 bi_instruction ldubo
= {
48 .type
= BI_LOAD_UNIFORM
,
57 .dest
= BIR_INDEX_REGISTER
| 0,
58 .dest_type
= nir_type_uint32
,
62 bi_instruction ldva
= {
63 .type
= BI_LOAD_VAR_ADDRESS
,
64 .writemask
= (1 << 12) - 1,
65 .dest
= BIR_INDEX_REGISTER
| 32,
66 .dest_type
= nir_type_uint32
,
69 BIR_INDEX_REGISTER
| 61,
70 BIR_INDEX_REGISTER
| 62,
84 BIR_INDEX_REGISTER
| 0,
85 ldva
.dest
, ldva
.dest
+ 1, ldva
.dest
+ 2,
89 nir_type_uint32
, nir_type_uint32
, nir_type_uint32
,
94 bi_context
*ctx
= rzalloc(NULL
, bi_context
);
95 ctx
->stage
= MESA_SHADER_VERTEX
;
97 bi_block
*blk
= rzalloc(ctx
, bi_block
);
98 blk
->scheduled
= true;
100 blk
->base
.predecessors
= _mesa_set_create(blk
,
102 _mesa_key_pointer_equal
);
104 list_inithead(&ctx
->blocks
);
105 list_addtail(&blk
->base
.link
, &ctx
->blocks
);
106 list_inithead(&blk
->clauses
);
108 bi_clause
*clauses
[4] = {
109 rzalloc(ctx
, bi_clause
),
110 rzalloc(ctx
, bi_clause
),
111 rzalloc(ctx
, bi_clause
),
112 rzalloc(ctx
, bi_clause
)
115 for (unsigned i
= 0; i
< 4; ++i
) {
116 clauses
[i
]->bundle_count
= 1;
117 list_addtail(&clauses
[i
]->link
, &blk
->clauses
);
118 clauses
[i
]->scoreboard_id
= (i
& 1);
121 clauses
[i
]->dependencies
= 1 << (~i
& 1);
122 clauses
[i
]->data_register_write_barrier
= true;
126 clauses
[0]->bundles
[0].add
= &ldubo
;
127 clauses
[0]->clause_type
= BIFROST_CLAUSE_UBO
;
130 clauses
[1]->bundles
[0].fma
= ins
;
132 clauses
[1]->bundles
[0].add
= ins
;
134 clauses
[0]->constant_count
= 1;
135 clauses
[1]->constant_count
= 1;
136 clauses
[1]->constants
[0] = ins
->constant
.u64
;
138 clauses
[2]->bundles
[0].add
= &ldva
;
139 clauses
[3]->bundles
[0].add
= &st
;
141 clauses
[2]->clause_type
= BIFROST_CLAUSE_UBO
;
142 clauses
[3]->clause_type
= BIFROST_CLAUSE_SSBO_STORE
;
144 panfrost_program prog
;
145 bi_pack(ctx
, &prog
.compiled
);
147 bool succ
= bit_vertex(dev
, prog
, input
, 16, NULL
, 0,
150 if (debug
>= BIT_DEBUG_ALL
|| (!succ
&& debug
>= BIT_DEBUG_FAIL
)) {
151 bi_print_shader(ctx
, stderr
);
152 disassemble_bifrost(stderr
, prog
.compiled
.data
, prog
.compiled
.size
, true);
158 /* Utilities for generating tests */
161 bit_generate_float4(float *mem
)
163 for (unsigned i
= 0; i
< 4; ++i
)
164 mem
[i
] = (float) ((rand() & 255) - 127) / 16.0;
168 bit_generate_half8(uint16_t *mem
)
170 for (unsigned i
= 0; i
< 8; ++i
)
171 mem
[i
] = _mesa_float_to_half(((float) (rand() & 255) - 127) / 16.0);
174 static bi_instruction
175 bit_ins(enum bi_class C
, unsigned argc
, nir_alu_type base
, unsigned size
)
177 nir_alu_type T
= base
| size
;
179 bi_instruction ins
= {
181 .dest
= BIR_INDEX_REGISTER
| 0,
185 for (unsigned i
= 0; i
< argc
; ++i
) {
186 ins
.src
[i
] = BIR_INDEX_REGISTER
| i
;
187 ins
.src_types
[i
] = T
;
193 /* Tests all 64 combinations of floating point modifiers for a given
194 * instruction / floating-type / test type */
197 bit_fmod_helper(struct panfrost_device
*dev
,
198 enum bi_class c
, unsigned size
, bool fma
,
199 uint32_t *input
, enum bit_debug debug
, unsigned op
)
201 bi_instruction ins
= bit_ins(c
, 2, nir_type_float
, size
);
203 for (unsigned outmod
= 0; outmod
< 4; ++outmod
) {
204 for (unsigned inmod
= 0; inmod
< 16; ++inmod
) {
207 ins
.src_abs
[0] = (inmod
& 0x1);
208 ins
.src_abs
[1] = (inmod
& 0x2);
209 ins
.src_neg
[0] = (inmod
& 0x4);
210 ins
.src_neg
[1] = (inmod
& 0x8);
212 /* Skip over tests that cannot run on FMA */
213 if (fma
&& (size
== 16) && ins
.src_abs
[0] && ins
.src_abs
[1])
216 if (!bit_test_single(dev
, &ins
, input
, fma
, debug
)) {
217 fprintf(stderr
, "FAIL: fmod.%s%u.%s%s.%u\n",
221 outmod
? bi_output_mod_name(outmod
) : ".none",
229 bit_fma_helper(struct panfrost_device
*dev
,
230 unsigned size
, uint32_t *input
, enum bit_debug debug
)
232 bi_instruction ins
= bit_ins(BI_FMA
, 3, nir_type_float
, size
);
234 for (unsigned outmod
= 0; outmod
< 4; ++outmod
) {
235 for (unsigned inmod
= 0; inmod
< 8; ++inmod
) {
237 ins
.src_neg
[0] = (inmod
& 0x1);
238 ins
.src_neg
[1] = (inmod
& 0x2);
239 ins
.src_neg
[2] = (inmod
& 0x4);
241 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
242 fprintf(stderr
, "FAIL: fma%u%s.%u\n",
244 outmod
? bi_output_mod_name(outmod
) : ".none",
252 bit_fma_mscale_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
254 bi_instruction ins
= bit_ins(BI_FMA
, 4, nir_type_float
, 32);
255 ins
.op
.mscale
= true;
256 ins
.src_types
[3] = nir_type_int32
;
257 ins
.src
[2] = ins
.src
[3]; /* Not enough ports! */
259 for (unsigned outmod
= 0; outmod
< 4; ++outmod
) {
260 for (unsigned inmod
= 0; inmod
< 8; ++inmod
) {
262 ins
.src_abs
[0] = (inmod
& 0x1);
263 ins
.src_neg
[1] = (inmod
& 0x2);
264 ins
.src_neg
[2] = (inmod
& 0x4);
266 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
267 fprintf(stderr
, "FAIL: fma_mscale%s.%u\n",
268 outmod
? bi_output_mod_name(outmod
) : ".none",
276 bit_csel_helper(struct panfrost_device
*dev
,
277 unsigned size
, uint32_t *input
, enum bit_debug debug
)
279 bi_instruction ins
= bit_ins(BI_CSEL
, 4, nir_type_uint
, size
);
281 /* SCHEDULER: We can only read 3 registers at once. */
282 ins
.src
[2] = ins
.src
[0];
284 for (enum bi_cond cond
= BI_COND_LT
; cond
<= BI_COND_NE
; ++cond
) {
285 ins
.csel_cond
= cond
;
287 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
288 fprintf(stderr
, "FAIL: csel%u.%s\n",
289 size
, bi_cond_name(cond
));
295 bit_special_helper(struct panfrost_device
*dev
,
296 unsigned size
, uint32_t *input
, enum bit_debug debug
)
298 bi_instruction ins
= bit_ins(BI_SPECIAL
, 1, nir_type_float
, size
);
300 for (enum bi_special_op op
= BI_SPECIAL_FRCP
; op
<= BI_SPECIAL_FRSQ
; ++op
) {
301 for (unsigned c
= 0; c
< ((size
== 16) ? 2 : 1); ++c
) {
303 ins
.swizzle
[0][0] = c
;
305 if (!bit_test_single(dev
, &ins
, input
, false, debug
)) {
306 fprintf(stderr
, "FAIL: special%u.%s\n",
307 size
, bi_special_op_name(op
));
314 bit_table_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
316 bi_instruction ins
= bit_ins(BI_TABLE
, 1, nir_type_float
, 32);
318 for (enum bi_table_op op
= 0; op
<= BI_TABLE_LOG2_U_OVER_U_1_LOW
; ++op
) {
321 if (!bit_test_single(dev
, &ins
, input
, false, debug
)) {
322 fprintf(stderr
, "FAIL: table.%s\n",
323 bi_table_op_name(op
));
329 bit_frexp_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
331 bi_instruction ins
= bit_ins(BI_FREXP
, 1, nir_type_float
, 32);
332 ins
.dest_type
= nir_type_int32
;
334 for (enum bi_frexp_op op
= 0; op
<= BI_FREXPE_LOG
; ++op
) {
337 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
338 fprintf(stderr
, "FAIL: frexp.%s\n",
339 bi_frexp_op_name(op
));
345 bit_reduce_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
347 bi_instruction ins
= bit_ins(BI_REDUCE_FMA
, 2, nir_type_float
, 32);
349 for (enum bi_reduce_op op
= 0; op
<= BI_REDUCE_ADD_FREXPM
; ++op
) {
352 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
353 fprintf(stderr
, "FAIL: reduce.%s\n",
354 bi_reduce_op_name(op
));
360 bit_convert_helper(struct panfrost_device
*dev
, unsigned from_size
,
361 unsigned to_size
, unsigned cx
, unsigned cy
, bool FMA
,
362 enum bifrost_roundmode roundmode
,
363 uint32_t *input
, enum bit_debug debug
)
365 bi_instruction ins
= {
367 .dest
= BIR_INDEX_REGISTER
| 0,
369 .src
= { BIR_INDEX_REGISTER
| 0 }
372 nir_alu_type Ts
[3] = { nir_type_float
, nir_type_uint
, nir_type_int
};
374 for (unsigned from_base
= 0; from_base
< 3; ++from_base
) {
375 for (unsigned to_base
= 0; to_base
< 3; ++to_base
) {
376 /* Discard invalid combinations.. */
377 if ((from_size
== to_size
) && (from_base
== to_base
))
380 /* Can't switch signedness */
381 if (from_base
&& to_base
)
384 /* No F16_TO_I32, etc */
385 if (from_size
!= to_size
&& from_base
== 0 && to_base
)
388 if (from_size
!= to_size
&& from_base
&& to_base
== 0)
391 /* No need, just ignore the upper half */
392 if (from_size
> to_size
&& from_base
== to_base
&& from_base
)
395 ins
.dest_type
= Ts
[to_base
] | to_size
;
396 ins
.src_types
[0] = Ts
[from_base
] | from_size
;
397 ins
.roundmode
= roundmode
;
398 ins
.swizzle
[0][0] = cx
;
399 ins
.swizzle
[0][1] = cy
;
401 if (!bit_test_single(dev
, &ins
, input
, FMA
, debug
)) {
402 fprintf(stderr
, "FAIL: convert.%u-%u.%u-%u.%u%u\n",
403 from_base
, from_size
,
412 bit_packing(struct panfrost_device
*dev
, enum bit_debug debug
)
417 bit_generate_float4(input32
);
418 bit_generate_half8(input16
);
420 for (unsigned sz
= 16; sz
<= 32; sz
*= 2) {
422 (sz
== 16) ? (uint32_t *) input16
:
423 (uint32_t *) input32
;
425 bit_fmod_helper(dev
, BI_ADD
, sz
, true, input
, debug
, 0);
428 bit_fmod_helper(dev
, BI_ADD
, sz
, false, input
, debug
, 0);
429 bit_fmod_helper(dev
, BI_MINMAX
, sz
, false, input
, debug
, BI_MINMAX_MIN
);
430 bit_fmod_helper(dev
, BI_MINMAX
, sz
, false, input
, debug
, BI_MINMAX_MAX
);
433 bit_fma_helper(dev
, sz
, input
, debug
);
436 for (unsigned sz
= 32; sz
<= 32; sz
*= 2)
437 bit_csel_helper(dev
, sz
, (uint32_t *) input32
, debug
);
439 float special
[4] = { 0.9 };
440 uint32_t special16
[4] = { _mesa_float_to_half(special
[0]) | (_mesa_float_to_half(0.2) << 16) };
442 bit_table_helper(dev
, (uint32_t *) special
, debug
);
444 for (unsigned sz
= 16; sz
<= 32; sz
*= 2) {
446 (sz
== 16) ? special16
:
447 (uint32_t *) special
;
449 bit_special_helper(dev
, sz
, input
, debug
);
452 for (unsigned rm
= 0; rm
< 4; ++rm
) {
453 bit_convert_helper(dev
, 32, 32, 0, 0, false, rm
, (uint32_t *) input32
, debug
);
455 for (unsigned c
= 0; c
< 2; ++c
)
456 bit_convert_helper(dev
, 32, 16, c
, 0, false, rm
, (uint32_t *) input32
, debug
);
458 bit_convert_helper(dev
, 16, 32, 0, 0, false, rm
, (uint32_t *) input16
, debug
);
460 for (unsigned c
= 0; c
< 4; ++c
)
461 bit_convert_helper(dev
, 16, 16, c
& 1, c
>> 1, false, rm
, (uint32_t *) input16
, debug
);
464 bit_frexp_helper(dev
, (uint32_t *) input32
, debug
);
465 bit_reduce_helper(dev
, (uint32_t *) input32
, debug
);
467 uint32_t mscale_input
[4];
468 memcpy(mscale_input
, input32
, sizeof(input32
));
469 mscale_input
[3] = 0x7;
470 bit_fma_mscale_helper(dev
, mscale_input
, debug
);