2 * Copyright (C) 2020 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
29 #include "util/half_float.h"
30 #include "bifrost/disassemble.h"
32 /* Instruction packing tests */
35 bit_test_single(struct panfrost_device
*dev
,
38 bool fma
, enum bit_debug debug
)
40 /* First, simulate the instruction */
41 struct bit_state s
= { 0 };
42 memcpy(s
.r
, input
, 16);
43 bit_step(&s
, ins
, fma
);
45 /* Next, wrap it up and pack it */
47 bi_instruction ldubo
= {
48 .type
= BI_LOAD_UNIFORM
,
57 .dest
= BIR_INDEX_REGISTER
| 0,
58 .dest_type
= nir_type_uint32
,
62 bi_instruction ldva
= {
63 .type
= BI_LOAD_VAR_ADDRESS
,
65 .dest
= BIR_INDEX_REGISTER
| 32,
66 .dest_type
= nir_type_uint32
,
69 BIR_INDEX_REGISTER
| 61,
70 BIR_INDEX_REGISTER
| 62,
84 BIR_INDEX_REGISTER
| 0,
85 ldva
.dest
, ldva
.dest
+ 1, ldva
.dest
+ 2,
89 nir_type_uint32
, nir_type_uint32
, nir_type_uint32
,
94 bi_context
*ctx
= rzalloc(NULL
, bi_context
);
95 ctx
->stage
= MESA_SHADER_VERTEX
;
97 bi_block
*blk
= rzalloc(ctx
, bi_block
);
98 blk
->scheduled
= true;
100 blk
->base
.predecessors
= _mesa_set_create(blk
,
102 _mesa_key_pointer_equal
);
104 list_inithead(&ctx
->blocks
);
105 list_addtail(&blk
->base
.link
, &ctx
->blocks
);
106 list_inithead(&blk
->clauses
);
108 bi_clause
*clauses
[4] = {
109 rzalloc(ctx
, bi_clause
),
110 rzalloc(ctx
, bi_clause
),
111 rzalloc(ctx
, bi_clause
),
112 rzalloc(ctx
, bi_clause
)
115 for (unsigned i
= 0; i
< 4; ++i
) {
116 clauses
[i
]->bundle_count
= 1;
117 list_addtail(&clauses
[i
]->link
, &blk
->clauses
);
118 clauses
[i
]->scoreboard_id
= (i
& 1);
121 clauses
[i
]->dependencies
= 1 << (~i
& 1);
122 clauses
[i
]->data_register_write_barrier
= true;
126 clauses
[0]->bundles
[0].add
= &ldubo
;
127 clauses
[0]->clause_type
= BIFROST_CLAUSE_UBO
;
130 clauses
[1]->bundles
[0].fma
= ins
;
132 clauses
[1]->bundles
[0].add
= ins
;
134 clauses
[0]->constant_count
= 1;
135 clauses
[1]->constant_count
= 1;
136 clauses
[1]->constants
[0] = ins
->constant
.u64
;
138 clauses
[2]->bundles
[0].add
= &ldva
;
139 clauses
[3]->bundles
[0].add
= &st
;
141 clauses
[2]->clause_type
= BIFROST_CLAUSE_UBO
;
142 clauses
[3]->clause_type
= BIFROST_CLAUSE_SSBO_STORE
;
144 panfrost_program prog
;
145 bi_pack(ctx
, &prog
.compiled
);
147 bool succ
= bit_vertex(dev
, prog
, input
, 16, NULL
, 0,
150 if (debug
>= BIT_DEBUG_ALL
|| (!succ
&& debug
>= BIT_DEBUG_FAIL
)) {
151 bi_print_shader(ctx
, stderr
);
152 disassemble_bifrost(stderr
, prog
.compiled
.data
, prog
.compiled
.size
, true);
158 /* Utilities for generating tests */
161 bit_generate_float4(float *mem
)
163 for (unsigned i
= 0; i
< 4; ++i
)
164 mem
[i
] = (float) ((rand() & 255) - 127) / 16.0;
168 bit_generate_half8(uint16_t *mem
)
170 for (unsigned i
= 0; i
< 8; ++i
)
171 mem
[i
] = _mesa_float_to_half(((float) (rand() & 255) - 127) / 16.0);
174 static bi_instruction
175 bit_ins(enum bi_class C
, unsigned argc
, nir_alu_type base
, unsigned size
)
177 nir_alu_type T
= base
| size
;
179 bi_instruction ins
= {
181 .dest
= BIR_INDEX_REGISTER
| 0,
185 for (unsigned i
= 0; i
< argc
; ++i
) {
186 ins
.src
[i
] = BIR_INDEX_REGISTER
| i
;
187 ins
.src_types
[i
] = T
;
193 /* Tests all 64 combinations of floating point modifiers for a given
194 * instruction / floating-type / test type */
197 bit_fmod_helper(struct panfrost_device
*dev
,
198 enum bi_class c
, unsigned size
, bool fma
,
199 uint32_t *input
, enum bit_debug debug
, unsigned op
)
201 bi_instruction ins
= bit_ins(c
, 2, nir_type_float
, size
);
203 bool fp16
= (size
== 16);
204 bool has_outmods
= fma
|| !fp16
;
206 for (unsigned outmod
= 0; outmod
< (has_outmods
? 4 : 1); ++outmod
) {
207 for (unsigned inmod
= 0; inmod
< 16; ++inmod
) {
210 ins
.src_abs
[0] = (inmod
& 0x1);
211 ins
.src_abs
[1] = (inmod
& 0x2);
212 ins
.src_neg
[0] = (inmod
& 0x4);
213 ins
.src_neg
[1] = (inmod
& 0x8);
215 /* Skip over tests that cannot run */
216 if ((fma
|| c
== BI_MINMAX
) && fp16
&& ins
.src_abs
[0] && ins
.src_abs
[1])
219 if (!bit_test_single(dev
, &ins
, input
, fma
, debug
)) {
220 fprintf(stderr
, "FAIL: fmod.%s%u.%s%s.%u\n",
224 outmod
? bi_output_mod_name(outmod
) : ".none",
232 bit_fma_helper(struct panfrost_device
*dev
,
233 unsigned size
, uint32_t *input
, enum bit_debug debug
)
235 bi_instruction ins
= bit_ins(BI_FMA
, 3, nir_type_float
, size
);
237 for (unsigned outmod
= 0; outmod
< 4; ++outmod
) {
238 for (unsigned inmod
= 0; inmod
< 8; ++inmod
) {
240 ins
.src_neg
[0] = (inmod
& 0x1);
241 ins
.src_neg
[1] = (inmod
& 0x2);
242 ins
.src_neg
[2] = (inmod
& 0x4);
244 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
245 fprintf(stderr
, "FAIL: fma%u%s.%u\n",
247 outmod
? bi_output_mod_name(outmod
) : ".none",
255 bit_fma_mscale_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
257 bi_instruction ins
= bit_ins(BI_FMA
, 4, nir_type_float
, 32);
258 ins
.op
.mscale
= true;
259 ins
.src_types
[3] = nir_type_int32
;
260 ins
.src
[2] = ins
.src
[3]; /* Not enough ports! */
262 for (unsigned outmod
= 0; outmod
< 4; ++outmod
) {
263 for (unsigned inmod
= 0; inmod
< 8; ++inmod
) {
265 ins
.src_abs
[0] = (inmod
& 0x1);
266 ins
.src_neg
[1] = (inmod
& 0x2);
267 ins
.src_neg
[2] = (inmod
& 0x4);
269 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
270 fprintf(stderr
, "FAIL: fma_mscale%s.%u\n",
271 outmod
? bi_output_mod_name(outmod
) : ".none",
279 bit_csel_helper(struct panfrost_device
*dev
,
280 unsigned size
, uint32_t *input
, enum bit_debug debug
)
282 bi_instruction ins
= bit_ins(BI_CSEL
, 4, nir_type_uint
, size
);
284 /* SCHEDULER: We can only read 3 registers at once. */
285 ins
.src
[2] = ins
.src
[0];
287 for (enum bi_cond cond
= BI_COND_LT
; cond
<= BI_COND_NE
; ++cond
) {
290 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
291 fprintf(stderr
, "FAIL: csel%u.%s\n",
292 size
, bi_cond_name(cond
));
298 bit_special_helper(struct panfrost_device
*dev
,
299 unsigned size
, uint32_t *input
, enum bit_debug debug
)
301 bi_instruction ins
= bit_ins(BI_SPECIAL
, 2, nir_type_float
, size
);
302 uint32_t exp_input
[4];
304 for (enum bi_special_op op
= BI_SPECIAL_FRCP
; op
<= BI_SPECIAL_EXP2_LOW
; ++op
) {
305 if (op
== BI_SPECIAL_EXP2_LOW
) {
306 /* exp2 only supported in fp32 mode */
310 /* Give expected input */
311 exp_input
[1] = input
[0];
312 float *ff
= (float *) input
;
313 exp_input
[0] = (int) (ff
[0] * (1 << 24));
316 for (unsigned c
= 0; c
< ((size
== 16) ? 2 : 1); ++c
) {
318 ins
.swizzle
[0][0] = c
;
320 if (!bit_test_single(dev
, &ins
,
321 op
== BI_SPECIAL_EXP2_LOW
? exp_input
: input
,
323 fprintf(stderr
, "FAIL: special%u.%s\n",
324 size
, bi_special_op_name(op
));
331 bit_table_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
333 bi_instruction ins
= bit_ins(BI_TABLE
, 1, nir_type_float
, 32);
335 for (enum bi_table_op op
= 0; op
<= BI_TABLE_LOG2_U_OVER_U_1_LOW
; ++op
) {
338 if (!bit_test_single(dev
, &ins
, input
, false, debug
)) {
339 fprintf(stderr
, "FAIL: table.%s\n",
340 bi_table_op_name(op
));
346 bit_frexp_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
348 bi_instruction ins
= bit_ins(BI_FREXP
, 1, nir_type_float
, 32);
349 ins
.dest_type
= nir_type_int32
;
351 for (enum bi_frexp_op op
= 0; op
<= BI_FREXPE_LOG
; ++op
) {
354 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
355 fprintf(stderr
, "FAIL: frexp.%s\n",
356 bi_frexp_op_name(op
));
362 bit_reduce_helper(struct panfrost_device
*dev
, uint32_t *input
, enum bit_debug debug
)
364 bi_instruction ins
= bit_ins(BI_REDUCE_FMA
, 2, nir_type_float
, 32);
366 for (enum bi_reduce_op op
= 0; op
<= BI_REDUCE_ADD_FREXPM
; ++op
) {
369 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
370 fprintf(stderr
, "FAIL: reduce.%s\n",
371 bi_reduce_op_name(op
));
377 bit_select_helper(struct panfrost_device
*dev
, uint32_t *input
, unsigned size
, enum bit_debug debug
)
379 unsigned C
= 32 / size
;
380 bi_instruction ins
= bit_ins(BI_SELECT
, C
, nir_type_uint
, 32);
382 for (unsigned c
= 0; c
< C
; ++c
)
383 ins
.src_types
[c
] = nir_type_uint
| size
;
386 /* SCHEDULER: We can only read 3 registers at once. */
387 ins
.src
[2] = ins
.src
[0];
390 /* Each argument has swizzle {lo, hi} so 2^C options */
391 unsigned hi
= (size
== 16) ? 1 : 2;
393 for (unsigned add
= 0; add
< ((size
== 16) ? 2 : 1); ++add
) {
394 for (unsigned swizzle
= 0; swizzle
< (1 << C
); ++swizzle
) {
395 for (unsigned i
= 0; i
< C
; ++i
)
396 ins
.swizzle
[i
][0] = ((swizzle
>> i
) & 1) ? hi
: 0;
398 if (!bit_test_single(dev
, &ins
, input
, !add
, debug
)) {
399 fprintf(stderr
, "FAIL: select.%u.%u\n",
407 bit_fcmp_helper(struct panfrost_device
*dev
, uint32_t *input
, unsigned size
, enum bit_debug debug
, bool FMA
)
409 bi_instruction ins
= bit_ins(BI_CMP
, 2, nir_type_float
, size
);
410 ins
.dest_type
= nir_type_uint
| size
;
412 /* 16-bit has swizzles and abs. 32-bit has abs/neg mods. */
413 unsigned max_mods
= (size
== 16) ? 64 : (size
== 32) ? 16 : 1;
415 for (enum bi_cond cond
= BI_COND_LT
; cond
<= BI_COND_NE
; ++cond
) {
416 for (unsigned mods
= 0; mods
< max_mods
; ++mods
) {
420 for (unsigned i
= 0; i
< 2; ++i
) {
421 ins
.swizzle
[i
][0] = ((mods
>> (i
* 2)) & 1) ? 1 : 0;
422 ins
.swizzle
[i
][1] = ((mods
>> (i
* 2)) & 2) ? 1 : 0;
425 ins
.src_abs
[0] = (mods
& 16) ? true : false;
426 ins
.src_abs
[1] = (mods
& 32) ? true : false;
427 } else if (size
== 8) {
428 for (unsigned i
= 0; i
< 2; ++i
) {
429 for (unsigned j
= 0; j
< 4; ++j
)
430 ins
.swizzle
[i
][j
] = j
;
432 } else if (size
== 32) {
433 ins
.src_abs
[0] = (mods
& 1) ? true : false;
434 ins
.src_abs
[1] = (mods
& 2) ? true : false;
435 ins
.src_neg
[0] = (mods
& 4) ? true : false;
436 ins
.src_neg
[1] = (mods
& 8) ? true : false;
439 if (!bit_test_single(dev
, &ins
, input
, FMA
, debug
)) {
440 fprintf(stderr
, "FAIL: cmp.%s.%u.%u.%u\n",
441 FMA
? "fma" : "add", size
, mods
, cond
);
448 bit_convert_helper(struct panfrost_device
*dev
, unsigned from_size
,
449 unsigned to_size
, unsigned cx
, unsigned cy
, bool FMA
,
450 enum bifrost_roundmode roundmode
,
451 uint32_t *input
, enum bit_debug debug
)
453 bi_instruction ins
= {
455 .dest
= BIR_INDEX_REGISTER
| 0,
456 .src
= { BIR_INDEX_REGISTER
| 0 }
459 nir_alu_type Ts
[3] = { nir_type_float
, nir_type_uint
, nir_type_int
};
461 for (unsigned from_base
= 0; from_base
< 3; ++from_base
) {
462 for (unsigned to_base
= 0; to_base
< 3; ++to_base
) {
463 /* Discard invalid combinations.. */
464 if ((from_size
== to_size
) && (from_base
== to_base
))
467 /* Can't switch signedness */
468 if (from_base
&& to_base
)
471 /* No F16_TO_I32, etc */
472 if (from_size
!= to_size
&& from_base
== 0 && to_base
)
475 if (from_size
!= to_size
&& from_base
&& to_base
== 0)
478 /* No need, just ignore the upper half */
479 if (from_size
> to_size
&& from_base
== to_base
&& from_base
)
482 ins
.dest_type
= Ts
[to_base
] | to_size
;
483 ins
.src_types
[0] = Ts
[from_base
] | from_size
;
484 ins
.roundmode
= roundmode
;
485 ins
.swizzle
[0][0] = cx
;
486 ins
.swizzle
[0][1] = cy
;
488 if (!bit_test_single(dev
, &ins
, input
, FMA
, debug
)) {
489 fprintf(stderr
, "FAIL: convert.%u-%u.%u-%u.%u%u\n",
490 from_base
, from_size
,
499 bit_constant_helper(struct panfrost_device
*dev
,
500 uint32_t *input
, enum bit_debug debug
)
502 enum bi_class C
[3] = { BI_MOV
, BI_ADD
, BI_FMA
};
504 for (unsigned doubled
= 0; doubled
< 2; ++doubled
) {
505 for (unsigned count
= 1; count
<= 3; ++count
) {
506 bi_instruction ins
= bit_ins(C
[count
- 1], count
, nir_type_float
, 32);
508 ins
.src
[0] = BIR_INDEX_CONSTANT
| 0;
509 ins
.src
[1] = (count
>= 2) ? BIR_INDEX_CONSTANT
| (doubled
? 32 : 0) : 0;
510 ins
.src
[2] = (count
>= 3) ? BIR_INDEX_ZERO
: 0;
512 ins
.constant
.u64
= doubled
?
513 0x3f800000ull
| (0x3f000000ull
<< 32ull) :
516 if (!bit_test_single(dev
, &ins
, input
, true, debug
)) {
517 fprintf(stderr
, "FAIL: constants.%s.%u\n",
518 doubled
? "two" : "one",
526 bit_packing(struct panfrost_device
*dev
, enum bit_debug debug
)
531 bit_generate_float4(input32
);
532 bit_generate_half8(input16
);
534 bit_constant_helper(dev
, (uint32_t *) input32
, debug
);
536 for (unsigned sz
= 16; sz
<= 32; sz
*= 2) {
538 (sz
== 16) ? (uint32_t *) input16
:
539 (uint32_t *) input32
;
541 bit_fmod_helper(dev
, BI_ADD
, sz
, true, input
, debug
, 0);
542 bit_fmod_helper(dev
, BI_ADD
, sz
, false, input
, debug
, 0);
544 bit_fmod_helper(dev
, BI_MINMAX
, sz
, false, input
, debug
, BI_MINMAX_MIN
);
545 bit_fmod_helper(dev
, BI_MINMAX
, sz
, false, input
, debug
, BI_MINMAX_MAX
);
547 bit_fma_helper(dev
, sz
, input
, debug
);
550 for (unsigned sz
= 32; sz
<= 32; sz
*= 2)
551 bit_csel_helper(dev
, sz
, (uint32_t *) input32
, debug
);
553 float special
[4] = { 0.9 };
554 uint32_t special16
[4] = { _mesa_float_to_half(special
[0]) | (_mesa_float_to_half(0.2) << 16) };
556 bit_table_helper(dev
, (uint32_t *) special
, debug
);
558 for (unsigned sz
= 16; sz
<= 32; sz
*= 2) {
560 (sz
== 16) ? special16
:
561 (uint32_t *) special
;
563 bit_special_helper(dev
, sz
, input
, debug
);
566 for (unsigned rm
= 0; rm
< 4; ++rm
) {
567 bit_convert_helper(dev
, 32, 32, 0, 0, false, rm
, (uint32_t *) input32
, debug
);
569 for (unsigned c
= 0; c
< 2; ++c
)
570 bit_convert_helper(dev
, 32, 16, c
, 0, false, rm
, (uint32_t *) input32
, debug
);
572 bit_convert_helper(dev
, 16, 32, 0, 0, false, rm
, (uint32_t *) input16
, debug
);
574 for (unsigned c
= 0; c
< 4; ++c
)
575 bit_convert_helper(dev
, 16, 16, c
& 1, c
>> 1, false, rm
, (uint32_t *) input16
, debug
);
578 bit_frexp_helper(dev
, (uint32_t *) input32
, debug
);
579 bit_reduce_helper(dev
, (uint32_t *) input32
, debug
);
581 uint32_t mscale_input
[4];
582 memcpy(mscale_input
, input32
, sizeof(input32
));
583 mscale_input
[3] = 0x7;
584 bit_fma_mscale_helper(dev
, mscale_input
, debug
);
586 for (unsigned sz
= 8; sz
<= 16; sz
*= 2) {
587 bit_select_helper(dev
, (uint32_t *) input32
, sz
, debug
);
590 bit_fcmp_helper(dev
, (uint32_t *) input32
, 32, debug
, true);
591 bit_fcmp_helper(dev
, (uint32_t *) input32
, 16, debug
, true);