1 /**************************************************************************
3 * Copyright 2018-2019 Alyssa Rosenzweig
4 * Copyright 2018-2019 Collabora, Ltd.
5 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
34 #include "renderonly/renderonly.h"
35 #include "util/u_dynarray.h"
36 #include "util/bitset.h"
38 #include "util/list.h"
39 #include "util/sparse_array.h"
41 #include <panfrost-misc.h>
44 #define PAN_MAX_CONST_BUFFERS 16
46 /* Transient slab size. This is a balance between fragmentation against cache
47 * locality and ease of bookkeeping */
49 #define TRANSIENT_SLAB_PAGES (32) /* 128kb */
50 #define TRANSIENT_SLAB_SIZE (4096 * TRANSIENT_SLAB_PAGES)
52 /* Maximum number of transient slabs so we don't need dynamic arrays. Most
53 * interesting Mali boards are 4GB RAM max, so if the entire RAM was filled
54 * with transient slabs, you could never exceed (4GB / TRANSIENT_SLAB_SIZE)
55 * allocations anyway. By capping, we can use a fixed-size bitset for tracking
56 * free slabs, eliminating quite a bit of complexity. We can pack the free
57 * state of 8 slabs into a single byte, so for 128kb transient slabs the bitset
58 * occupies a cheap 4kb of memory */
60 #define MAX_TRANSIENT_SLABS (1024*1024 / TRANSIENT_SLAB_PAGES)
62 /* How many power-of-two levels in the BO cache do we want? 2^12
63 * minimum chosen as it is the page size that all allocations are
66 #define MIN_BO_CACHE_BUCKET (12) /* 2^12 = 4KB */
67 #define MAX_BO_CACHE_BUCKET (22) /* 2^22 = 4MB */
69 /* Fencepost problem, hence the off-by-one */
70 #define NR_BO_CACHE_BUCKETS (MAX_BO_CACHE_BUCKET - MIN_BO_CACHE_BUCKET + 1)
72 struct panfrost_device
{
78 /* Properties of the GPU in use */
81 unsigned thread_tls_alloc
;
84 /* debug flags, see pan_util.h how to interpret */
87 drmVersionPtr kernel_version
;
89 struct renderonly
*ro
;
91 pthread_mutex_t active_bos_lock
;
92 struct set
*active_bos
;
94 pthread_mutex_t bo_map_lock
;
95 struct util_sparse_array bo_map
;
100 /* List containing all cached BOs sorted in LRU (Least
101 * Recently Used) order. This allows us to quickly evict BOs
102 * that are more than 1 second old.
104 struct list_head lru
;
106 /* The BO cache is a set of buckets with power-of-two sizes
107 * ranging from 2^12 (4096, the page size) to
108 * 2^(12 + MAX_BO_CACHE_BUCKETS).
109 * Each bucket is a linked list of free panfrost_bo objects. */
111 struct list_head buckets
[NR_BO_CACHE_BUCKETS
];
116 panfrost_open_device(void *memctx
, int fd
, struct panfrost_device
*dev
);
119 panfrost_close_device(struct panfrost_device
*dev
);
121 static inline struct panfrost_bo
*
122 pan_lookup_bo(struct panfrost_device
*dev
, uint32_t gem_handle
)
124 return util_sparse_array_get(&dev
->bo_map
, gem_handle
);