5 * Copyright (c) 2013 Connor Abbott (connor@abbott.cx)
6 * Copyright (c) 2018 Alyssa Rosenzweig (alyssa@rosenzweig.io)
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
34 #include "midgard-parse.h"
35 #include "midgard_ops.h"
36 #include "disassemble.h"
38 #include "util/half_float.h"
39 #include "util/u_math.h"
41 #define DEFINE_CASE(define, str) case define: { printf(str); break; }
43 static bool is_instruction_int
= false;
47 static unsigned nr_ins
= 0;
49 /* Prints a short form of the tag for branching, the minimum needed to be
50 * legible and unambiguous */
53 print_tag_short(unsigned tag
)
55 switch (midgard_word_types
[tag
]) {
56 case midgard_word_type_texture
:
57 printf("tex/%X", tag
);
60 case midgard_word_type_load_store
:
64 case midgard_word_type_alu
:
65 printf("alu%d/%X", midgard_word_size
[tag
], tag
);
69 printf("%s%X", (tag
> 0) ? "" : "unk", tag
);
75 print_alu_opcode(midgard_alu_op op
)
79 if (alu_opcode_props
[op
].name
) {
80 printf("%s", alu_opcode_props
[op
].name
);
82 int_op
= midgard_is_integer_op(op
);
84 printf("alu_op_%02X", op
);
86 /* For constant analysis */
87 is_instruction_int
= int_op
;
91 print_ld_st_opcode(midgard_load_store_op op
)
93 if (load_store_opcode_names
[op
])
94 printf("%s", load_store_opcode_names
[op
]);
96 printf("ldst_op_%02X", op
);
99 static bool is_embedded_constant_half
= false;
100 static bool is_embedded_constant_int
= false;
103 prefix_for_bits(unsigned bits
)
118 print_reg(unsigned reg
, unsigned bits
)
120 /* Perform basic static analysis for expanding constants correctly */
123 is_embedded_constant_int
= is_instruction_int
;
124 is_embedded_constant_half
= (bits
< 32);
127 char prefix
= prefix_for_bits(bits
);
135 static char *outmod_names_float
[4] = {
142 static char *outmod_names_int
[4] = {
149 static char *srcmod_names_int
[4] = {
157 print_outmod(unsigned outmod
, bool is_int
)
159 printf("%s", is_int
? outmod_names_int
[outmod
] :
160 outmod_names_float
[outmod
]);
164 print_quad_word(uint32_t *words
, unsigned tabs
)
168 for (i
= 0; i
< 4; i
++)
169 printf("0x%08X%s ", words
[i
], i
== 3 ? "" : ",");
174 static const char components
[16] = "xyzwefghijklmnop";
176 /* Helper to print 4 chars of a swizzle */
178 print_swizzle_helper(unsigned swizzle
, bool upper
)
180 for (unsigned i
= 0; i
< 4; ++i
) {
181 unsigned c
= (swizzle
>> (i
* 2)) & 3;
183 printf("%c", components
[c
]);
187 /* Helper to print 8 chars of a swizzle, duplicating over */
189 print_swizzle_helper_8(unsigned swizzle
, bool upper
)
191 for (unsigned i
= 0; i
< 4; ++i
) {
192 unsigned c
= (swizzle
>> (i
* 2)) & 3;
195 printf("%c%c", components
[c
], components
[c
+1]);
200 print_swizzle_vec16(unsigned swizzle
, bool rep_high
, bool rep_low
,
201 midgard_dest_override override
)
205 if (override
== midgard_dest_override_upper
) {
207 printf(" /* rep_high */ ");
209 printf(" /* rep_low */ ");
211 if (!rep_high
&& rep_low
)
212 print_swizzle_helper_8(swizzle
, true);
214 print_swizzle_helper_8(swizzle
, false);
216 print_swizzle_helper_8(swizzle
, rep_high
& 1);
217 print_swizzle_helper_8(swizzle
, !rep_low
& 1);
222 print_swizzle_vec8(unsigned swizzle
, bool rep_high
, bool rep_low
)
226 print_swizzle_helper(swizzle
, rep_high
& 1);
227 print_swizzle_helper(swizzle
, !rep_low
& 1);
231 print_swizzle_vec4(unsigned swizzle
, bool rep_high
, bool rep_low
)
234 printf(" /* rep_high */ ");
236 printf(" /* rep_low */ ");
238 if (swizzle
== 0xE4) return; /* xyzw */
241 print_swizzle_helper(swizzle
, 0);
244 print_swizzle_vec2(unsigned swizzle
, bool rep_high
, bool rep_low
)
247 printf(" /* rep_high */ ");
249 printf(" /* rep_low */ ");
251 if (swizzle
== 0xE4) return; /* XY */
255 for (unsigned i
= 0; i
< 4; i
+= 2) {
256 unsigned a
= (swizzle
>> (i
* 2)) & 3;
257 unsigned b
= (swizzle
>> ((i
+1) * 2)) & 3;
259 /* Normally we're adjacent, but if there's an issue, don't make
263 printf("[%c%c]", components
[a
], components
[b
]);
265 printf("%c", components
[a
>> 1]);
266 else if (b
== (a
+ 1))
267 printf("%c", "XY"[a
>> 1]);
269 printf("[%c%c]", components
[a
], components
[b
]);
274 bits_for_mode(midgard_reg_mode mode
)
277 case midgard_reg_mode_8
:
279 case midgard_reg_mode_16
:
281 case midgard_reg_mode_32
:
283 case midgard_reg_mode_64
:
291 bits_for_mode_halved(midgard_reg_mode mode
, bool half
)
293 unsigned bits
= bits_for_mode(mode
);
302 print_vector_src(unsigned src_binary
,
303 midgard_reg_mode mode
, unsigned reg
,
304 midgard_dest_override override
, bool is_int
)
306 midgard_vector_alu_src
*src
= (midgard_vector_alu_src
*)&src_binary
;
308 /* Modifiers change meaning depending on the op's context */
310 midgard_int_mod int_mod
= src
->mod
;
313 printf("%s", srcmod_names_int
[int_mod
]);
315 if (src
->mod
& MIDGARD_FLOAT_MOD_NEG
)
318 if (src
->mod
& MIDGARD_FLOAT_MOD_ABS
)
323 unsigned bits
= bits_for_mode_halved(mode
, src
->half
);
324 print_reg(reg
, bits
);
328 print_swizzle_vec8(src
->swizzle
, src
->rep_high
, src
->rep_low
);
330 print_swizzle_vec16(src
->swizzle
, src
->rep_high
, src
->rep_low
, override
);
332 print_swizzle_vec4(src
->swizzle
, src
->rep_high
, src
->rep_low
);
334 print_swizzle_vec2(src
->swizzle
, src
->rep_high
, src
->rep_low
);
336 /* Since we wrapped with a function-looking thing */
338 if (is_int
&& int_mod
== midgard_int_shift
)
339 printf(") << %d", bits
);
340 else if ((is_int
&& (int_mod
!= midgard_int_normal
))
341 || (!is_int
&& src
->mod
& MIDGARD_FLOAT_MOD_ABS
))
346 decode_vector_imm(unsigned src2_reg
, unsigned imm
)
349 ret
= src2_reg
<< 11;
350 ret
|= (imm
& 0x7) << 8;
351 ret
|= (imm
>> 3) & 0xFF;
356 print_immediate(uint16_t imm
)
358 if (is_instruction_int
)
361 printf("#%g", _mesa_half_to_float(imm
));
365 print_dest(unsigned reg
, midgard_reg_mode mode
, midgard_dest_override override
)
367 /* Depending on the mode and override, we determine the type of
368 * destination addressed. Absent an override, we address just the
369 * type of the operation itself */
371 unsigned bits
= bits_for_mode(mode
);
373 if (override
!= midgard_dest_override_none
)
376 print_reg(reg
, bits
);
382 print_mask_vec16(uint8_t mask
, midgard_dest_override override
)
386 if (override
== midgard_dest_override_none
) {
387 for (unsigned i
= 0; i
< 8; i
++) {
391 components
[i
*2 + 1]);
394 bool upper
= (override
== midgard_dest_override_upper
);
396 for (unsigned i
= 0; i
< 8; i
++) {
398 printf("%c", components
[i
+ (upper
? 8 : 0)]);
403 /* For 16-bit+ masks, we read off from the 8-bit mask field. For 16-bit (vec8),
404 * it's just one bit per channel, easy peasy. For 32-bit (vec4), it's one bit
405 * per channel with one duplicate bit in the middle. For 64-bit (vec2), it's
406 * one-bit per channel with _3_ duplicate bits in the middle. Basically, just
407 * subdividing the 128-bit word in 16-bit increments. For 64-bit, we uppercase
408 * the mask to make it obvious what happened */
411 print_mask(uint8_t mask
, unsigned bits
, midgard_dest_override override
)
414 print_mask_vec16(mask
, override
);
418 /* Skip 'complete' masks */
420 if (bits
>= 32 && mask
== 0xFF) return;
425 else if (mask
== 0xF0) {
433 unsigned skip
= (bits
/ 16);
434 bool uppercase
= bits
> 32;
435 bool tripped
= false;
437 for (unsigned i
= 0; i
< 8; i
+= skip
) {
438 bool a
= (mask
& (1 << i
)) != 0;
440 for (unsigned j
= 1; j
< skip
; ++j
) {
441 bool dupe
= (mask
& (1 << (i
+ j
))) != 0;
442 tripped
|= (dupe
!= a
);
446 char c
= components
[i
/ skip
];
456 printf(" /* %X */", mask
);
459 /* Prints the 4-bit masks found in texture and load/store ops, as opposed to
460 * the 8-bit masks found in (vector) ALU ops */
463 print_mask_4(unsigned mask
)
465 if (mask
== 0xF) return;
469 for (unsigned i
= 0; i
< 4; ++i
) {
470 bool a
= (mask
& (1 << i
)) != 0;
472 printf("%c", components
[i
]);
477 print_vector_field(const char *name
, uint16_t *words
, uint16_t reg_word
,
480 midgard_reg_info
*reg_info
= (midgard_reg_info
*)®_word
;
481 midgard_vector_alu
*alu_field
= (midgard_vector_alu
*) words
;
482 midgard_reg_mode mode
= alu_field
->reg_mode
;
483 unsigned override
= alu_field
->dest_override
;
485 /* For now, prefix instruction names with their unit, until we
486 * understand how this works on a deeper level */
489 print_alu_opcode(alu_field
->op
);
491 /* Postfix with the size to disambiguate if necessary */
492 char postfix
= prefix_for_bits(bits_for_mode(mode
));
493 bool size_ambiguous
= override
!= midgard_dest_override_none
;
496 printf("%c", postfix
? postfix
: 'r');
498 /* Print the outmod, if there is one */
499 print_outmod(alu_field
->outmod
,
500 midgard_is_integer_out_op(alu_field
->op
));
504 /* Mask denoting status of 8-lanes */
505 uint8_t mask
= alu_field
->mask
;
507 /* First, print the destination */
509 print_dest(reg_info
->out_reg
, mode
, alu_field
->dest_override
);
511 /* Apply the destination override to the mask */
513 if (mode
== midgard_reg_mode_32
|| mode
== midgard_reg_mode_64
) {
514 if (override
== midgard_dest_override_lower
)
516 else if (override
== midgard_dest_override_upper
)
518 } else if (mode
== midgard_reg_mode_16
519 && override
== midgard_dest_override_lower
) {
523 if (override
!= midgard_dest_override_none
) {
524 bool modeable
= (mode
!= midgard_reg_mode_8
);
525 bool known
= override
!= 0x3; /* Unused value */
527 if (!(modeable
&& known
))
528 printf("/* do%d */ ", override
);
531 print_mask(mask
, dest_size
, override
);
535 bool is_int
= midgard_is_integer_op(alu_field
->op
);
536 print_vector_src(alu_field
->src1
, mode
, reg_info
->src1_reg
, override
, is_int
);
540 if (reg_info
->src2_imm
) {
541 uint16_t imm
= decode_vector_imm(reg_info
->src2_reg
, alu_field
->src2
>> 2);
542 print_immediate(imm
);
544 print_vector_src(alu_field
->src2
, mode
,
545 reg_info
->src2_reg
, override
, is_int
);
553 print_scalar_src(unsigned src_binary
, unsigned reg
)
555 midgard_scalar_alu_src
*src
= (midgard_scalar_alu_src
*)&src_binary
;
563 print_reg(reg
, src
->full
? 32 : 16);
565 unsigned c
= src
->component
;
568 assert((c
& 1) == 0);
572 printf(".%c", components
[c
]);
580 decode_scalar_imm(unsigned src2_reg
, unsigned imm
)
583 ret
= src2_reg
<< 11;
584 ret
|= (imm
& 3) << 9;
585 ret
|= (imm
& 4) << 6;
586 ret
|= (imm
& 0x38) << 2;
592 print_scalar_field(const char *name
, uint16_t *words
, uint16_t reg_word
,
595 midgard_reg_info
*reg_info
= (midgard_reg_info
*)®_word
;
596 midgard_scalar_alu
*alu_field
= (midgard_scalar_alu
*) words
;
598 if (alu_field
->unknown
)
599 printf("scalar ALU unknown bit set\n");
602 print_alu_opcode(alu_field
->op
);
603 print_outmod(alu_field
->outmod
,
604 midgard_is_integer_out_op(alu_field
->op
));
607 bool full
= alu_field
->output_full
;
608 print_reg(reg_info
->out_reg
, full
? 32 : 16);
609 unsigned c
= alu_field
->output_component
;
612 assert((c
& 1) == 0);
616 printf(".%c, ", components
[c
]);
618 print_scalar_src(alu_field
->src1
, reg_info
->src1_reg
);
622 if (reg_info
->src2_imm
) {
623 uint16_t imm
= decode_scalar_imm(reg_info
->src2_reg
,
625 print_immediate(imm
);
627 print_scalar_src(alu_field
->src2
, reg_info
->src2_reg
);
634 print_branch_op(int op
)
637 case midgard_jmp_writeout_op_branch_uncond
:
641 case midgard_jmp_writeout_op_branch_cond
:
645 case midgard_jmp_writeout_op_writeout
:
649 case midgard_jmp_writeout_op_tilebuffer_pending
:
650 printf("tilebuffer.");
653 case midgard_jmp_writeout_op_discard
:
658 printf("unk%d.", op
);
664 print_branch_cond(int cond
)
667 case midgard_condition_write0
:
671 case midgard_condition_false
:
675 case midgard_condition_true
:
679 case midgard_condition_always
:
684 printf("unk%X", cond
);
690 print_compact_branch_writeout_field(uint16_t word
)
692 midgard_jmp_writeout_op op
= word
& 0x7;
695 case midgard_jmp_writeout_op_branch_uncond
: {
696 midgard_branch_uncond br_uncond
;
697 memcpy((char *) &br_uncond
, (char *) &word
, sizeof(br_uncond
));
698 printf("br.uncond ");
700 if (br_uncond
.unknown
!= 1)
701 printf("unknown:%d, ", br_uncond
.unknown
);
703 if (br_uncond
.offset
>= 0)
706 printf("%d -> ", br_uncond
.offset
);
707 print_tag_short(br_uncond
.dest_tag
);
713 case midgard_jmp_writeout_op_branch_cond
:
714 case midgard_jmp_writeout_op_writeout
:
715 case midgard_jmp_writeout_op_discard
:
717 midgard_branch_cond br_cond
;
718 memcpy((char *) &br_cond
, (char *) &word
, sizeof(br_cond
));
722 print_branch_op(br_cond
.op
);
723 print_branch_cond(br_cond
.cond
);
727 if (br_cond
.offset
>= 0)
730 printf("%d -> ", br_cond
.offset
);
731 print_tag_short(br_cond
.dest_tag
);
742 print_extended_branch_writeout_field(uint8_t *words
)
744 midgard_branch_extended br
;
745 memcpy((char *) &br
, (char *) words
, sizeof(br
));
749 print_branch_op(br
.op
);
751 /* Condition codes are a LUT in the general case, but simply repeated 8 times for single-channel conditions.. Check this. */
753 bool single_channel
= true;
755 for (unsigned i
= 0; i
< 16; i
+= 2) {
756 single_channel
&= (((br
.cond
>> i
) & 0x3) == (br
.cond
& 0x3));
760 print_branch_cond(br
.cond
& 0x3);
762 printf("lut%X", br
.cond
);
765 printf(".unknown%d", br
.unknown
);
772 printf("%d -> ", br
.offset
);
773 print_tag_short(br
.dest_tag
);
780 num_alu_fields_enabled(uint32_t control_word
)
784 if ((control_word
>> 17) & 1)
787 if ((control_word
>> 19) & 1)
790 if ((control_word
>> 21) & 1)
793 if ((control_word
>> 23) & 1)
796 if ((control_word
>> 25) & 1)
803 float_bitcast(uint32_t integer
)
815 print_alu_word(uint32_t *words
, unsigned num_quad_words
,
818 uint32_t control_word
= words
[0];
819 uint16_t *beginning_ptr
= (uint16_t *)(words
+ 1);
820 unsigned num_fields
= num_alu_fields_enabled(control_word
);
821 uint16_t *word_ptr
= beginning_ptr
+ num_fields
;
822 unsigned num_words
= 2 + num_fields
;
824 if ((control_word
>> 16) & 1)
825 printf("unknown bit 16 enabled\n");
827 if ((control_word
>> 17) & 1) {
828 print_vector_field("vmul", word_ptr
, *beginning_ptr
, tabs
);
834 if ((control_word
>> 18) & 1)
835 printf("unknown bit 18 enabled\n");
837 if ((control_word
>> 19) & 1) {
838 print_scalar_field("sadd", word_ptr
, *beginning_ptr
, tabs
);
844 if ((control_word
>> 20) & 1)
845 printf("unknown bit 20 enabled\n");
847 if ((control_word
>> 21) & 1) {
848 print_vector_field("vadd", word_ptr
, *beginning_ptr
, tabs
);
854 if ((control_word
>> 22) & 1)
855 printf("unknown bit 22 enabled\n");
857 if ((control_word
>> 23) & 1) {
858 print_scalar_field("smul", word_ptr
, *beginning_ptr
, tabs
);
864 if ((control_word
>> 24) & 1)
865 printf("unknown bit 24 enabled\n");
867 if ((control_word
>> 25) & 1) {
868 print_vector_field("lut", word_ptr
, *beginning_ptr
, tabs
);
874 if ((control_word
>> 26) & 1) {
875 print_compact_branch_writeout_field(*word_ptr
);
880 if ((control_word
>> 27) & 1) {
881 print_extended_branch_writeout_field((uint8_t *) word_ptr
);
886 if (num_quad_words
> (num_words
+ 7) / 8) {
887 assert(num_quad_words
== (num_words
+ 15) / 8);
888 //Assume that the extra quadword is constants
889 void *consts
= words
+ (4 * num_quad_words
- 4);
891 if (is_embedded_constant_int
) {
892 if (is_embedded_constant_half
) {
893 int16_t *sconsts
= (int16_t *) consts
;
894 printf("sconstants %d, %d, %d, %d\n",
900 int32_t *iconsts
= (int32_t *) consts
;
901 printf("iconstants %d, %d, %d, %d\n",
908 if (is_embedded_constant_half
) {
909 uint16_t *hconsts
= (uint16_t *) consts
;
910 printf("hconstants %g, %g, %g, %g\n",
911 _mesa_half_to_float(hconsts
[0]),
912 _mesa_half_to_float(hconsts
[1]),
913 _mesa_half_to_float(hconsts
[2]),
914 _mesa_half_to_float(hconsts
[3]));
916 uint32_t *fconsts
= (uint32_t *) consts
;
917 printf("fconstants %g, %g, %g, %g\n",
918 float_bitcast(fconsts
[0]),
919 float_bitcast(fconsts
[1]),
920 float_bitcast(fconsts
[2]),
921 float_bitcast(fconsts
[3]));
929 print_varying_parameters(midgard_load_store_word
*word
)
931 midgard_varying_parameter param
;
932 unsigned v
= word
->varying_parameters
;
933 memcpy(¶m
, &v
, sizeof(param
));
935 if (param
.is_varying
) {
936 /* If a varying, there are qualifiers */
940 if (param
.interpolation
!= midgard_interp_default
) {
941 if (param
.interpolation
== midgard_interp_centroid
)
944 printf(".interp%d", param
.interpolation
);
947 if (param
.modifier
!= midgard_varying_mod_none
) {
948 if (param
.modifier
== midgard_varying_mod_perspective_w
)
949 printf(".perspectivew");
950 else if (param
.modifier
== midgard_varying_mod_perspective_z
)
951 printf(".perspectivez");
953 printf(".mod%d", param
.modifier
);
955 } else if (param
.flat
|| param
.interpolation
|| param
.modifier
) {
956 printf(" /* is_varying not set but varying metadata attached */");
959 if (param
.zero0
|| param
.zero1
|| param
.zero2
)
960 printf(" /* zero tripped, %d %d %d */ ", param
.zero0
, param
.zero1
, param
.zero2
);
964 is_op_varying(unsigned op
)
967 case midgard_op_st_vary_16
:
968 case midgard_op_st_vary_32
:
969 case midgard_op_st_vary_32i
:
970 case midgard_op_st_vary_32u
:
971 case midgard_op_ld_vary_16
:
972 case midgard_op_ld_vary_32
:
973 case midgard_op_ld_vary_32i
:
974 case midgard_op_ld_vary_32u
:
982 print_load_store_arg(uint8_t arg
, unsigned index
)
984 /* Try to interpret as a register */
985 midgard_ldst_register_select sel
;
986 memcpy(&sel
, &arg
, sizeof(arg
));
988 /* If unknown is set, we're not sure what this is or how to
989 * interpret it. But if it's zero, we get it. */
992 printf("0x%02X", arg
);
996 unsigned reg
= REGISTER_LDST_BASE
+ sel
.select
;
997 char comp
= components
[sel
.component
];
999 printf("r%d.%c", reg
, comp
);
1001 /* Only print a shift if it's non-zero. Shifts only make sense for the
1002 * second index. For the first, we're not sure what it means yet */
1006 printf(" << %d", sel
.shift
);
1008 printf(" /* %X */", sel
.shift
);
1013 print_load_store_instr(uint64_t data
,
1016 midgard_load_store_word
*word
= (midgard_load_store_word
*) &data
;
1018 print_ld_st_opcode(word
->op
);
1020 if (is_op_varying(word
->op
))
1021 print_varying_parameters(word
);
1023 printf(" r%d", word
->reg
);
1024 print_mask_4(word
->mask
);
1026 int address
= word
->address
;
1028 if (word
->op
== midgard_op_ld_uniform_32
) {
1029 /* Uniforms use their own addressing scheme */
1031 int lo
= word
->varying_parameters
>> 7;
1032 int hi
= word
->address
;
1034 /* TODO: Combine fields logically */
1035 address
= (hi
<< 3) | lo
;
1038 printf(", %d", address
);
1040 print_swizzle_vec4(word
->swizzle
, false, false);
1043 print_load_store_arg(word
->arg_1
, 0);
1045 print_load_store_arg(word
->arg_2
, 1);
1046 printf(" /* %X */\n", word
->varying_parameters
);
1052 print_load_store_word(uint32_t *word
, unsigned tabs
)
1054 midgard_load_store
*load_store
= (midgard_load_store
*) word
;
1056 if (load_store
->word1
!= 3) {
1057 print_load_store_instr(load_store
->word1
, tabs
);
1060 if (load_store
->word2
!= 3) {
1061 print_load_store_instr(load_store
->word2
, tabs
);
1066 print_texture_reg(bool full
, bool select
, bool upper
)
1069 printf("r%d", REG_TEX_BASE
+ select
);
1071 printf("hr%d", (REG_TEX_BASE
+ select
) * 2 + upper
);
1074 printf("// error: out full / upper mutually exclusive\n");
1079 print_texture_reg_triple(unsigned triple
)
1081 bool full
= triple
& 1;
1082 bool select
= triple
& 2;
1083 bool upper
= triple
& 4;
1085 print_texture_reg(full
, select
, upper
);
1089 print_texture_format(int format
)
1091 /* Act like a modifier */
1095 DEFINE_CASE(MALI_TEX_1D
, "1d");
1096 DEFINE_CASE(MALI_TEX_2D
, "2d");
1097 DEFINE_CASE(MALI_TEX_3D
, "3d");
1098 DEFINE_CASE(MALI_TEX_CUBE
, "cube");
1101 unreachable("Bad format");
1106 print_texture_op(unsigned op
, bool gather
)
1108 /* Act like a bare name, like ESSL functions */
1111 printf("textureGather");
1113 unsigned component
= op
>> 4;
1114 unsigned bottom
= op
& 0xF;
1117 printf("_unk%d", bottom
);
1119 printf(".%c", components
[component
]);
1124 DEFINE_CASE(TEXTURE_OP_NORMAL
, "texture");
1125 DEFINE_CASE(TEXTURE_OP_LOD
, "textureLod");
1126 DEFINE_CASE(TEXTURE_OP_TEXEL_FETCH
, "texelFetch");
1127 DEFINE_CASE(TEXTURE_OP_DFDX
, "dFdx");
1128 DEFINE_CASE(TEXTURE_OP_DFDY
, "dFdy");
1131 printf("tex_%X", op
);
1137 texture_op_takes_bias(unsigned op
)
1139 return op
== TEXTURE_OP_NORMAL
;
1143 sampler_type_name(enum mali_sampler_type t
)
1146 case MALI_SAMPLER_FLOAT
:
1148 case MALI_SAMPLER_UNSIGNED
:
1150 case MALI_SAMPLER_SIGNED
:
1161 print_texture_word(uint32_t *word
, unsigned tabs
)
1163 midgard_texture_word
*texture
= (midgard_texture_word
*) word
;
1165 /* Broad category of texture operation in question */
1166 print_texture_op(texture
->op
, texture
->is_gather
);
1168 /* Specific format in question */
1169 print_texture_format(texture
->format
);
1171 assert(texture
->zero
== 0);
1173 /* Instruction "modifiers" parallel the ALU instructions. */
1175 if (texture
->shadow
)
1184 /* Output modifiers are always interpreted floatly */
1185 print_outmod(texture
->outmod
, false);
1189 print_texture_reg(texture
->out_full
, texture
->out_reg_select
, texture
->out_upper
);
1190 print_mask_4(texture
->mask
);
1193 printf("texture%d, ", texture
->texture_handle
);
1195 /* Print the type, GL style */
1196 printf("%c", sampler_type_name(texture
->sampler_type
));
1197 printf("sampler%d", texture
->sampler_handle
);
1198 print_swizzle_vec4(texture
->swizzle
, false, false);
1201 print_texture_reg(texture
->in_reg_full
, texture
->in_reg_select
, texture
->in_reg_upper
);
1202 print_swizzle_vec4(texture
->in_reg_swizzle
, false, false);
1204 /* There is *always* an offset attached. Of
1205 * course, that offset is just immediate #0 for a
1206 * GLES call that doesn't take an offset. If there
1207 * is a non-negative non-zero offset, this is
1208 * specified in immediate offset mode, with the
1209 * values in the offset_* fields as immediates. If
1210 * this is a negative offset, we instead switch to
1211 * a register offset mode, where the offset_*
1212 * fields become register triplets */
1214 if (texture
->offset_register
) {
1216 print_texture_reg_triple(texture
->offset_x
);
1218 /* The less questions you ask, the better. */
1220 unsigned swizzle_lo
, swizzle_hi
;
1221 unsigned orig_y
= texture
->offset_y
;
1222 unsigned orig_z
= texture
->offset_z
;
1224 memcpy(&swizzle_lo
, &orig_y
, sizeof(unsigned));
1225 memcpy(&swizzle_hi
, &orig_z
, sizeof(unsigned));
1227 /* Duplicate hi swizzle over */
1228 assert(swizzle_hi
< 4);
1229 swizzle_hi
= (swizzle_hi
<< 2) | swizzle_hi
;
1231 unsigned swiz
= (swizzle_lo
<< 4) | swizzle_hi
;
1232 unsigned reversed
= util_bitreverse(swiz
) >> 24;
1233 print_swizzle_vec4(reversed
, false, false);
1236 } else if (texture
->offset_x
|| texture
->offset_y
|| texture
->offset_z
) {
1237 /* Only select ops allow negative immediate offsets, verify */
1239 bool neg_x
= texture
->offset_x
< 0;
1240 bool neg_y
= texture
->offset_y
< 0;
1241 bool neg_z
= texture
->offset_z
< 0;
1242 bool any_neg
= neg_x
|| neg_y
|| neg_z
;
1244 if (any_neg
&& texture
->op
!= TEXTURE_OP_TEXEL_FETCH
)
1245 printf("/* invalid negative */ ");
1247 /* Regardless, just print the immediate offset */
1249 printf(" + <%d, %d, %d>, ",
1257 char lod_operand
= texture_op_takes_bias(texture
->op
) ? '+' : '=';
1259 if (texture
->lod_register
) {
1260 midgard_tex_register_select sel
;
1261 uint8_t raw
= texture
->bias
;
1262 memcpy(&sel
, &raw
, sizeof(raw
));
1264 printf("lod %c ", lod_operand
);
1265 print_texture_reg(sel
.full
, sel
.select
, sel
.upper
);
1266 printf(".%c, ", components
[sel
.component
]);
1268 if (texture
->bias_int
)
1269 printf(" /* bias_int = 0x%X */", texture
->bias_int
);
1272 printf(" /* sel.zero = 0x%X */", sel
.zero
);
1273 } else if (texture
->op
== TEXTURE_OP_TEXEL_FETCH
) {
1274 /* For texel fetch, the int LOD is in the fractional place and
1275 * there is no fraction / possibility of bias. We *always* have
1276 * an explicit LOD, even if it's zero. */
1278 if (texture
->bias_int
)
1279 printf(" /* bias_int = 0x%X */ ", texture
->bias_int
);
1281 printf("lod = %d, ", texture
->bias
);
1282 } else if (texture
->bias
|| texture
->bias_int
) {
1283 signed bias_int
= texture
->bias_int
;
1284 float bias_frac
= texture
->bias
/ 256.0f
;
1285 float bias
= bias_int
+ bias_frac
;
1287 bool is_bias
= texture_op_takes_bias(texture
->op
);
1288 char sign
= (bias
>= 0.0) ? '+' : '-';
1289 char operand
= is_bias
? sign
: '=';
1291 printf("lod %c %f, ", operand
, fabsf(bias
));
1296 /* While not zero in general, for these simple instructions the
1297 * following unknowns are zero, so we don't include them */
1299 if (texture
->unknown4
||
1300 texture
->unknownA
||
1301 texture
->unknown8
) {
1302 printf("// unknown4 = 0x%x\n", texture
->unknown4
);
1303 printf("// unknownA = 0x%x\n", texture
->unknownA
);
1304 printf("// unknown8 = 0x%x\n", texture
->unknown8
);
1311 disassemble_midgard(uint8_t *code
, size_t size
, bool stats
, unsigned nr_registers
, const char *prefix
)
1313 uint32_t *words
= (uint32_t *) code
;
1314 unsigned num_words
= size
/ 4;
1317 bool prefetch_flag
= false;
1319 int last_next_tag
= -1;
1323 /* Stats for shader-db */
1324 unsigned nr_bundles
= 0;
1325 unsigned nr_quadwords
= 0;
1328 while (i
< num_words
) {
1329 unsigned tag
= words
[i
] & 0xF;
1330 unsigned next_tag
= (words
[i
] >> 4) & 0xF;
1331 unsigned num_quad_words
= midgard_word_size
[tag
];
1334 if (last_next_tag
> 1) {
1335 if (last_next_tag
!= tag
) {
1336 printf("/* TAG ERROR got ");
1337 print_tag_short(tag
);
1338 printf(" expected ");
1339 print_tag_short(last_next_tag
);
1343 /* TODO: Check ALU case */
1346 last_next_tag
= next_tag
;
1348 switch (midgard_word_types
[tag
]) {
1349 case midgard_word_type_texture
:
1350 print_texture_word(&words
[i
], tabs
);
1353 case midgard_word_type_load_store
:
1354 print_load_store_word(&words
[i
], tabs
);
1357 case midgard_word_type_alu
:
1358 print_alu_word(&words
[i
], num_quad_words
, tabs
);
1360 /* Reset word static analysis state */
1361 is_embedded_constant_half
= false;
1362 is_embedded_constant_int
= false;
1367 printf("Unknown word type %u:\n", words
[i
] & 0xF);
1369 print_quad_word(&words
[i
], tabs
);
1374 if (prefetch_flag
&& midgard_word_types
[tag
] == midgard_word_type_alu
)
1379 unsigned next
= (words
[i
] & 0xF0) >> 4;
1381 i
+= 4 * num_quad_words
;
1383 /* We are parsing per bundle anyway */
1385 nr_quadwords
+= num_quad_words
;
1387 /* Break based on instruction prefetch flag */
1389 if (i
< num_words
&& next
== 1) {
1390 prefetch_flag
= true;
1392 if (midgard_word_types
[words
[i
] & 0xF] != midgard_word_type_alu
)
1398 unsigned nr_threads
=
1399 (nr_registers
<= 4) ? 4 :
1400 (nr_registers
<= 8) ? 2 :
1404 "%u inst, %u bundles, %u quadwords, "
1405 "%u registers, %u threads, 0 loops\n",
1407 nr_ins
, nr_bundles
, nr_quadwords
,
1408 nr_registers
, nr_threads
);