2 * Copyright (C) 2018-2019 Alyssa Rosenzweig <alyssa@rosenzweig.io>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #include "midgard_ops.h"
28 /* Pretty printer for Midgard IR, for use debugging compiler-internal
29 * passes like register allocation. The output superficially resembles
30 * Midgard assembly, with the exception that unit information and such is
31 * (normally) omitted, and generic indices are usually used instead of
35 mir_print_index(int source
)
42 if (source
>= SSA_FIXED_MINIMUM
) {
43 /* Specific register */
44 int reg
= SSA_REG_FROM_FIXED(source
);
46 /* TODO: Moving threshold */
47 if (reg
> 16 && reg
< 24)
48 printf("u%d", 23 - reg
);
56 static const char components
[16] = "xyzwefghijklmnop";
59 mir_print_mask(unsigned mask
)
63 for (unsigned i
= 0; i
< 16; ++i
) {
65 putchar(components
[i
]);
70 mir_get_unit(unsigned unit
)
73 case ALU_ENAB_VEC_MUL
:
75 case ALU_ENAB_SCAL_ADD
:
77 case ALU_ENAB_VEC_ADD
:
79 case ALU_ENAB_SCAL_MUL
:
81 case ALU_ENAB_VEC_LUT
:
83 case ALU_ENAB_BR_COMPACT
:
93 mir_print_instruction(midgard_instruction
*ins
)
99 midgard_alu_op op
= ins
->alu
.op
;
100 const char *name
= alu_opcode_props
[op
].name
;
103 printf("%s.", mir_get_unit(ins
->unit
));
105 printf("%s", name
? name
: "??");
109 case TAG_LOAD_STORE_4
: {
110 midgard_load_store_op op
= ins
->load_store
.op
;
111 const char *name
= load_store_opcode_names
[op
];
118 case TAG_TEXTURE_4
: {
130 ssa_args
*args
= &ins
->ssa_args
;
133 mir_print_index(args
->dest
);
135 if (ins
->mask
!= 0xF)
136 mir_print_mask(ins
->mask
);
140 mir_print_index(args
->src
[0]);
143 if (args
->inline_constant
)
144 printf("#%d", ins
->inline_constant
);
146 mir_print_index(args
->src
[1]);
149 mir_print_index(args
->src
[2]);
151 if (ins
->has_constants
)
152 printf(" <%f, %f, %f, %f>", ins
->constants
[0], ins
->constants
[1], ins
->constants
[2], ins
->constants
[3]);
155 printf(" /* no spill */");
160 /* Dumps MIR for a block or entire shader respective */
163 mir_print_block(midgard_block
*block
)
165 printf("block%d: {\n", block
->source_id
);
167 mir_foreach_instr_in_block(block
, ins
) {
168 mir_print_instruction(ins
);
173 if (block
->nr_successors
) {
175 for (unsigned i
= 0; i
< block
->nr_successors
; ++i
) {
176 printf("block%d%s", block
->successors
[i
]->source_id
,
177 (i
+ 1) != block
->nr_successors
? ", " : "");
185 mir_print_shader(compiler_context
*ctx
)
187 mir_foreach_block(ctx
, block
) {
188 mir_print_block(block
);
193 mir_print_bundle(midgard_bundle
*bundle
)
197 for (unsigned i
= 0; i
< bundle
->instruction_count
; ++i
) {
198 midgard_instruction
*ins
= bundle
->instructions
[i
];
199 mir_print_instruction(ins
);