2 * Copyright (C) 2019 Collabora, Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
29 /* When we're 'squeezing down' the values in the IR, we maintain a hash
33 find_or_allocate_temp(compiler_context
*ctx
, unsigned hash
)
35 if (hash
>= SSA_FIXED_MINIMUM
)
38 unsigned temp
= (uintptr_t) _mesa_hash_table_u64_search(
39 ctx
->hash_to_temp
, hash
+ 1);
44 /* If no temp is find, allocate one */
45 temp
= ctx
->temp_count
++;
46 ctx
->max_hash
= MAX2(ctx
->max_hash
, hash
);
48 _mesa_hash_table_u64_insert(ctx
->hash_to_temp
,
49 hash
+ 1, (void *) ((uintptr_t) temp
+ 1));
54 /* Reassigns numbering to get rid of gaps in the indices and to prioritize
55 * smaller register classes */
58 mir_squeeze_index(compiler_context
*ctx
)
62 /* TODO don't leak old hash_to_temp */
63 ctx
->hash_to_temp
= _mesa_hash_table_u64_create(NULL
);
65 /* We need to prioritize texture registers on older GPUs so we don't
66 * fail RA trying to assign to work registers r0/r1 when a work
67 * register is already there */
69 mir_foreach_instr_global(ctx
, ins
) {
70 if (ins
->type
== TAG_TEXTURE_4
)
71 ins
->dest
= find_or_allocate_temp(ctx
, ins
->dest
);
74 mir_foreach_instr_global(ctx
, ins
) {
75 if (ins
->type
!= TAG_TEXTURE_4
)
76 ins
->dest
= find_or_allocate_temp(ctx
, ins
->dest
);
78 for (unsigned i
= 0; i
< ARRAY_SIZE(ins
->src
); ++i
)
79 ins
->src
[i
] = find_or_allocate_temp(ctx
, ins
->src
[i
]);
82 ctx
->blend_input
= find_or_allocate_temp(ctx
, ctx
->blend_input
);
83 ctx
->blend_src1
= find_or_allocate_temp(ctx
, ctx
->blend_src1
);