Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
[gem5.git] / src / python / m5 / objects / Ethernet.py
1 from m5.SimObject import SimObject
2 from m5.params import *
3 from m5.proxy import *
4 from m5 import build_env
5 from Device import DmaDevice
6 from Pci import PciDevice, PciConfigData
7
8 class EtherInt(SimObject):
9 type = 'EtherInt'
10 abstract = True
11 peer = Param.EtherInt(NULL, "peer interface")
12
13 class EtherLink(SimObject):
14 type = 'EtherLink'
15 int1 = Param.EtherInt("interface 1")
16 int2 = Param.EtherInt("interface 2")
17 delay = Param.Latency('0us', "packet transmit delay")
18 delay_var = Param.Latency('0ns', "packet transmit delay variability")
19 speed = Param.NetworkBandwidth('1Gbps', "link speed")
20 dump = Param.EtherDump(NULL, "dump object")
21
22 class EtherBus(SimObject):
23 type = 'EtherBus'
24 loopback = Param.Bool(True, "send packet back to the sending interface")
25 dump = Param.EtherDump(NULL, "dump object")
26 speed = Param.NetworkBandwidth('100Mbps', "bus speed in bits per second")
27
28 class EtherTap(EtherInt):
29 type = 'EtherTap'
30 bufsz = Param.Int(10000, "tap buffer size")
31 dump = Param.EtherDump(NULL, "dump object")
32 port = Param.UInt16(3500, "tap port")
33
34 class EtherDump(SimObject):
35 type = 'EtherDump'
36 file = Param.String("dump file")
37 maxlen = Param.Int(96, "max portion of packet data to dump")
38
39 if build_env['ALPHA_TLASER']:
40
41 class EtherDev(DmaDevice):
42 type = 'EtherDev'
43 hardware_address = Param.EthernetAddr(NextEthernetAddr,
44 "Ethernet Hardware Address")
45
46 dma_data_free = Param.Bool(False, "DMA of Data is free")
47 dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
48 dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
49 dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
50 dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
51 dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
52 dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
53
54 rx_filter = Param.Bool(True, "Enable Receive Filter")
55 rx_delay = Param.Latency('1us', "Receive Delay")
56 tx_delay = Param.Latency('1us', "Transmit Delay")
57
58 intr_delay = Param.Latency('0us', "Interrupt Delay")
59 payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
60 physmem = Param.PhysicalMemory(Parent.any, "Physical Memory")
61 tlaser = Param.Turbolaser(Parent.any, "Turbolaser")
62
63 class EtherDevInt(EtherInt):
64 type = 'EtherDevInt'
65 device = Param.EtherDev("Ethernet device of this interface")
66
67
68 class IGbE(PciDevice):
69 type = 'IGbE'
70 hardware_address = Param.String("Ethernet Hardware Address")
71 use_flow_control = Param.Bool(False, "Should we use xon/xoff flow contorl (UNIMPLMENTD)")
72 rx_fifo_size = Param.MemorySize('384kB', "Size of the rx FIFO")
73 tx_fifo_size = Param.MemorySize('384kB', "Size of the tx FIFO")
74 rx_desc_cache_size = Param.Int(64, "Number of enteries in the rx descriptor cache")
75 tx_desc_cache_size = Param.Int(64, "Number of enteries in the rx descriptor cache")
76 clock = Param.Clock('500MHz', "Clock speed of the device")
77
78
79 class IGbEPciData(PciConfigData):
80 VendorID = 0x8086
81 DeviceID = 0x1075
82 SubsystemID = 0x1008
83 SubsystemVendorID = 0x8086
84 Status = 0x0000
85 SubClassCode = 0x00
86 ClassCode = 0x02
87 ProgIF = 0x00
88 BAR0 = 0x00000000
89 BAR1 = 0x00000000
90 BAR2 = 0x00000000
91 BAR3 = 0x00000000
92 BAR4 = 0x00000000
93 BAR5 = 0x00000000
94 MaximumLatency = 0x00
95 MinimumGrant = 0xff
96 InterruptLine = 0x1e
97 InterruptPin = 0x01
98 BAR0Size = '128kB'
99
100 class IGbEInt(EtherInt):
101 type = 'IGbEInt'
102 device = Param.IGbE("Ethernet device of this interface")
103
104
105
106 class EtherDevBase(PciDevice):
107 hardware_address = Param.EthernetAddr(NextEthernetAddr,
108 "Ethernet Hardware Address")
109
110 clock = Param.Clock('0ns', "State machine processor frequency")
111
112 dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
113 dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
114 dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
115 dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
116
117 rx_delay = Param.Latency('1us', "Receive Delay")
118 tx_delay = Param.Latency('1us', "Transmit Delay")
119 rx_fifo_size = Param.MemorySize('512kB', "max size of rx fifo")
120 tx_fifo_size = Param.MemorySize('512kB', "max size of tx fifo")
121
122 rx_filter = Param.Bool(True, "Enable Receive Filter")
123 intr_delay = Param.Latency('10us', "Interrupt propagation delay")
124 rx_thread = Param.Bool(False, "dedicated kernel thread for transmit")
125 tx_thread = Param.Bool(False, "dedicated kernel threads for receive")
126 rss = Param.Bool(False, "Receive Side Scaling")
127
128 class NSGigEPciData(PciConfigData):
129 VendorID = 0x100B
130 DeviceID = 0x0022
131 Status = 0x0290
132 SubClassCode = 0x00
133 ClassCode = 0x02
134 ProgIF = 0x00
135 BAR0 = 0x00000001
136 BAR1 = 0x00000000
137 BAR2 = 0x00000000
138 BAR3 = 0x00000000
139 BAR4 = 0x00000000
140 BAR5 = 0x00000000
141 MaximumLatency = 0x34
142 MinimumGrant = 0xb0
143 InterruptLine = 0x1e
144 InterruptPin = 0x01
145 BAR0Size = '256B'
146 BAR1Size = '4kB'
147
148 class NSGigE(EtherDevBase):
149 type = 'NSGigE'
150
151 dma_data_free = Param.Bool(False, "DMA of Data is free")
152 dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
153 dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
154
155 configdata = NSGigEPciData()
156
157
158 class NSGigEInt(EtherInt):
159 type = 'NSGigEInt'
160 device = Param.NSGigE("Ethernet device of this interface")
161
162 class SinicPciData(PciConfigData):
163 VendorID = 0x1291
164 DeviceID = 0x1293
165 Status = 0x0290
166 SubClassCode = 0x00
167 ClassCode = 0x02
168 ProgIF = 0x00
169 BAR0 = 0x00000000
170 BAR1 = 0x00000000
171 BAR2 = 0x00000000
172 BAR3 = 0x00000000
173 BAR4 = 0x00000000
174 BAR5 = 0x00000000
175 MaximumLatency = 0x34
176 MinimumGrant = 0xb0
177 InterruptLine = 0x1e
178 InterruptPin = 0x01
179 BAR0Size = '64kB'
180
181 class Sinic(EtherDevBase):
182 type = 'Sinic'
183
184 rx_max_copy = Param.MemorySize('1514B', "rx max copy")
185 tx_max_copy = Param.MemorySize('16kB', "tx max copy")
186 rx_max_intr = Param.UInt32(10, "max rx packets per interrupt")
187 rx_fifo_threshold = Param.MemorySize('384kB', "rx fifo high threshold")
188 rx_fifo_low_mark = Param.MemorySize('128kB', "rx fifo low threshold")
189 tx_fifo_high_mark = Param.MemorySize('384kB', "tx fifo high threshold")
190 tx_fifo_threshold = Param.MemorySize('128kB', "tx fifo low threshold")
191 virtual_count = Param.UInt32(1, "Virtualized SINIC")
192 zero_copy = Param.Bool(False, "Zero copy receive")
193 delay_copy = Param.Bool(False, "Delayed copy transmit")
194 virtual_addr = Param.Bool(False, "Virtual addressing")
195
196 configdata = SinicPciData()
197
198 class SinicInt(EtherInt):
199 type = 'SinicInt'
200 device = Param.Sinic("Ethernet device of this interface")