Add default responder to bus
[gem5.git] / src / python / m5 / objects / Pci.py
1 from m5.config import *
2 from Device import BasicPioDevice, DmaDevice, PioDevice
3
4 class PciConfigData(SimObject):
5 type = 'PciConfigData'
6 VendorID = Param.UInt16("Vendor ID")
7 DeviceID = Param.UInt16("Device ID")
8 Command = Param.UInt16(0, "Command")
9 Status = Param.UInt16(0, "Status")
10 Revision = Param.UInt8(0, "Device")
11 ProgIF = Param.UInt8(0, "Programming Interface")
12 SubClassCode = Param.UInt8(0, "Sub-Class Code")
13 ClassCode = Param.UInt8(0, "Class Code")
14 CacheLineSize = Param.UInt8(0, "System Cacheline Size")
15 LatencyTimer = Param.UInt8(0, "PCI Latency Timer")
16 HeaderType = Param.UInt8(0, "PCI Header Type")
17 BIST = Param.UInt8(0, "Built In Self Test")
18
19 BAR0 = Param.UInt32(0x00, "Base Address Register 0")
20 BAR1 = Param.UInt32(0x00, "Base Address Register 1")
21 BAR2 = Param.UInt32(0x00, "Base Address Register 2")
22 BAR3 = Param.UInt32(0x00, "Base Address Register 3")
23 BAR4 = Param.UInt32(0x00, "Base Address Register 4")
24 BAR5 = Param.UInt32(0x00, "Base Address Register 5")
25 BAR0Size = Param.MemorySize32('0B', "Base Address Register 0 Size")
26 BAR1Size = Param.MemorySize32('0B', "Base Address Register 1 Size")
27 BAR2Size = Param.MemorySize32('0B', "Base Address Register 2 Size")
28 BAR3Size = Param.MemorySize32('0B', "Base Address Register 3 Size")
29 BAR4Size = Param.MemorySize32('0B', "Base Address Register 4 Size")
30 BAR5Size = Param.MemorySize32('0B', "Base Address Register 5 Size")
31
32 CardbusCIS = Param.UInt32(0x00, "Cardbus Card Information Structure")
33 SubsystemID = Param.UInt16(0x00, "Subsystem ID")
34 SubsystemVendorID = Param.UInt16(0x00, "Subsystem Vendor ID")
35 ExpansionROM = Param.UInt32(0x00, "Expansion ROM Base Address")
36 InterruptLine = Param.UInt8(0x00, "Interrupt Line")
37 InterruptPin = Param.UInt8(0x00, "Interrupt Pin")
38 MaximumLatency = Param.UInt8(0x00, "Maximum Latency")
39 MinimumGrant = Param.UInt8(0x00, "Minimum Grant")
40
41 class PciConfigAll(PioDevice):
42 type = 'PciConfigAll'
43 pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
44 bus = Param.UInt8(0x00, "PCI bus to act as config space for")
45 size = Param.MemorySize32('16MB', "Size of config space")
46
47
48 class PciDevice(DmaDevice):
49 type = 'PciDevice'
50 abstract = True
51 config = Port("PCI configuration space port")
52 pci_bus = Param.Int("PCI bus")
53 pci_dev = Param.Int("PCI device number")
54 pci_func = Param.Int("PCI function code")
55 pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
56 configdata = Param.PciConfigData(Parent.any, "PCI Config data")
57
58 class PciFake(PciDevice):
59 type = 'PciFake'