src/python/m5/objects/Tsunami.py

   1 from m5.params import *
   2 from m5.proxy import *
   3 from Device import BasicPioDevice, IsaFake, BadAddr
   4 from Platform import Platform
   5 from AlphaConsole import AlphaConsole
   6 from Uart import Uart8250
   7 from Pci import PciConfigAll
   8 from BadDevice import BadDevice
   9
  10 class TsunamiCChip(BasicPioDevice):
  11     type = 'TsunamiCChip'
  12     tsunami = Param.Tsunami(Parent.any, "Tsunami")
  13
  14 class TsunamiIO(BasicPioDevice):
  15     type = 'TsunamiIO'
  16     time = Param.Time('01/01/2009',
  17         "System time to use ('Now' for actual time)")
  18     year_is_bcd = Param.Bool(False,
  19         "The RTC should interpret the year as a BCD value")
  20     tsunami = Param.Tsunami(Parent.any, "Tsunami")
  21     frequency = Param.Frequency('1024Hz', "frequency of interrupts")
  22
  23 class TsunamiPChip(BasicPioDevice):
  24     type = 'TsunamiPChip'
  25     tsunami = Param.Tsunami(Parent.any, "Tsunami")
  26
  27 class Tsunami(Platform):
  28     type = 'Tsunami'
  29     system = Param.System(Parent.any, "system")
  30
  31     cchip = TsunamiCChip(pio_addr=0x801a0000000)
  32     pchip = TsunamiPChip(pio_addr=0x80180000000)
  33     pciconfig = PciConfigAll()
  34     fake_sm_chip = IsaFake(pio_addr=0x801fc000370)
  35
  36     fake_uart1 = IsaFake(pio_addr=0x801fc0002f8)
  37     fake_uart2 = IsaFake(pio_addr=0x801fc0003e8)
  38     fake_uart3 = IsaFake(pio_addr=0x801fc0002e8)
  39     fake_uart4 = IsaFake(pio_addr=0x801fc0003f0)
  40
  41     fake_ppc = IsaFake(pio_addr=0x801fc0003bb)
  42
  43     fake_OROM = IsaFake(pio_addr=0x800000a0000, pio_size=0x60000)
  44
  45     fake_pnp_addr = IsaFake(pio_addr=0x801fc000279)
  46     fake_pnp_write = IsaFake(pio_addr=0x801fc000a79)
  47     fake_pnp_read0 = IsaFake(pio_addr=0x801fc000203)
  48     fake_pnp_read1 = IsaFake(pio_addr=0x801fc000243)
  49     fake_pnp_read2 = IsaFake(pio_addr=0x801fc000283)
  50     fake_pnp_read3 = IsaFake(pio_addr=0x801fc0002c3)
  51     fake_pnp_read4 = IsaFake(pio_addr=0x801fc000303)
  52     fake_pnp_read5 = IsaFake(pio_addr=0x801fc000343)
  53     fake_pnp_read6 = IsaFake(pio_addr=0x801fc000383)
  54     fake_pnp_read7 = IsaFake(pio_addr=0x801fc0003c3)
  55
  56     fake_ata0 = IsaFake(pio_addr=0x801fc0001f0)
  57     fake_ata1 = IsaFake(pio_addr=0x801fc000170)
  58
  59     fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer')
  60     io = TsunamiIO(pio_addr=0x801fc000000)
  61     uart = Uart8250(pio_addr=0x801fc0003f8)
  62     console = AlphaConsole(pio_addr=0x80200000000, disk=Parent.simple_disk)
  63
  64     # Attach I/O devices to specified bus object.  Can't do this
  65     # earlier, since the bus object itself is typically defined at the
  66     # System level.
  67     def attachIO(self, bus):
  68         self.cchip.pio = bus.port
  69         self.pchip.pio = bus.port
  70         self.pciconfig.pio = bus.default
  71         bus.responder_set = True
  72         bus.responder = self.pciconfig
  73         self.fake_sm_chip.pio = bus.port
  74         self.fake_uart1.pio = bus.port
  75         self.fake_uart2.pio = bus.port
  76         self.fake_uart3.pio = bus.port
  77         self.fake_uart4.pio = bus.port
  78         self.fake_ppc.pio = bus.port
  79         self.fake_OROM.pio = bus.port
  80         self.fake_pnp_addr.pio = bus.port
  81         self.fake_pnp_write.pio = bus.port
  82         self.fake_pnp_read0.pio = bus.port
  83         self.fake_pnp_read1.pio = bus.port
  84         self.fake_pnp_read2.pio = bus.port
  85         self.fake_pnp_read3.pio = bus.port
  86         self.fake_pnp_read4.pio = bus.port
  87         self.fake_pnp_read5.pio = bus.port
  88         self.fake_pnp_read6.pio = bus.port
  89         self.fake_pnp_read7.pio = bus.port
  90         self.fake_ata0.pio = bus.port
  91         self.fake_ata1.pio = bus.port
  92         self.fb.pio = bus.port
  93         self.io.pio = bus.port
  94         self.uart.pio = bus.port
  95         self.console.pio = bus.port