src/python/swig/sim_object.i

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Nathan Binkert
  29  */
  30
  31 %module sim_object
  32
  33 %{
  34 #include "enums/MemoryMode.hh"
  35 #include "python/swig/pyobject.hh"
  36 %}
  37
  38 // import these files for SWIG to wrap
  39 %include "stdint.i"
  40 %include "std_string.i"
  41 %include "sim/host.hh"
  42
  43 class BaseCPU;
  44
  45 class SimObject {
  46   public:
  47     enum State {
  48       Running,
  49       Draining,
  50       Drained
  51     };
  52
  53     unsigned int drain(Event *drain_event);
  54     void resume();
  55     void switchOut();
  56     void takeOverFrom(BaseCPU *cpu);
  57     SimObject(const std::string &_name);
  58 };
  59
  60 class System {
  61     private:
  62       System();
  63     public:
  64       Enums::MemoryMode getMemoryMode();
  65       void setMemoryMode(Enums::MemoryMode mode);
  66 };
  67
  68 int connectPorts(SimObject *o1, const std::string &name1, int i1,
  69                  SimObject *o2, const std::string &name2, int i2);
  70
  71 BaseCPU *convertToBaseCPUPtr(SimObject *obj);
  72 System *convertToSystemPtr(SimObject *obj);
  73
  74 void serializeAll(const std::string &cpt_dir);
  75 void unserializeAll(const std::string &cpt_dir);
  76
  77 void initAll();
  78 void regAllStats();
  79
  80 %wrapper %{
  81 // fix up module name to reflect the fact that it's inside the m5 package
  82 #undef SWIG_name
  83 #define SWIG_name "m5.internal._sim_object"
  84
  85 // Convert a pointer to the Python object that SWIG wraps around a
  86 // C++ SimObject pointer back to the actual C++ pointer.
  87 SimObject *
  88 convertSwigSimObjectPtr(PyObject *pyObj)
  89 {
  90     SimObject *so;
  91     if (SWIG_ConvertPtr(pyObj, (void **) &so, SWIGTYPE_p_SimObject, 0) == -1)
  92         return NULL;
  93     return so;
  94 }
  95 %}