1 from nmigen
import Elaboratable
, Module
, Signal
, Array
4 class FU_RW_Pend(Elaboratable
):
5 """ these are allocated per-FU (horizontally),
6 and are of length reg_count
8 def __init__(self
, reg_count
, n_src
):
10 self
.reg_count
= reg_count
11 self
.dest_fwd_i
= Signal(reg_count
, reset_less
=True)
13 for i
in range(n_src
):
14 j
= i
+ 1 # name numbering to match src1/src2
15 src
.append(Signal(reg_count
, name
="src%d" % j
, reset_less
=True))
16 self
.src_fwd_i
= Array(src
)
18 self
.reg_wr_pend_o
= Signal(reset_less
=True)
19 self
.reg_rd_pend_o
= Signal(reset_less
=True)
20 self
.reg_rd_src_pend_o
= Signal(n_src
, reset_less
=True)
22 def elaborate(self
, platform
):
24 m
.d
.comb
+= self
.reg_wr_pend_o
.eq(self
.dest_fwd_i
.bool())
25 for i
in range(self
.n_src
):
26 m
.d
.comb
+= self
.reg_rd_src_pend_o
[i
].eq(self
.src_fwd_i
[i
].bool())
27 m
.d
.comb
+= self
.reg_rd_pend_o
.eq(self
.reg_rd_src_pend_o
.bool())