e393dc4674d43550c77c7ff2b8e59b98d4e2ab79
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36 # Authors: Andreas Hansson
38 from m5
.SimObject
import SimObject
39 from m5
.params
import *
40 from m5
.proxy
import *
42 # Enumerate set of allowed power states that can be used by a clocked object.
43 # The list is kept generic to express a base minimal set.
45 # Undefined: Invalid state, no power state derived information is available.
46 # On: The logic block is actively running and consuming dynamic and leakage
47 # energy depending on the amount of processing required.
48 # Clk_gated: The clock circuity within the block is gated to save dynamic
49 # energy, the power supply to the block is still on and leakage
50 # energy is being consumed by the block.
51 # Sram_retention: The SRAMs within the logic blocks are pulled into retention
52 # state to reduce leakage energy further.
53 # Off: The logic block is power gated and is not consuming any energy.
54 class PwrState(Enum
): vals
= ['UNDEFINED',
60 class ClockedObject(SimObject
):
61 type = 'ClockedObject'
63 cxx_header
= "sim/clocked_object.hh"
65 # The clock domain this clocked object belongs to, inheriting the
66 # parent's clock domain by default
67 clk_domain
= Param
.ClockDomain(Parent
.clk_domain
, "Clock domain")
69 # Power model for this ClockedObject
70 power_model
= Param
.PowerModel(NULL
, "Power model")
72 # Provide initial power state, should ideally get redefined in startup
74 default_p_state
= Param
.PwrState("UNDEFINED", "Default Power State")
76 p_state_clk_gate_min
= Param
.Latency('1ns', "Min value of the distribution")
77 p_state_clk_gate_max
= Param
.Latency('1s', "Max value of the distribution")
78 p_state_clk_gate_bins
= Param
.Unsigned('20',
79 "# bins in clk gated distribution")