1 # Copyright (c) 2005-2007 The Regents of The University of Michigan
2 # Copyright (c) 2011 Regents of the University of California
5 # Redistribution and use in source and binary forms, with or without
6 # modification, are permitted provided that the following conditions are
7 # met: redistributions of source code must retain the above copyright
8 # notice, this list of conditions and the following disclaimer;
9 # redistributions in binary form must reproduce the above copyright
10 # notice, this list of conditions and the following disclaimer in the
11 # documentation and/or other materials provided with the distribution;
12 # neither the name of the copyright holders nor the names of its
13 # contributors may be used to endorse or promote products derived from
14 # this software without specific prior written permission.
16 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 # Authors: Nathan Binkert
31 from m5
.SimObject
import SimObject
32 from m5
.defines
import buildEnv
33 from m5
.params
import *
34 from m5
.proxy
import *
36 from SimpleMemory
import *
38 class MemoryMode(Enum
): vals
= ['invalid', 'atomic', 'timing',
41 class System(MemObject
):
43 cxx_header
= "sim/system.hh"
44 system_port
= MasterPort("System port")
46 # Override the clock from the ClockedObject which looks at the
47 # parent clock by default. The 1 GHz default system clock serves
48 # as a start for the modules that rely on the parent to provide
53 def export_method_cxx_predecls(cls
, code
):
54 code('#include "sim/system.hh"')
57 def export_methods(cls
, code
):
59 Enums::MemoryMode getMemoryMode() const;
60 void setMemoryMode(Enums::MemoryMode mode);
63 memories
= VectorParam
.AbstractMemory(Self
.all
,
64 "All memories in the system")
65 mem_mode
= Param
.MemoryMode('atomic', "The mode the memory system is in")
67 # The memory ranges are to be populated when creating the system
68 # such that these can be passed from the I/O subsystem through an
70 mem_ranges
= VectorParam
.AddrRange([], "Ranges that constitute main memory")
72 work_item_id
= Param
.Int(-1, "specific work item id")
73 num_work_ids
= Param
.Int(16, "Number of distinct work item types")
74 work_begin_cpu_id_exit
= Param
.Int(-1,
75 "work started on specific id, now exit simulation")
76 work_begin_ckpt_count
= Param
.Counter(0,
77 "create checkpoint when work items begin count value is reached")
78 work_begin_exit_count
= Param
.Counter(0,
79 "exit simulation when work items begin count value is reached")
80 work_end_ckpt_count
= Param
.Counter(0,
81 "create checkpoint when work items end count value is reached")
82 work_end_exit_count
= Param
.Counter(0,
83 "exit simulation when work items end count value is reached")
84 work_cpus_ckpt_count
= Param
.Counter(0,
85 "create checkpoint when active cpu count value is reached")
87 init_param
= Param
.UInt64(0, "numerical value to pass into simulator")
88 boot_osflags
= Param
.String("a", "boot flags to pass to the kernel")
89 kernel
= Param
.String("", "file that contains the kernel code")
90 readfile
= Param
.String("", "file to read startup script from")
91 symbolfile
= Param
.String("", "file to get the symbols from")
92 load_addr_mask
= Param
.UInt64(0xffffffffff,
93 "Address to mask loading binaries with");