src/sim/clock_domain.cc

   1 /*
   2  * Copyright (c) 2013-2014 ARM Limited
   3  * Copyright (c) 2013 Cornell University
   4  * All rights reserved
   5  *
   6  * The license below extends only to copyright in the software and shall
   7  * not be construed as granting a license to any other intellectual
   8  * property including but not limited to intellectual property relating
   9  * to a hardware implementation of the functionality of the software
  10  * licensed hereunder.  You may use the software subject to the license
  11  * terms below provided that you ensure that this notice is replicated
  12  * unmodified and in its entirety in all distributions of the software,
  13  * modified or unmodified, in source code or in binary form.
  14  *
  15  * Redistribution and use in source and binary forms, with or without
  16  * modification, are permitted provided that the following conditions are
  17  * met: redistributions of source code must retain the above copyright
  18  * notice, this list of conditions and the following disclaimer;
  19  * redistributions in binary form must reproduce the above copyright
  20  * notice, this list of conditions and the following disclaimer in the
  21  * documentation and/or other materials provided with the distribution;
  22  * neither the name of the copyright holders nor the names of its
  23  * contributors may be used to endorse or promote products derived from
  24  * this software without specific prior written permission.
  25  *
  26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  27  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  28  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  29  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  30  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  31  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  32  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  33  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  34  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  35  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37  *
  38  * Authors: Vasileios Spiliopoulos
  39  *          Akash Bagdia
  40  *          Andreas Hansson
  41  *          Christopher Torng
  42  *          Stephan Diestelhorst
  43  */
  44
  45 #include <algorithm>
  46 #include <functional>
  47
  48 #include "debug/ClockDomain.hh"
  49 #include "params/ClockDomain.hh"
  50 #include "params/DerivedClockDomain.hh"
  51 #include "params/SrcClockDomain.hh"
  52 #include "sim/clock_domain.hh"
  53 #include "sim/voltage_domain.hh"
  54 #include "sim/clocked_object.hh"
  55
  56 void
  57 ClockDomain::regStats()
  58 {
  59     SimObject::regStats();
  60
  61     using namespace Stats;
  62
  63     // Expose the current clock period as a stat for observability in
  64     // the dumps
  65     currentClock
  66         .scalar(_clockPeriod)
  67         .name(params()->name + ".clock")
  68         .desc("Clock period in ticks")
  69         ;
  70 }
  71
  72 double
  73 ClockDomain::voltage() const
  74 {
  75     return _voltageDomain->voltage();
  76 }
  77
  78 SrcClockDomain::SrcClockDomain(const Params *p) :
  79     ClockDomain(p, p->voltage_domain),
  80     freqOpPoints(p->clock),
  81     _domainID(p->domain_id),
  82     _perfLevel(p->init_perf_level)
  83 {
  84     VoltageDomain *vdom = p->voltage_domain;
  85
  86     fatal_if(freqOpPoints.empty(), "DVFS: Empty set of frequencies for "\
  87              "domain %d %s\n", _domainID, name());
  88
  89     fatal_if(!vdom, "DVFS: Empty voltage domain specified for "\
  90              "domain %d %s\n", _domainID, name());
  91
  92     fatal_if((vdom->numVoltages() > 1) &&
  93              (vdom->numVoltages() != freqOpPoints.size()),
  94              "DVFS: Number of frequency and voltage scaling points do "\
  95              "not match: %d:%d ID: %d %s.\n", vdom->numVoltages(),
  96              freqOpPoints.size(), _domainID, name());
  97
  98     // Frequency (& voltage) points should be declared in descending order,
  99     // NOTE: Frequency is inverted to ticks, so checking for ascending ticks
 100     fatal_if(!std::is_sorted(freqOpPoints.begin(), freqOpPoints.end()),
 101              "DVFS: Frequency operation points not in descending order for "\
 102              "domain with ID %d\n", _domainID);
 103
 104     fatal_if(_perfLevel >= freqOpPoints.size(), "DVFS: Initial DVFS point %d "\
 105              "is outside of list for Domain ID: %d\n", _perfLevel, _domainID);
 106
 107     clockPeriod(freqOpPoints[_perfLevel]);
 108
 109     vdom->registerSrcClockDom(this);
 110 }
 111
 112 void
 113 SrcClockDomain::clockPeriod(Tick clock_period)
 114 {
 115     if (clock_period == 0) {
 116         fatal("%s has a clock period of zero\n", name());
 117     }
 118
 119     // Align all members to the current tick
 120     for (auto m = members.begin(); m != members.end(); ++m) {
 121         (*m)->updateClockPeriod();
 122     }
 123
 124     _clockPeriod = clock_period;
 125
 126     DPRINTF(ClockDomain,
 127             "Setting clock period to %d ticks for source clock %s\n",
 128             _clockPeriod, name());
 129
 130     // inform any derived clocks they need to updated their period
 131     for (auto c = children.begin(); c != children.end(); ++c) {
 132         (*c)->updateClockPeriod();
 133     }
 134 }
 135
 136 void
 137 SrcClockDomain::perfLevel(PerfLevel perf_level)
 138 {
 139     assert(validPerfLevel(perf_level));
 140
 141     if (perf_level == _perfLevel) {
 142         // Silently ignore identical overwrites
 143         return;
 144     }
 145
 146     DPRINTF(ClockDomain, "DVFS: Switching performance level of domain %s "\
 147             "(id: %d) from  %d to %d\n", name(), domainID(), _perfLevel,
 148             perf_level);
 149
 150     _perfLevel = perf_level;
 151
 152     signalPerfLevelUpdate();
 153 }
 154
 155 void SrcClockDomain::signalPerfLevelUpdate()
 156 {
 157     // Signal the voltage domain that we have changed our perf level so that the
 158     // voltage domain can recompute its performance level
 159     voltageDomain()->sanitiseVoltages();
 160
 161     // Integrated switching of the actual clock value, too
 162     clockPeriod(clkPeriodAtPerfLevel());
 163 }
 164
 165 void
 166 SrcClockDomain::serialize(CheckpointOut &cp) const
 167 {
 168     SERIALIZE_SCALAR(_perfLevel);
 169     ClockDomain::serialize(cp);
 170 }
 171
 172 void
 173 SrcClockDomain::unserialize(CheckpointIn &cp)
 174 {
 175     ClockDomain::unserialize(cp);
 176     UNSERIALIZE_SCALAR(_perfLevel);
 177 }
 178
 179 void
 180 SrcClockDomain::startup()
 181 {
 182     // Perform proper clock update when all related components have been
 183     // created (i.e. after unserialization / object creation)
 184     signalPerfLevelUpdate();
 185 }
 186
 187 SrcClockDomain *
 188 SrcClockDomainParams::create()
 189 {
 190     return new SrcClockDomain(this);
 191 }
 192
 193 DerivedClockDomain::DerivedClockDomain(const Params *p) :
 194     ClockDomain(p, p->clk_domain->voltageDomain()),
 195     parent(*p->clk_domain),
 196     clockDivider(p->clk_divider)
 197 {
 198     // Ensure that clock divider setting works as frequency divider and never
 199     // work as frequency multiplier
 200     if (clockDivider < 1) {
 201        fatal("Clock divider param cannot be less than 1");
 202     }
 203
 204     // let the parent keep track of this derived domain so that it can
 205     // propagate changes
 206     parent.addDerivedDomain(this);
 207
 208     // update our clock period based on the parents clock
 209     updateClockPeriod();
 210 }
 211
 212 void
 213 DerivedClockDomain::updateClockPeriod()
 214 {
 215     // Align all members to the current tick
 216     for (auto m = members.begin(); m != members.end(); ++m) {
 217         (*m)->updateClockPeriod();
 218     }
 219
 220     // recalculate the clock period, relying on the fact that changes
 221     // propagate downwards in the tree
 222     _clockPeriod = parent.clockPeriod() * clockDivider;
 223
 224     DPRINTF(ClockDomain,
 225             "Setting clock period to %d ticks for derived clock %s\n",
 226             _clockPeriod, name());
 227
 228     // inform any derived clocks
 229     for (auto c = children.begin(); c != children.end(); ++c) {
 230         (*c)->updateClockPeriod();
 231     }
 232 }
 233
 234 DerivedClockDomain *
 235 DerivedClockDomainParams::create()
 236 {
 237     return new DerivedClockDomain(this);
 238 }