src/sim/core.cc

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * Copyright (c) 2013 Advanced Micro Devices, Inc.
   4  * Copyright (c) 2013 Mark D. Hill and David A. Wood
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are
   9  * met: redistributions of source code must retain the above copyright
  10  * notice, this list of conditions and the following disclaimer;
  11  * redistributions in binary form must reproduce the above copyright
  12  * notice, this list of conditions and the following disclaimer in the
  13  * documentation and/or other materials provided with the distribution;
  14  * neither the name of the copyright holders nor the names of its
  15  * contributors may be used to endorse or promote products derived from
  16  * this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  *
  30  * Authors: Nathan Binkert
  31  *          Steve Reinhardt
  32  */
  33
  34 #include <iostream>
  35 #include <string>
  36
  37 #include "base/callback.hh"
  38 #include "base/output.hh"
  39 #include "sim/core.hh"
  40 #include "sim/eventq.hh"
  41
  42 using namespace std;
  43
  44 namespace SimClock {
  45 /// The simulated frequency of curTick(). (In ticks per second)
  46 Tick Frequency;
  47
  48 namespace Float {
  49 double s;
  50 double ms;
  51 double us;
  52 double ns;
  53 double ps;
  54
  55 double Hz;
  56 double kHz;
  57 double MHz;
  58 double GHZ;
  59 } // namespace Float
  60
  61 namespace Int {
  62 Tick s;
  63 Tick ms;
  64 Tick us;
  65 Tick ns;
  66 Tick ps;
  67 } // namespace Float
  68
  69 } // namespace SimClock
  70
  71 void
  72 setClockFrequency(Tick ticksPerSecond)
  73 {
  74     using namespace SimClock;
  75     Frequency = ticksPerSecond;
  76     Float::s = static_cast<double>(Frequency);
  77     Float::ms = Float::s / 1.0e3;
  78     Float::us = Float::s / 1.0e6;
  79     Float::ns = Float::s / 1.0e9;
  80     Float::ps = Float::s / 1.0e12;
  81
  82     Float::Hz  = 1.0 / Float::s;
  83     Float::kHz = 1.0 / Float::ms;
  84     Float::MHz = 1.0 / Float::us;
  85     Float::GHZ = 1.0 / Float::ns;
  86
  87     Int::s  = Frequency;
  88     Int::ms = Int::s / 1000;
  89     Int::us = Int::ms / 1000;
  90     Int::ns = Int::us / 1000;
  91     Int::ps = Int::ns / 1000;
  92
  93 }
  94
  95 void
  96 setOutputDir(const string &dir)
  97 {
  98     simout.setDirectory(dir);
  99 }
 100
 101 /**
 102  * Queue of C++ callbacks to invoke on simulator exit.
 103  */
 104 inline CallbackQueue &
 105 exitCallbacks()
 106 {
 107     static CallbackQueue theQueue;
 108     return theQueue;
 109 }
 110
 111 /**
 112  * Register an exit callback.
 113  */
 114 void
 115 registerExitCallback(Callback *callback)
 116 {
 117     exitCallbacks().add(callback);
 118 }
 119
 120 /**
 121  * Do C++ simulator exit processing.  Exported to SWIG to be invoked
 122  * when simulator terminates via Python's atexit mechanism.
 123  */
 124 void
 125 doExitCleanup()
 126 {
 127     exitCallbacks().process();
 128     exitCallbacks().clear();
 129
 130     cout.flush();
 131 }
 132