src/sim/core.cc

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * Copyright (c) 2013 Advanced Micro Devices, Inc.
   4  * Copyright (c) 2013 Mark D. Hill and David A. Wood
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are
   9  * met: redistributions of source code must retain the above copyright
  10  * notice, this list of conditions and the following disclaimer;
  11  * redistributions in binary form must reproduce the above copyright
  12  * notice, this list of conditions and the following disclaimer in the
  13  * documentation and/or other materials provided with the distribution;
  14  * neither the name of the copyright holders nor the names of its
  15  * contributors may be used to endorse or promote products derived from
  16  * this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  *
  30  * Authors: Nathan Binkert
  31  *          Steve Reinhardt
  32  */
  33
  34 #include "sim/core.hh"
  35
  36 #include <iostream>
  37 #include <string>
  38
  39 #include "base/callback.hh"
  40 #include "base/cprintf.hh"
  41 #include "base/logging.hh"
  42 #include "base/output.hh"
  43 #include "sim/eventq.hh"
  44
  45 using namespace std;
  46
  47 namespace SimClock {
  48 /// The simulated frequency of curTick(). (In ticks per second)
  49 Tick Frequency;
  50
  51 namespace Float {
  52 double s;
  53 double ms;
  54 double us;
  55 double ns;
  56 double ps;
  57
  58 double Hz;
  59 double kHz;
  60 double MHz;
  61 double GHz;
  62 } // namespace Float
  63
  64 namespace Int {
  65 Tick s;
  66 Tick ms;
  67 Tick us;
  68 Tick ns;
  69 Tick ps;
  70 } // namespace Float
  71
  72 } // namespace SimClock
  73
  74 namespace {
  75
  76 bool _clockFrequencyFixed = false;
  77
  78 // Default to 1 THz (1 Tick == 1 ps)
  79 Tick _ticksPerSecond = 1e12;
  80
  81 } // anonymous namespace
  82
  83 void
  84 fixClockFrequency()
  85 {
  86     if (_clockFrequencyFixed)
  87         return;
  88
  89     using namespace SimClock;
  90     Frequency = _ticksPerSecond;
  91     Float::s = static_cast<double>(Frequency);
  92     Float::ms = Float::s / 1.0e3;
  93     Float::us = Float::s / 1.0e6;
  94     Float::ns = Float::s / 1.0e9;
  95     Float::ps = Float::s / 1.0e12;
  96
  97     Float::Hz  = 1.0 / Float::s;
  98     Float::kHz = 1.0 / Float::ms;
  99     Float::MHz = 1.0 / Float::us;
 100     Float::GHz = 1.0 / Float::ns;
 101
 102     Int::s  = Frequency;
 103     Int::ms = Int::s / 1000;
 104     Int::us = Int::ms / 1000;
 105     Int::ns = Int::us / 1000;
 106     Int::ps = Int::ns / 1000;
 107
 108     cprintf("Global frequency set at %d ticks per second\n", _ticksPerSecond);
 109
 110     _clockFrequencyFixed = true;
 111 }
 112 bool clockFrequencyFixed() { return _clockFrequencyFixed; }
 113
 114 void
 115 setClockFrequency(Tick tps)
 116 {
 117     panic_if(_clockFrequencyFixed,
 118             "Global frequency already fixed at %f ticks/s.", _ticksPerSecond);
 119     _ticksPerSecond = tps;
 120 }
 121 Tick getClockFrequency() { return _ticksPerSecond; }
 122
 123 void
 124 setOutputDir(const string &dir)
 125 {
 126     simout.setDirectory(dir);
 127 }
 128
 129 /**
 130  * Queue of C++ callbacks to invoke on simulator exit.
 131  */
 132 inline CallbackQueue &
 133 exitCallbacks()
 134 {
 135     static CallbackQueue theQueue;
 136     return theQueue;
 137 }
 138
 139 /**
 140  * Register an exit callback.
 141  */
 142 void
 143 registerExitCallback(Callback *callback)
 144 {
 145     exitCallbacks().add(callback);
 146 }
 147
 148 /**
 149  * Do C++ simulator exit processing.  Exported to Python to be invoked
 150  * when simulator terminates via Python's atexit mechanism.
 151  */
 152 void
 153 doExitCleanup()
 154 {
 155     exitCallbacks().process();
 156     exitCallbacks().clear();
 157
 158     cout.flush();
 159 }
 160