src/sim/core.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * Copyright (c) 2013 Advanced Micro Devices, Inc.
   4  * Copyright (c) 2013 Mark D. Hill and David A. Wood
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are
   9  * met: redistributions of source code must retain the above copyright
  10  * notice, this list of conditions and the following disclaimer;
  11  * redistributions in binary form must reproduce the above copyright
  12  * notice, this list of conditions and the following disclaimer in the
  13  * documentation and/or other materials provided with the distribution;
  14  * neither the name of the copyright holders nor the names of its
  15  * contributors may be used to endorse or promote products derived from
  16  * this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  *
  30  * Authors: Nathan Binkert
  31  *          Steve Reinhardt
  32  */
  33
  34 #ifndef __SIM_CORE_HH__
  35 #define __SIM_CORE_HH__
  36
  37 /** @file This header provides some core simulator functionality such as time
  38  * information, output directory and exit events
  39  */
  40
  41 #include <string>
  42
  43 #include "base/types.hh"
  44 #include "sim/eventq.hh"
  45
  46 /// The universal simulation clock.
  47 inline Tick curTick() { return _curEventQueue->getCurTick(); }
  48
  49 const Tick retryTime = 1000;
  50
  51 /// These are variables that are set based on the simulator frequency
  52 ///@{
  53 namespace SimClock {
  54 extern Tick Frequency; ///< The number of ticks that equal one second
  55
  56 namespace Float {
  57
  58 /** These variables equal the number of ticks in the unit of time they're
  59  * named after in a double.
  60  * @{
  61  */
  62 extern double s;  ///< second
  63 extern double ms; ///< millisecond
  64 extern double us; ///< microsecond
  65 extern double ns; ///< nanosecond
  66 extern double ps; ///< picosecond
  67 /** @} */
  68
  69 /** These variables the inverse of above. They're all < 1.
  70  * @{
  71  */
  72 extern double Hz;  ///< Hz
  73 extern double kHz; ///< kHz
  74 extern double MHz; ///< MHz
  75 extern double GHz; ///< GHz
  76 /** @}*/
  77 } // namespace Float
  78
  79 /** These variables equal the number of ticks in the unit of time they're
  80  *  named after in a 64 bit integer.
  81  *
  82  * @{
  83  */
  84 namespace Int {
  85 extern Tick s;  ///< second
  86 extern Tick ms; ///< millisecond
  87 extern Tick us; ///< microsecond
  88 extern Tick ns; ///< nanosecond
  89 extern Tick ps; ///< picosecond
  90 /** @} */
  91 } // namespace Int
  92 } // namespace SimClock
  93 /** @} */
  94
  95 void fixClockFrequency();
  96 bool clockFrequencyFixed();
  97
  98 void setClockFrequency(Tick ticksPerSecond);
  99 Tick getClockFrequency(); // Ticks per second.
 100
 101 void setOutputDir(const std::string &dir);
 102
 103 class Callback;
 104 void registerExitCallback(Callback *callback);
 105 void doExitCleanup();
 106
 107 #endif /* __SIM_CORE_HH__ */