src/sim/debug.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include "sim/debug.hh"
  30
  31 #include <string>
  32 #include <vector>
  33
  34 #include "base/debug.hh"
  35 #include "cpu/pc_event.hh"
  36 #include "sim/eventq.hh"
  37 #include "sim/global_event.hh"
  38 #include "sim/kernel_workload.hh"
  39 #include "sim/sim_events.hh"
  40 #include "sim/sim_exit.hh"
  41 #include "sim/system.hh"
  42
  43 using namespace std;
  44
  45 //
  46 // Debug event: place a breakpoint on the process function and
  47 // schedule the event to break at a particular cycle
  48 //
  49 struct DebugBreakEvent : public GlobalEvent
  50 {
  51     DebugBreakEvent(Tick when);
  52     void process();     // process event
  53     virtual const char *description() const;
  54 };
  55
  56 //
  57 // constructor: schedule at specified time
  58 //
  59 DebugBreakEvent::DebugBreakEvent(Tick when)
  60     : GlobalEvent(when, Debug_Break_Pri, AutoDelete)
  61 {
  62 }
  63
  64 //
  65 // handle debug event: set debugger breakpoint on this function
  66 //
  67 void
  68 DebugBreakEvent::process()
  69 {
  70     Debug::breakpoint();
  71 }
  72
  73
  74 const char *
  75 DebugBreakEvent::description() const
  76 {
  77     return "debug breakpoint";
  78 }
  79
  80 //
  81 // handy function to schedule DebugBreakEvent on main event queue
  82 // (callable from debugger)
  83 //
  84 void
  85 schedBreak(Tick when)
  86 {
  87     new DebugBreakEvent(when);
  88     warn("need to stop all queues");
  89 }
  90
  91 void
  92 schedRelBreak(Tick delta)
  93 {
  94     schedBreak(curTick() + delta);
  95 }
  96
  97 ///
  98 /// Function to cause the simulator to take a checkpoint from the debugger
  99 ///
 100 void
 101 takeCheckpoint(Tick when)
 102 {
 103     if (!when)
 104         when = curTick() + 1;
 105     exitSimLoop("checkpoint", 0, when, 0);
 106 }
 107
 108 void
 109 eventqDump()
 110 {
 111     for (uint32_t i = 0; i < numMainEventQueues; ++i) {
 112         mainEventQueue[i]->dump();
 113     }
 114 }
 115
 116 int remote_gdb_base_port = 7000;
 117
 118 int
 119 getRemoteGDBPort()
 120 {
 121     return remote_gdb_base_port;
 122 }
 123
 124 // Set remote GDB base port.  0 means disable remote GDB.
 125 // Callable from python.
 126 void
 127 setRemoteGDBPort(int port)
 128 {
 129     remote_gdb_base_port = port;
 130 }
 131