ARM: Add minimal ARM_SE support for m5threads.
[gem5.git] / src / sim / faults.cc
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 * Gabe Black
30 */
31
32 #include "arch/isa_traits.hh"
33 #include "base/misc.hh"
34 #include "cpu/thread_context.hh"
35 #include "cpu/base.hh"
36 #include "sim/faults.hh"
37 #include "sim/process.hh"
38 #include "mem/page_table.hh"
39
40 #if !FULL_SYSTEM
41 void FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
42 {
43 panic("fault (%s) detected @ PC %s", name(), tc->pcState());
44 }
45 #else
46 void FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
47 {
48 DPRINTF(Fault, "Fault %s at PC: %s\n", name(), tc->pcState());
49 assert(!tc->misspeculating());
50 }
51 #endif
52
53 void UnimpFault::invoke(ThreadContext * tc, StaticInstPtr inst)
54 {
55 panic("Unimpfault: %s\n", panicStr.c_str());
56 }
57
58 #if !FULL_SYSTEM
59 void GenericPageTableFault::invoke(ThreadContext *tc, StaticInstPtr inst)
60 {
61 Process *p = tc->getProcessPtr();
62
63 if (!p->checkAndAllocNextPage(vaddr))
64 panic("Page table fault when accessing virtual address %#x\n", vaddr);
65
66 }
67
68 void GenericAlignmentFault::invoke(ThreadContext *tc, StaticInstPtr inst)
69 {
70 panic("Alignment fault when accessing virtual address %#x\n", vaddr);
71 }
72 #endif