src/sim/faults.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Nathan Binkert
  29  *          Gabe Black
  30  */
  31
  32 #include "arch/isa_traits.hh"
  33 #include "base/misc.hh"
  34 #include "cpu/base.hh"
  35 #include "cpu/thread_context.hh"
  36 #include "debug/Fault.hh"
  37 #include "mem/page_table.hh"
  38 #include "sim/faults.hh"
  39 #include "sim/process.hh"
  40
  41 #if !FULL_SYSTEM
  42 void FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
  43 {
  44     panic("fault (%s) detected @ PC %s", name(), tc->pcState());
  45 }
  46 #else
  47 void FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
  48 {
  49     DPRINTF(Fault, "Fault %s at PC: %s\n", name(), tc->pcState());
  50     assert(!tc->misspeculating());
  51 }
  52 #endif
  53
  54 void UnimpFault::invoke(ThreadContext * tc, StaticInstPtr inst)
  55 {
  56     panic("Unimpfault: %s\n", panicStr.c_str());
  57 }
  58
  59 void ReExec::invoke(ThreadContext *tc, StaticInstPtr inst)
  60 {
  61     tc->pcState(tc->pcState());
  62 }
  63
  64
  65 #if !FULL_SYSTEM
  66 void GenericPageTableFault::invoke(ThreadContext *tc, StaticInstPtr inst)
  67 {
  68     Process *p = tc->getProcessPtr();
  69
  70     if (!p->fixupStackFault(vaddr))
  71         panic("Page table fault when accessing virtual address %#x\n", vaddr);
  72
  73 }
  74
  75 void GenericAlignmentFault::invoke(ThreadContext *tc, StaticInstPtr inst)
  76 {
  77     panic("Alignment fault when accessing virtual address %#x\n", vaddr);
  78 }
  79 #endif