2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
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9 * redistributions in binary form must reproduce the above copyright
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14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Steve Reinhardt
32 #ifndef __INSTRECORD_HH__
33 #define __INSTRECORD_HH__
35 #include "base/bigint.hh"
36 #include "base/trace.hh"
37 #include "base/types.hh"
38 #include "cpu/inst_seq.hh" // for InstSeqNum
39 #include "cpu/static_inst.hh"
40 #include "sim/sim_object.hh"
51 // The following fields are initialized by the constructor and
52 // thus guaranteed to be valid.
53 ThreadContext *thread;
54 // need to make this ref-counted so it doesn't go away before we
56 StaticInstPtr staticInst;
58 StaticInstPtr macroStaticInst;
62 // The remaining fields are only valid for particular instruction
63 // types (e.g, addresses for memory ops) or when particular
64 // options are enabled (e.g., tracing full register contents).
65 // Each data field has an associated valid flag to indicate
66 // whether the data field is valid.
76 DataInt8 = 1, // set to equal number of bytes
90 InstRecord(Tick _when, ThreadContext *_thread,
91 const StaticInstPtr _staticInst,
93 const StaticInstPtr _macroStaticInst = NULL,
95 : when(_when), thread(_thread),
96 staticInst(_staticInst), PC(_pc),
97 macroStaticInst(_macroStaticInst), upc(_upc),
100 data_status = DataInvalid;
103 fetch_seq_valid = false;
104 cp_seq_valid = false;
107 virtual ~InstRecord() { }
109 void setAddr(Addr a) { addr = a; addr_valid = true; }
111 void setData(Twin64_t d) { data.as_int = d.a; data_status = DataInt64; }
112 void setData(Twin32_t d) { data.as_int = d.a; data_status = DataInt32; }
113 void setData(uint64_t d) { data.as_int = d; data_status = DataInt64; }
114 void setData(uint32_t d) { data.as_int = d; data_status = DataInt32; }
115 void setData(uint16_t d) { data.as_int = d; data_status = DataInt16; }
116 void setData(uint8_t d) { data.as_int = d; data_status = DataInt8; }
118 void setData(int64_t d) { setData((uint64_t)d); }
119 void setData(int32_t d) { setData((uint32_t)d); }
120 void setData(int16_t d) { setData((uint16_t)d); }
121 void setData(int8_t d) { setData((uint8_t)d); }
123 void setData(double d) { data.as_double = d; data_status = DataDouble; }
125 void setFetchSeq(InstSeqNum seq)
126 { fetch_seq = seq; fetch_seq_valid = true; }
128 void setCPSeq(InstSeqNum seq)
129 { cp_seq = seq; cp_seq_valid = true; }
131 virtual void dump() = 0;
134 class InstTracer : public SimObject
137 InstTracer(const Params *p) : SimObject(p)
140 virtual ~InstTracer()
144 getInstRecord(Tick when, ThreadContext *tc,
145 const StaticInstPtr staticInst, Addr pc,
146 const StaticInstPtr macroStaticInst = NULL,
147 MicroPC _upc = 0) = 0;
152 }; // namespace Trace
154 #endif // __INSTRECORD_HH__