0dcf5c32b28985deabc4bb28324ad9cdd11d0c82
2 * Copyright (c) 2010-2012 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2011 Advanced Micro Devices, Inc.
15 * Copyright (c) 2003-2006 The Regents of The University of Michigan
16 * All rights reserved.
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Authors: Nathan Binkert
52 #include "arch/kernel_stats.hh"
53 #include "arch/utility.hh"
54 #include "arch/vtophys.hh"
55 #include "base/debug.hh"
56 #include "base/output.hh"
57 #include "config/the_isa.hh"
58 #include "cpu/base.hh"
59 #include "cpu/quiesce_event.hh"
60 #include "cpu/thread_context.hh"
61 #include "debug/Loader.hh"
62 #include "debug/PseudoInst.hh"
63 #include "debug/Quiesce.hh"
64 #include "debug/WorkItems.hh"
65 #include "params/BaseCPU.hh"
66 #include "sim/full_system.hh"
67 #include "sim/pseudo_inst.hh"
68 #include "sim/serialize.hh"
69 #include "sim/sim_events.hh"
70 #include "sim/sim_exit.hh"
71 #include "sim/stat_control.hh"
72 #include "sim/stats.hh"
73 #include "sim/system.hh"
74 #include "sim/vptr.hh"
78 using namespace Stats
;
79 using namespace TheISA
;
81 namespace PseudoInst
{
84 panicFsOnlyPseudoInst(const char *name
)
86 panic("Pseudo inst \"%s\" is only available in Full System mode.");
90 pseudoInst(ThreadContext
*tc
, uint8_t func
, uint8_t subfunc
)
94 DPRINTF(PseudoInst
, "PseudoInst::pseudoInst(%i, %i)\n", func
, subfunc
);
96 // We need to do this in a slightly convoluted way since
97 // getArgument() might have side-effects on arg_num. We could have
98 // used the Argument class, but due to the possible side effects
99 // from getArgument, it'd most likely break.
101 for (int i
= 0; i
< sizeof(args
) / sizeof(*args
); ++i
)
102 args
[arg_num
++] = getArgument(tc
, arg_num
, sizeof(uint64_t), false);
105 case 0x00: // arm_func
109 case 0x01: // quiesce_func
113 case 0x02: // quiescens_func
117 case 0x03: // quiescecycle_func
118 quiesceNs(tc
, args
[0]);
121 case 0x04: // quiescetime_func
122 return quiesceTime(tc
);
124 case 0x07: // rpns_func
127 case 0x09: // wakecpu_func
128 wakeCPU(tc
, args
[0]);
131 case 0x21: // exit_func
136 m5fail(tc
, args
[0], args
[1]);
139 case 0x30: // initparam_func
140 return initParam(tc
);
142 case 0x31: // loadsymbol_func
146 case 0x40: // resetstats_func
147 resetstats(tc
, args
[0], args
[1]);
150 case 0x41: // dumpstats_func
151 dumpstats(tc
, args
[0], args
[1]);
154 case 0x42: // dumprststats_func
155 dumpresetstats(tc
, args
[0], args
[1]);
158 case 0x43: // ckpt_func
159 m5checkpoint(tc
, args
[0], args
[1]);
162 case 0x4f: // writefile_func
163 return writefile(tc
, args
[0], args
[1], args
[2], args
[3]);
165 case 0x50: // readfile_func
166 return readfile(tc
, args
[0], args
[1], args
[2]);
168 case 0x51: // debugbreak_func
172 case 0x52: // switchcpu_func
176 case 0x53: // addsymbol_func
177 addsymbol(tc
, args
[0], args
[1]);
180 case 0x54: // panic_func
181 panic("M5 panic instruction called at %s\n", tc
->pcState());
183 case 0x5a: // work_begin_func
184 workbegin(tc
, args
[0], args
[1]);
187 case 0x5b: // work_end_func
188 workend(tc
, args
[0], args
[1]);
191 case 0x55: // annotate_func
192 case 0x56: // reserved2_func
193 case 0x57: // reserved3_func
194 case 0x58: // reserved4_func
195 case 0x59: // reserved5_func
196 warn("Unimplemented m5 op (0x%x)\n", func
);
200 warn("Unhandled m5 op: 0x%x\n", func
);
208 arm(ThreadContext
*tc
)
210 DPRINTF(PseudoInst
, "PseudoInst::arm()\n");
212 panicFsOnlyPseudoInst("arm");
214 if (tc
->getKernelStats())
215 tc
->getKernelStats()->arm();
219 quiesce(ThreadContext
*tc
)
221 DPRINTF(PseudoInst
, "PseudoInst::quiesce()\n");
223 panicFsOnlyPseudoInst("quiesce");
225 if (!tc
->getCpuPtr()->params()->do_quiesce
)
228 DPRINTF(Quiesce
, "%s: quiesce()\n", tc
->getCpuPtr()->name());
231 if (tc
->getKernelStats())
232 tc
->getKernelStats()->quiesce();
236 quiesceSkip(ThreadContext
*tc
)
238 DPRINTF(PseudoInst
, "PseudoInst::quiesceSkip()\n");
240 panicFsOnlyPseudoInst("quiesceSkip");
242 BaseCPU
*cpu
= tc
->getCpuPtr();
244 if (!cpu
->params()->do_quiesce
)
247 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
249 Tick resume
= curTick() + 1;
251 cpu
->reschedule(quiesceEvent
, resume
, true);
253 DPRINTF(Quiesce
, "%s: quiesceSkip() until %d\n",
254 cpu
->name(), resume
);
257 if (tc
->getKernelStats())
258 tc
->getKernelStats()->quiesce();
262 quiesceNs(ThreadContext
*tc
, uint64_t ns
)
264 DPRINTF(PseudoInst
, "PseudoInst::quiesceNs(%i)\n", ns
);
266 panicFsOnlyPseudoInst("quiesceNs");
268 BaseCPU
*cpu
= tc
->getCpuPtr();
270 if (!cpu
->params()->do_quiesce
|| ns
== 0)
273 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
275 Tick resume
= curTick() + SimClock::Int::ns
* ns
;
277 cpu
->reschedule(quiesceEvent
, resume
, true);
279 DPRINTF(Quiesce
, "%s: quiesceNs(%d) until %d\n",
280 cpu
->name(), ns
, resume
);
283 if (tc
->getKernelStats())
284 tc
->getKernelStats()->quiesce();
288 quiesceCycles(ThreadContext
*tc
, uint64_t cycles
)
290 DPRINTF(PseudoInst
, "PseudoInst::quiesceCycles(%i)\n", cycles
);
292 panicFsOnlyPseudoInst("quiesceCycles");
294 BaseCPU
*cpu
= tc
->getCpuPtr();
296 if (!cpu
->params()->do_quiesce
|| cycles
== 0)
299 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
301 Tick resume
= cpu
->clockEdge(Cycles(cycles
));
303 cpu
->reschedule(quiesceEvent
, resume
, true);
305 DPRINTF(Quiesce
, "%s: quiesceCycles(%d) until %d\n",
306 cpu
->name(), cycles
, resume
);
309 if (tc
->getKernelStats())
310 tc
->getKernelStats()->quiesce();
314 quiesceTime(ThreadContext
*tc
)
316 DPRINTF(PseudoInst
, "PseudoInst::quiesceTime()\n");
318 panicFsOnlyPseudoInst("quiesceTime");
322 return (tc
->readLastActivate() - tc
->readLastSuspend()) /
327 rpns(ThreadContext
*tc
)
329 DPRINTF(PseudoInst
, "PseudoInst::rpns()\n");
330 return curTick() / SimClock::Int::ns
;
334 wakeCPU(ThreadContext
*tc
, uint64_t cpuid
)
336 DPRINTF(PseudoInst
, "PseudoInst::wakeCPU(%i)\n", cpuid
);
337 System
*sys
= tc
->getSystemPtr();
338 ThreadContext
*other_tc
= sys
->threadContexts
[cpuid
];
339 if (other_tc
->status() == ThreadContext::Suspended
)
340 other_tc
->activate();
344 m5exit(ThreadContext
*tc
, Tick delay
)
346 DPRINTF(PseudoInst
, "PseudoInst::m5exit(%i)\n", delay
);
347 Tick when
= curTick() + delay
* SimClock::Int::ns
;
348 exitSimLoop("m5_exit instruction encountered", 0, when
);
352 m5fail(ThreadContext
*tc
, Tick delay
, uint64_t code
)
354 DPRINTF(PseudoInst
, "PseudoInst::m5fail(%i, %i)\n", delay
, code
);
355 Tick when
= curTick() + delay
* SimClock::Int::ns
;
356 exitSimLoop("m5_fail instruction encountered", code
, when
);
360 loadsymbol(ThreadContext
*tc
)
362 DPRINTF(PseudoInst
, "PseudoInst::loadsymbol()\n");
364 panicFsOnlyPseudoInst("loadsymbol");
366 const string
&filename
= tc
->getCpuPtr()->system
->params()->symbolfile
;
367 if (filename
.empty()) {
372 ifstream
file(filename
.c_str());
375 fatal("file error: Can't open symbol table file %s\n", filename
);
377 while (!file
.eof()) {
378 getline(file
, buffer
);
383 string::size_type idx
= buffer
.find(' ');
384 if (idx
== string::npos
)
387 string address
= "0x" + buffer
.substr(0, idx
);
392 // Skip over letter and space
393 string symbol
= buffer
.substr(idx
+ 3);
399 if (!to_number(address
, addr
))
402 if (!tc
->getSystemPtr()->kernelSymtab
->insert(addr
, symbol
))
406 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
412 addsymbol(ThreadContext
*tc
, Addr addr
, Addr symbolAddr
)
414 DPRINTF(PseudoInst
, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
417 panicFsOnlyPseudoInst("addSymbol");
420 CopyStringOut(tc
, symb
, symbolAddr
, 100);
421 std::string
symbol(symb
);
423 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
425 tc
->getSystemPtr()->kernelSymtab
->insert(addr
,symbol
);
426 debugSymbolTable
->insert(addr
,symbol
);
430 initParam(ThreadContext
*tc
)
432 DPRINTF(PseudoInst
, "PseudoInst::initParam()\n");
434 panicFsOnlyPseudoInst("initParam");
438 return tc
->getCpuPtr()->system
->init_param
;
443 resetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
445 DPRINTF(PseudoInst
, "PseudoInst::resetstats(%i, %i)\n", delay
, period
);
446 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
450 Tick when
= curTick() + delay
* SimClock::Int::ns
;
451 Tick repeat
= period
* SimClock::Int::ns
;
453 Stats::schedStatEvent(false, true, when
, repeat
);
457 dumpstats(ThreadContext
*tc
, Tick delay
, Tick period
)
459 DPRINTF(PseudoInst
, "PseudoInst::dumpstats(%i, %i)\n", delay
, period
);
460 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
464 Tick when
= curTick() + delay
* SimClock::Int::ns
;
465 Tick repeat
= period
* SimClock::Int::ns
;
467 Stats::schedStatEvent(true, false, when
, repeat
);
471 dumpresetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
473 DPRINTF(PseudoInst
, "PseudoInst::dumpresetstats(%i, %i)\n", delay
, period
);
474 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
478 Tick when
= curTick() + delay
* SimClock::Int::ns
;
479 Tick repeat
= period
* SimClock::Int::ns
;
481 Stats::schedStatEvent(true, true, when
, repeat
);
485 m5checkpoint(ThreadContext
*tc
, Tick delay
, Tick period
)
487 DPRINTF(PseudoInst
, "PseudoInst::m5checkpoint(%i, %i)\n", delay
, period
);
488 if (!tc
->getCpuPtr()->params()->do_checkpoint_insts
)
491 Tick when
= curTick() + delay
* SimClock::Int::ns
;
492 Tick repeat
= period
* SimClock::Int::ns
;
494 exitSimLoop("checkpoint", 0, when
, repeat
);
498 readfile(ThreadContext
*tc
, Addr vaddr
, uint64_t len
, uint64_t offset
)
500 DPRINTF(PseudoInst
, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
503 panicFsOnlyPseudoInst("readfile");
507 const string
&file
= tc
->getSystemPtr()->params()->readfile
;
514 int fd
= ::open(file
.c_str(), O_RDONLY
, 0);
516 panic("could not open file %s\n", file
);
518 if (::lseek(fd
, offset
, SEEK_SET
) < 0)
519 panic("could not seek: %s", strerror(errno
));
521 char *buf
= new char[len
];
524 int bytes
= ::read(fd
, p
, len
);
534 CopyIn(tc
, vaddr
, buf
, result
);
540 writefile(ThreadContext
*tc
, Addr vaddr
, uint64_t len
, uint64_t offset
,
543 DPRINTF(PseudoInst
, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
544 vaddr
, len
, offset
, filename_addr
);
547 // copy out target filename
549 std::string filename
;
550 CopyStringOut(tc
, fn
, filename_addr
, 100);
551 filename
= std::string(fn
);
554 // create a new file (truncate)
555 os
= simout
.create(filename
, true);
557 // do not truncate file if offset is non-zero
558 // (ios::in flag is required as well to keep the existing data
559 // intact, otherwise existing data will be zeroed out.)
560 os
= simout
.openFile(simout
.directory() + filename
,
561 ios::in
| ios::out
| ios::binary
);
564 panic("could not open file %s\n", filename
);
569 // copy out data and write to file
570 char *buf
= new char[len
];
571 CopyOut(tc
, buf
, vaddr
, len
);
573 if (os
->fail() || os
->bad())
574 panic("Error while doing writefile!\n");
584 debugbreak(ThreadContext
*tc
)
586 DPRINTF(PseudoInst
, "PseudoInst::debugbreak()\n");
591 switchcpu(ThreadContext
*tc
)
593 DPRINTF(PseudoInst
, "PseudoInst::switchcpu()\n");
594 exitSimLoop("switchcpu");
598 // This function is executed when annotated work items begin. Depending on
599 // what the user specified at the command line, the simulation may exit and/or
600 // take a checkpoint when a certain work item begins.
603 workbegin(ThreadContext
*tc
, uint64_t workid
, uint64_t threadid
)
605 DPRINTF(PseudoInst
, "PseudoInst::workbegin(%i, %i)\n", workid
, threadid
);
606 tc
->getCpuPtr()->workItemBegin();
607 System
*sys
= tc
->getSystemPtr();
608 const System::Params
*params
= sys
->params();
609 sys
->workItemBegin(threadid
, workid
);
611 DPRINTF(WorkItems
, "Work Begin workid: %d, threadid %d\n", workid
,
615 // If specified, determine if this is the specific work item the user
618 if (params
->work_item_id
== -1 || params
->work_item_id
== workid
) {
620 uint64_t systemWorkBeginCount
= sys
->incWorkItemsBegin();
621 int cpuId
= tc
->getCpuPtr()->cpuId();
623 if (params
->work_cpus_ckpt_count
!= 0 &&
624 sys
->markWorkItem(cpuId
) >= params
->work_cpus_ckpt_count
) {
626 // If active cpus equals checkpoint count, create checkpoint
628 exitSimLoop("checkpoint");
631 if (systemWorkBeginCount
== params
->work_begin_ckpt_count
) {
633 // Note: the string specified as the cause of the exit event must
634 // exactly equal "checkpoint" inorder to create a checkpoint
636 exitSimLoop("checkpoint");
639 if (systemWorkBeginCount
== params
->work_begin_exit_count
) {
641 // If a certain number of work items started, exit simulation
643 exitSimLoop("work started count reach");
646 if (cpuId
== params
->work_begin_cpu_id_exit
) {
648 // If work started on the cpu id specified, exit simulation
650 exitSimLoop("work started on specific cpu");
656 // This function is executed when annotated work items end. Depending on
657 // what the user specified at the command line, the simulation may exit and/or
658 // take a checkpoint when a certain work item ends.
661 workend(ThreadContext
*tc
, uint64_t workid
, uint64_t threadid
)
663 DPRINTF(PseudoInst
, "PseudoInst::workend(%i, %i)\n", workid
, threadid
);
664 tc
->getCpuPtr()->workItemEnd();
665 System
*sys
= tc
->getSystemPtr();
666 const System::Params
*params
= sys
->params();
667 sys
->workItemEnd(threadid
, workid
);
669 DPRINTF(WorkItems
, "Work End workid: %d, threadid %d\n", workid
, threadid
);
672 // If specified, determine if this is the specific work item the user
675 if (params
->work_item_id
== -1 || params
->work_item_id
== workid
) {
677 uint64_t systemWorkEndCount
= sys
->incWorkItemsEnd();
678 int cpuId
= tc
->getCpuPtr()->cpuId();
680 if (params
->work_cpus_ckpt_count
!= 0 &&
681 sys
->markWorkItem(cpuId
) >= params
->work_cpus_ckpt_count
) {
683 // If active cpus equals checkpoint count, create checkpoint
685 exitSimLoop("checkpoint");
688 if (params
->work_end_ckpt_count
!= 0 &&
689 systemWorkEndCount
== params
->work_end_ckpt_count
) {
691 // If total work items completed equals checkpoint count, create
694 exitSimLoop("checkpoint");
697 if (params
->work_end_exit_count
!= 0 &&
698 systemWorkEndCount
== params
->work_end_exit_count
) {
700 // If total work items completed equals exit count, exit simulation
702 exitSimLoop("work items exit count reached");
707 } // namespace PseudoInst