3c2a27f5454034ea6171ff26f7e1fe225a536c2a
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Nathan Binkert
38 #include "arch/kernel_stats.hh"
39 #include "arch/vtophys.hh"
40 #include "base/debug.hh"
41 #include "cpu/base.hh"
42 #include "cpu/thread_context.hh"
43 #include "cpu/quiesce_event.hh"
44 #include "params/BaseCPU.hh"
45 #include "sim/pseudo_inst.hh"
46 #include "sim/serialize.hh"
47 #include "sim/sim_events.hh"
48 #include "sim/sim_exit.hh"
49 #include "sim/stat_control.hh"
50 #include "sim/stats.hh"
51 #include "sim/system.hh"
53 #include "sim/vptr.hh"
58 using namespace Stats
;
59 using namespace TheISA
;
61 namespace PseudoInst
{
66 arm(ThreadContext
*tc
)
68 if (tc
->getKernelStats())
69 tc
->getKernelStats()->arm();
73 quiesce(ThreadContext
*tc
)
75 if (!tc
->getCpuPtr()->params()->do_quiesce
)
78 DPRINTF(Quiesce
, "%s: quiesce()\n", tc
->getCpuPtr()->name());
81 if (tc
->getKernelStats())
82 tc
->getKernelStats()->quiesce();
86 quiesceNs(ThreadContext
*tc
, uint64_t ns
)
88 if (!tc
->getCpuPtr()->params()->do_quiesce
|| ns
== 0)
91 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
93 Tick resume
= curTick
+ Clock::Int::ns
* ns
;
95 mainEventQueue
.reschedule(quiesceEvent
, resume
, true);
97 DPRINTF(Quiesce
, "%s: quiesceNs(%d) until %d\n",
98 tc
->getCpuPtr()->name(), ns
, resume
);
101 if (tc
->getKernelStats())
102 tc
->getKernelStats()->quiesce();
106 quiesceCycles(ThreadContext
*tc
, uint64_t cycles
)
108 if (!tc
->getCpuPtr()->params()->do_quiesce
|| cycles
== 0)
111 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
113 Tick resume
= curTick
+ tc
->getCpuPtr()->ticks(cycles
);
115 mainEventQueue
.reschedule(quiesceEvent
, resume
, true);
117 DPRINTF(Quiesce
, "%s: quiesceCycles(%d) until %d\n",
118 tc
->getCpuPtr()->name(), cycles
, resume
);
121 if (tc
->getKernelStats())
122 tc
->getKernelStats()->quiesce();
126 quiesceTime(ThreadContext
*tc
)
128 return (tc
->readLastActivate() - tc
->readLastSuspend()) / Clock::Int::ns
;
134 rpns(ThreadContext
*tc
)
136 return curTick
/ Clock::Int::ns
;
140 wakeCPU(ThreadContext
*tc
, uint64_t cpuid
)
142 System
*sys
= tc
->getSystemPtr();
143 ThreadContext
*other_tc
= sys
->threadContexts
[cpuid
];
144 if (other_tc
->status() == ThreadContext::Suspended
)
145 other_tc
->activate();
149 m5exit(ThreadContext
*tc
, Tick delay
)
151 Tick when
= curTick
+ delay
* Clock::Int::ns
;
152 Event
*event
= new SimLoopExitEvent("m5_exit instruction encountered", 0);
153 mainEventQueue
.schedule(event
, when
);
159 loadsymbol(ThreadContext
*tc
)
161 const string
&filename
= tc
->getCpuPtr()->system
->params()->symbolfile
;
162 if (filename
.empty()) {
167 ifstream
file(filename
.c_str());
170 fatal("file error: Can't open symbol table file %s\n", filename
);
172 while (!file
.eof()) {
173 getline(file
, buffer
);
178 int idx
= buffer
.find(' ');
179 if (idx
== string::npos
)
182 string address
= "0x" + buffer
.substr(0, idx
);
187 // Skip over letter and space
188 string symbol
= buffer
.substr(idx
+ 3);
194 if (!to_number(address
, addr
))
197 if (!tc
->getSystemPtr()->kernelSymtab
->insert(addr
, symbol
))
201 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
207 addsymbol(ThreadContext
*tc
, Addr addr
, Addr symbolAddr
)
210 CopyStringOut(tc
, symb
, symbolAddr
, 100);
211 std::string
symbol(symb
);
213 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
215 tc
->getSystemPtr()->kernelSymtab
->insert(addr
,symbol
);
216 debugSymbolTable
->insert(addr
,symbol
);
223 resetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
225 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
229 Tick when
= curTick
+ delay
* Clock::Int::ns
;
230 Tick repeat
= period
* Clock::Int::ns
;
232 Stats::StatEvent(false, true, when
, repeat
);
236 dumpstats(ThreadContext
*tc
, Tick delay
, Tick period
)
238 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
242 Tick when
= curTick
+ delay
* Clock::Int::ns
;
243 Tick repeat
= period
* Clock::Int::ns
;
245 Stats::StatEvent(true, false, when
, repeat
);
249 dumpresetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
251 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
255 Tick when
= curTick
+ delay
* Clock::Int::ns
;
256 Tick repeat
= period
* Clock::Int::ns
;
258 Stats::StatEvent(true, true, when
, repeat
);
262 m5checkpoint(ThreadContext
*tc
, Tick delay
, Tick period
)
264 if (!tc
->getCpuPtr()->params()->do_checkpoint_insts
)
267 Tick when
= curTick
+ delay
* Clock::Int::ns
;
268 Tick repeat
= period
* Clock::Int::ns
;
270 Event
*event
= new SimLoopExitEvent("checkpoint", 0, repeat
);
271 mainEventQueue
.schedule(event
, when
);
277 readfile(ThreadContext
*tc
, Addr vaddr
, uint64_t len
, uint64_t offset
)
279 const string
&file
= tc
->getSystemPtr()->params()->readfile
;
286 int fd
= ::open(file
.c_str(), O_RDONLY
, 0);
288 panic("could not open file %s\n", file
);
290 if (::lseek(fd
, offset
, SEEK_SET
) < 0)
291 panic("could not seek: %s", strerror(errno
));
293 char *buf
= new char[len
];
296 int bytes
= ::read(fd
, p
, len
);
306 CopyIn(tc
, vaddr
, buf
, result
);
314 debugbreak(ThreadContext
*tc
)
320 switchcpu(ThreadContext
*tc
)
322 exitSimLoop("switchcpu");
325 /* namespace PseudoInst */ }