src/sim/pseudo_inst.cc

   1 /*
   2  * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2011 Advanced Micro Devices, Inc.
  15  * Copyright (c) 2003-2006 The Regents of The University of Michigan
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Nathan Binkert
  42  */
  43
  44 #include "sim/pseudo_inst.hh"
  45
  46 #include <fcntl.h>
  47 #include <unistd.h>
  48
  49 #include <cerrno>
  50 #include <fstream>
  51 #include <string>
  52 #include <vector>
  53
  54 #include <gem5/asm/generic/m5ops.h>
  55
  56 #include "arch/pseudo_inst.hh"
  57 #include "arch/utility.hh"
  58 #include "arch/vtophys.hh"
  59 #include "base/debug.hh"
  60 #include "base/output.hh"
  61 #include "config/the_isa.hh"
  62 #include "cpu/base.hh"
  63 #include "cpu/quiesce_event.hh"
  64 #include "cpu/thread_context.hh"
  65 #include "debug/Loader.hh"
  66 #include "debug/PseudoInst.hh"
  67 #include "debug/Quiesce.hh"
  68 #include "debug/WorkItems.hh"
  69 #include "dev/net/dist_iface.hh"
  70 #include "kern/kernel_stats.hh"
  71 #include "params/BaseCPU.hh"
  72 #include "sim/full_system.hh"
  73 #include "sim/initparam_keys.hh"
  74 #include "sim/process.hh"
  75 #include "sim/serialize.hh"
  76 #include "sim/sim_events.hh"
  77 #include "sim/sim_exit.hh"
  78 #include "sim/stat_control.hh"
  79 #include "sim/stats.hh"
  80 #include "sim/system.hh"
  81 #include "sim/vptr.hh"
  82
  83 using namespace std;
  84
  85 using namespace Stats;
  86 using namespace TheISA;
  87
  88 namespace PseudoInst {
  89
  90 static inline void
  91 panicFsOnlyPseudoInst(const char *name)
  92 {
  93     panic("Pseudo inst \"%s\" is only available in Full System mode.");
  94 }
  95
  96 uint64_t
  97 pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc)
  98 {
  99     uint64_t args[4];
 100
 101     DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc);
 102
 103     // We need to do this in a slightly convoluted way since
 104     // getArgument() might have side-effects on arg_num. We could have
 105     // used the Argument class, but due to the possible side effects
 106     // from getArgument, it'd most likely break.
 107     int arg_num(0);
 108     for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) {
 109         args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false);
 110         ++arg_num;
 111     }
 112
 113     switch (func) {
 114       case M5OP_ARM:
 115         arm(tc);
 116         break;
 117
 118       case M5OP_QUIESCE:
 119         quiesce(tc);
 120         break;
 121
 122       case M5OP_QUIESCE_NS:
 123         quiesceNs(tc, args[0]);
 124         break;
 125
 126       case M5OP_QUIESCE_CYCLE:
 127         quiesceCycles(tc, args[0]);
 128         break;
 129
 130       case M5OP_QUIESCE_TIME:
 131         return quiesceTime(tc);
 132
 133       case M5OP_RPNS:
 134         return rpns(tc);
 135
 136       case M5OP_WAKE_CPU:
 137         wakeCPU(tc, args[0]);
 138         break;
 139
 140       case M5OP_EXIT:
 141         m5exit(tc, args[0]);
 142         break;
 143
 144       case M5OP_FAIL:
 145         m5fail(tc, args[0], args[1]);
 146         break;
 147
 148       case M5OP_INIT_PARAM:
 149         return initParam(tc, args[0], args[1]);
 150
 151       case M5OP_LOAD_SYMBOL:
 152         loadsymbol(tc);
 153         break;
 154
 155       case M5OP_RESET_STATS:
 156         resetstats(tc, args[0], args[1]);
 157         break;
 158
 159       case M5OP_DUMP_STATS:
 160         dumpstats(tc, args[0], args[1]);
 161         break;
 162
 163       case M5OP_DUMP_RESET_STATS:
 164         dumpresetstats(tc, args[0], args[1]);
 165         break;
 166
 167       case M5OP_CHECKPOINT:
 168         m5checkpoint(tc, args[0], args[1]);
 169         break;
 170
 171       case M5OP_WRITE_FILE:
 172         return writefile(tc, args[0], args[1], args[2], args[3]);
 173
 174       case M5OP_READ_FILE:
 175         return readfile(tc, args[0], args[1], args[2]);
 176
 177       case M5OP_DEBUG_BREAK:
 178         debugbreak(tc);
 179         break;
 180
 181       case M5OP_SWITCH_CPU:
 182         switchcpu(tc);
 183         break;
 184
 185       case M5OP_ADD_SYMBOL:
 186         addsymbol(tc, args[0], args[1]);
 187         break;
 188
 189       case M5OP_PANIC:
 190         panic("M5 panic instruction called at %s\n", tc->pcState());
 191
 192       case M5OP_WORK_BEGIN:
 193         workbegin(tc, args[0], args[1]);
 194         break;
 195
 196       case M5OP_WORK_END:
 197         workend(tc, args[0], args[1]);
 198         break;
 199
 200       case M5OP_ANNOTATE:
 201       case M5OP_RESERVED2:
 202       case M5OP_RESERVED3:
 203       case M5OP_RESERVED4:
 204       case M5OP_RESERVED5:
 205         warn("Unimplemented m5 op (0x%x)\n", func);
 206         break;
 207
 208       /* SE mode functions */
 209       case M5OP_SE_SYSCALL:
 210         m5Syscall(tc);
 211         break;
 212
 213       case M5OP_SE_PAGE_FAULT:
 214         m5PageFault(tc);
 215         break;
 216
 217       /* dist-gem5 functions */
 218       case M5OP_DIST_TOGGLE_SYNC:
 219         togglesync(tc);
 220         break;
 221
 222       default:
 223         warn("Unhandled m5 op: 0x%x\n", func);
 224         break;
 225     }
 226
 227     return 0;
 228 }
 229
 230 void
 231 arm(ThreadContext *tc)
 232 {
 233     DPRINTF(PseudoInst, "PseudoInst::arm()\n");
 234     if (!FullSystem)
 235         panicFsOnlyPseudoInst("arm");
 236
 237     if (tc->getKernelStats())
 238         tc->getKernelStats()->arm();
 239 }
 240
 241 void
 242 quiesce(ThreadContext *tc)
 243 {
 244     DPRINTF(PseudoInst, "PseudoInst::quiesce()\n");
 245     tc->quiesce();
 246 }
 247
 248 void
 249 quiesceSkip(ThreadContext *tc)
 250 {
 251     DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n");
 252     tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1);
 253 }
 254
 255 void
 256 quiesceNs(ThreadContext *tc, uint64_t ns)
 257 {
 258     DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
 259     tc->quiesceTick(curTick() + SimClock::Int::ns * ns);
 260 }
 261
 262 void
 263 quiesceCycles(ThreadContext *tc, uint64_t cycles)
 264 {
 265     DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles);
 266     tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles)));
 267 }
 268
 269 uint64_t
 270 quiesceTime(ThreadContext *tc)
 271 {
 272     DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
 273
 274     return (tc->readLastActivate() - tc->readLastSuspend()) /
 275         SimClock::Int::ns;
 276 }
 277
 278 uint64_t
 279 rpns(ThreadContext *tc)
 280 {
 281     DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
 282     return curTick() / SimClock::Int::ns;
 283 }
 284
 285 void
 286 wakeCPU(ThreadContext *tc, uint64_t cpuid)
 287 {
 288     DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid);
 289     System *sys = tc->getSystemPtr();
 290
 291     if (sys->numContexts() <= cpuid) {
 292         warn("PseudoInst::wakeCPU(%i), cpuid greater than number of contexts"
 293              "(%i)\n",cpuid, sys->numContexts());
 294         return;
 295     }
 296
 297     ThreadContext *other_tc = sys->threadContexts[cpuid];
 298     if (other_tc->status() == ThreadContext::Suspended)
 299         other_tc->activate();
 300 }
 301
 302 void
 303 m5exit(ThreadContext *tc, Tick delay)
 304 {
 305     DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
 306     if (DistIface::readyToExit(delay)) {
 307         Tick when = curTick() + delay * SimClock::Int::ns;
 308         exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
 309     }
 310 }
 311
 312 void
 313 m5fail(ThreadContext *tc, Tick delay, uint64_t code)
 314 {
 315     DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
 316     Tick when = curTick() + delay * SimClock::Int::ns;
 317     exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
 318 }
 319
 320 void
 321 loadsymbol(ThreadContext *tc)
 322 {
 323     DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n");
 324     if (!FullSystem)
 325         panicFsOnlyPseudoInst("loadsymbol");
 326
 327     const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
 328     if (filename.empty()) {
 329         return;
 330     }
 331
 332     std::string buffer;
 333     ifstream file(filename.c_str());
 334
 335     if (!file)
 336         fatal("file error: Can't open symbol table file %s\n", filename);
 337
 338     while (!file.eof()) {
 339         getline(file, buffer);
 340
 341         if (buffer.empty())
 342             continue;
 343
 344         string::size_type idx = buffer.find(' ');
 345         if (idx == string::npos)
 346             continue;
 347
 348         string address = "0x" + buffer.substr(0, idx);
 349         eat_white(address);
 350         if (address.empty())
 351             continue;
 352
 353         // Skip over letter and space
 354         string symbol = buffer.substr(idx + 3);
 355         eat_white(symbol);
 356         if (symbol.empty())
 357             continue;
 358
 359         Addr addr;
 360         if (!to_number(address, addr))
 361             continue;
 362
 363         if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
 364             continue;
 365
 366
 367         DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
 368     }
 369     file.close();
 370 }
 371
 372 void
 373 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
 374 {
 375     DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
 376             addr, symbolAddr);
 377     if (!FullSystem)
 378         panicFsOnlyPseudoInst("addSymbol");
 379
 380     std::string symbol;
 381     tc->getVirtProxy().readString(symbol, symbolAddr);
 382
 383     DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
 384
 385     tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
 386     debugSymbolTable->insert(addr,symbol);
 387 }
 388
 389 uint64_t
 390 initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
 391 {
 392     DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1,
 393             (char *)&key_str2);
 394     if (!FullSystem) {
 395         panicFsOnlyPseudoInst("initParam");
 396         return 0;
 397     }
 398
 399     // The key parameter string is passed in via two 64-bit registers. We copy
 400     // out the characters from the 64-bit integer variables here and concatenate
 401     // them in the key_str character buffer
 402     const int len = 2 * sizeof(uint64_t) + 1;
 403     char key_str[len];
 404     memset(key_str, '\0', len);
 405     if (key_str1 == 0) {
 406         assert(key_str2 == 0);
 407     } else {
 408         strncpy(key_str, (char *)&key_str1, sizeof(uint64_t));
 409     }
 410
 411     if (strlen(key_str) == sizeof(uint64_t)) {
 412         strncpy(key_str + sizeof(uint64_t), (char *)&key_str2,
 413                 sizeof(uint64_t));
 414     } else {
 415         assert(key_str2 == 0);
 416     }
 417
 418     // Compare the key parameter with the known values to select the return
 419     // value
 420     uint64_t val;
 421     if (strcmp(key_str, InitParamKey::DEFAULT) == 0) {
 422         val = tc->getCpuPtr()->system->init_param;
 423     } else if (strcmp(key_str, InitParamKey::DIST_RANK) == 0) {
 424         val = DistIface::rankParam();
 425     } else if (strcmp(key_str, InitParamKey::DIST_SIZE) == 0) {
 426         val = DistIface::sizeParam();
 427     } else {
 428         panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str);
 429     }
 430     return val;
 431 }
 432
 433
 434 void
 435 resetstats(ThreadContext *tc, Tick delay, Tick period)
 436 {
 437     DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
 438     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 439         return;
 440
 441
 442     Tick when = curTick() + delay * SimClock::Int::ns;
 443     Tick repeat = period * SimClock::Int::ns;
 444
 445     Stats::schedStatEvent(false, true, when, repeat);
 446 }
 447
 448 void
 449 dumpstats(ThreadContext *tc, Tick delay, Tick period)
 450 {
 451     DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period);
 452     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 453         return;
 454
 455
 456     Tick when = curTick() + delay * SimClock::Int::ns;
 457     Tick repeat = period * SimClock::Int::ns;
 458
 459     Stats::schedStatEvent(true, false, when, repeat);
 460 }
 461
 462 void
 463 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
 464 {
 465     DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period);
 466     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 467         return;
 468
 469
 470     Tick when = curTick() + delay * SimClock::Int::ns;
 471     Tick repeat = period * SimClock::Int::ns;
 472
 473     Stats::schedStatEvent(true, true, when, repeat);
 474 }
 475
 476 void
 477 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
 478 {
 479     DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period);
 480     if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
 481         return;
 482
 483     if (DistIface::readyToCkpt(delay, period)) {
 484         Tick when = curTick() + delay * SimClock::Int::ns;
 485         Tick repeat = period * SimClock::Int::ns;
 486         exitSimLoop("checkpoint", 0, when, repeat);
 487     }
 488 }
 489
 490 uint64_t
 491 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
 492 {
 493     DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
 494             vaddr, len, offset);
 495     if (!FullSystem) {
 496         panicFsOnlyPseudoInst("readfile");
 497         return 0;
 498     }
 499
 500     const string &file = tc->getSystemPtr()->params()->readfile;
 501     if (file.empty()) {
 502         return ULL(0);
 503     }
 504
 505     uint64_t result = 0;
 506
 507     int fd = ::open(file.c_str(), O_RDONLY, 0);
 508     if (fd < 0)
 509         panic("could not open file %s\n", file);
 510
 511     if (::lseek(fd, offset, SEEK_SET) < 0)
 512         panic("could not seek: %s", strerror(errno));
 513
 514     char *buf = new char[len];
 515     char *p = buf;
 516     while (len > 0) {
 517         int bytes = ::read(fd, p, len);
 518         if (bytes <= 0)
 519             break;
 520
 521         p += bytes;
 522         result += bytes;
 523         len -= bytes;
 524     }
 525
 526     close(fd);
 527     tc->getVirtProxy().writeBlob(vaddr, buf, result);
 528     delete [] buf;
 529     return result;
 530 }
 531
 532 uint64_t
 533 writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
 534             Addr filename_addr)
 535 {
 536     DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
 537             vaddr, len, offset, filename_addr);
 538
 539     // copy out target filename
 540     std::string filename;
 541     tc->getVirtProxy().readString(filename, filename_addr);
 542
 543     OutputStream *out;
 544     if (offset == 0) {
 545         // create a new file (truncate)
 546         out = simout.create(filename, true, true);
 547     } else {
 548         // do not truncate file if offset is non-zero
 549         // (ios::in flag is required as well to keep the existing data
 550         //  intact, otherwise existing data will be zeroed out.)
 551         out = simout.open(filename, ios::in | ios::out | ios::binary, true);
 552     }
 553
 554     ostream *os(out->stream());
 555     if (!os)
 556         panic("could not open file %s\n", filename);
 557
 558     // seek to offset
 559     os->seekp(offset);
 560
 561     // copy out data and write to file
 562     char *buf = new char[len];
 563     tc->getVirtProxy().readBlob(vaddr, buf, len);
 564     os->write(buf, len);
 565     if (os->fail() || os->bad())
 566         panic("Error while doing writefile!\n");
 567
 568     simout.close(out);
 569
 570     delete [] buf;
 571
 572     return len;
 573 }
 574
 575 void
 576 debugbreak(ThreadContext *tc)
 577 {
 578     DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n");
 579     Debug::breakpoint();
 580 }
 581
 582 void
 583 switchcpu(ThreadContext *tc)
 584 {
 585     DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n");
 586     exitSimLoop("switchcpu");
 587 }
 588
 589 /*
 590  * This function is executed when the simulation is executing the syscall
 591  * handler in System Emulation mode.
 592  */
 593 void
 594 m5Syscall(ThreadContext *tc)
 595 {
 596     DPRINTF(PseudoInst, "PseudoInst::m5Syscall()\n");
 597     Fault fault;
 598     tc->syscall(&fault);
 599 }
 600
 601 void
 602 togglesync(ThreadContext *tc)
 603 {
 604     DPRINTF(PseudoInst, "PseudoInst::togglesync()\n");
 605     DistIface::toggleSync(tc);
 606 }
 607
 608 //
 609 // This function is executed when annotated work items begin.  Depending on
 610 // what the user specified at the command line, the simulation may exit and/or
 611 // take a checkpoint when a certain work item begins.
 612 //
 613 void
 614 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
 615 {
 616     DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid);
 617     System *sys = tc->getSystemPtr();
 618     const System::Params *params = sys->params();
 619
 620     if (params->exit_on_work_items) {
 621         exitSimLoop("workbegin", static_cast<int>(workid));
 622         return;
 623     }
 624
 625     DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
 626             threadid);
 627     tc->getCpuPtr()->workItemBegin();
 628     sys->workItemBegin(threadid, workid);
 629
 630     //
 631     // If specified, determine if this is the specific work item the user
 632     // identified
 633     //
 634     if (params->work_item_id == -1 || params->work_item_id == workid) {
 635
 636         uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
 637         int cpuId = tc->getCpuPtr()->cpuId();
 638
 639         if (params->work_cpus_ckpt_count != 0 &&
 640             sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
 641             //
 642             // If active cpus equals checkpoint count, create checkpoint
 643             //
 644             exitSimLoop("checkpoint");
 645         }
 646
 647         if (systemWorkBeginCount == params->work_begin_ckpt_count) {
 648             //
 649             // Note: the string specified as the cause of the exit event must
 650             // exactly equal "checkpoint" inorder to create a checkpoint
 651             //
 652             exitSimLoop("checkpoint");
 653         }
 654
 655         if (systemWorkBeginCount == params->work_begin_exit_count) {
 656             //
 657             // If a certain number of work items started, exit simulation
 658             //
 659             exitSimLoop("work started count reach");
 660         }
 661
 662         if (cpuId == params->work_begin_cpu_id_exit) {
 663             //
 664             // If work started on the cpu id specified, exit simulation
 665             //
 666             exitSimLoop("work started on specific cpu");
 667         }
 668     }
 669 }
 670
 671 //
 672 // This function is executed when annotated work items end.  Depending on
 673 // what the user specified at the command line, the simulation may exit and/or
 674 // take a checkpoint when a certain work item ends.
 675 //
 676 void
 677 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
 678 {
 679     DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid);
 680     System *sys = tc->getSystemPtr();
 681     const System::Params *params = sys->params();
 682
 683     if (params->exit_on_work_items) {
 684         exitSimLoop("workend", static_cast<int>(workid));
 685         return;
 686     }
 687
 688     DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
 689     tc->getCpuPtr()->workItemEnd();
 690     sys->workItemEnd(threadid, workid);
 691
 692     //
 693     // If specified, determine if this is the specific work item the user
 694     // identified
 695     //
 696     if (params->work_item_id == -1 || params->work_item_id == workid) {
 697
 698         uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
 699         int cpuId = tc->getCpuPtr()->cpuId();
 700
 701         if (params->work_cpus_ckpt_count != 0 &&
 702             sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
 703             //
 704             // If active cpus equals checkpoint count, create checkpoint
 705             //
 706             exitSimLoop("checkpoint");
 707         }
 708
 709         if (params->work_end_ckpt_count != 0 &&
 710             systemWorkEndCount == params->work_end_ckpt_count) {
 711             //
 712             // If total work items completed equals checkpoint count, create
 713             // checkpoint
 714             //
 715             exitSimLoop("checkpoint");
 716         }
 717
 718         if (params->work_end_exit_count != 0 &&
 719             systemWorkEndCount == params->work_end_exit_count) {
 720             //
 721             // If total work items completed equals exit count, exit simulation
 722             //
 723             exitSimLoop("work items exit count reached");
 724         }
 725     }
 726 }
 727
 728 } // namespace PseudoInst